CSE2102 Digital Design II - Topics CSE Digital Design II
|
|
- Carmella McKenzie
- 8 years ago
- Views:
Transcription
1 CSE2102 Digital Design II - Topics CSE Digital Design II 6 - Microprocessor Interfacing - Memory and Peripheral Dr. Tim Ferguson, Monash University. AUSTRALIA. Tel: FAX: timf@csse.monash.edu.au WWW: timf/ Clayton Office: Building 63, Room G08 1. Hardware Design of a Simple CPU. 2. Microprogrammed Implementation of Controller ASM. 3. Numerical Representation and Algorithms. 4. Multiplication and Multiplier Design. 5. VHDL for Digital System Design and Description. 6. Microprocessor Interfacing - Memory and Peripheral. 7. Introduction to Microcontroller and the MC68HC11 High Performance MCU. 8. Revision. Memory and peripheral interfacing is an important topic in practical applications of microprocessor systems. This topic introduces some general concepts in terms of memory and peripheral device interfacing. Note: These slides are based on a set created by Dr. Bin Qiu. 2 The discussion is mainly concerned with the hardware aspects. 6.1 Memory Interface Analysis of access timing Timing relationship diagrams are normally given in the data sheet of a memory or microprocessor device. The following is an example of a timing diagram. For a more practical case study, we have a close look at the timing diagrams of the Motorola MC68HC11 processor, and a Motorola memory device, MCM We focus on whether or not these two chips can be made to interface with one another. The microprocessor/controller has 8/16 bit data/address. The data bus is multiplexed with the lower 8 bit of the address bus. The clock cycle is about 500ns and there is a single R/W control line. The memory chip has 2K 8 bits, and its access time is 200ns. It seems that the memory chip can provide a satisfactory service to the microprocessor since it has a faster access time. The result is different after the examination of timing diagrams. CPU Memory CPU Memory Write cycle timing Read cycle timing 3 Figure 1: Example timing diagram. During a write cycle, the CPU should give the memory enough time to latch the data, and vise versa during the read cycle. 4
2 Write timing E - Bus clock (1/4 crystal) RW - Read/Write line A - Address D - Data AS - Address strobe The easiest way to arrange the signals are as follows: a) The E clock signal is inverted to serve as CE - latch on rising edge. b) The write enable signal W can be made using CE and RW. (a) MC68HC11 (b) MCM Figure 2: Write cycle timing diagram. As a result, the write timing interface is OK. 6 Read timing With signal arrangements the same as write timing, the read timing analysis goes as follows: 7 (a) MC68HC11 (b) MCM Figure 3: Read cycle timing diagram. 8 It can be seen from Figure 3 that both the setup and the hold time required by the MC68HC11 is not provided by the MCM As a result, the read timing is not up to the specifications. The problem can be solved by selecting different chips for interfacing or redesign signals such as CE.
3 Memory address decoding In a microcomputer system, the entire memory range is normally divided into different zones which represent RAM, ROM, I/O devices, etc. A 16-bit example is shown below, with 4Kb RAM, 16Kb ROM and 4Kb input/output address space. Depending on the usage of the address space, decoding schemes can be broadly classified as full decoding and partial decoding. Every single memory address is decoded in full decoding, resulting in a one address to one memory location mapping. In partial decoding, some address lines are not decoded, resulting in two or many addresses to one memory location mapping. Partial decoding reduces demands on decoding devices. A 16-bit example memory map Using the previous address space, an example decoding scheme with 4 modules of RAM and ROM, and a single I/O port is given as follows: 10 RAM decoding: 4 modules of 1Kx8 bits. The address for each module is given as: M-0: FF, M-1: FF, M-2: BFF, and M-3: 0C00-0FFF The decoding diagram is given on slide 11. ROM decoding: 4 modules of 4Kx8 bits. The address for each module is given as: M-0: C000-CFFF, M-1: D000-DFFF, M-2: E000-EFFF, M-3: F000-FFFF The decoding diagram is given on slide 12. The single I/O port is decoded with the highest four address bits and A2 only, just to distinguish it from the other address zones. Input port: 1000xxxxxxxxx1xx (A15-A0) Output port: 1000xxxxxxxxx0xx (A15-A0) E.g.: Read from 8004, 8005, 8FF4, 8xx4, etc. This is shown on slide
4 6.2 Input/Output Device Interface Input/Output devices can work in four general modes as illustrated below. MPU Initiated Device Initiated Unconditional transfer Conditional Interrupt Direct memory transfer * transfer * access (DMA) * Requires some exchanging of control device information between MCU and device (handshaking) CPU initiated, unconditional I/O transfer The I/O device is always assumed to be ready. Examples are LED displays as outputs and temperature sensors as inputs CPU initiated, conditional (polled) I/O transfer 13 The CPU reads I/O status to determine whether the device is ready for data transfer. A flow chart on the next page shows the sequence of steps involved in a polled I/O data transfer. 14 As an example, an external A/D converter is connected to a CPU using polled data transfer as shown on slide 16. The steps for data transfer are as follows: 1. The CPU issues a START pulse to begin the conversion of V A to its digital equivalent. 2. The CPU continually reads and tests the status of the A/D converter by polling, until BUSY is high. 3. The CPU reads in the A/D output data
5 6.2.3 I/O device initiated, interrupt transfer This is more efficient in terms of CPU time: The CPU serves I/O only when it is ready. The following points need to be noted for interrupt I/O transfer. 1. The main program needs to be paused and all parameters stacked. 2. The entrance address (vector) of the service routine can be fixed by the CPU or provided by the I/O device. 3. Interrupts can be software maskable or non-maskable, normally both exist in a system. 4. The handling of multiple interrupt sources can be dealt with by arranging priority of interrupts, or interrupt interrogation as illustrated below: I/O device initiated, direct memory access (DMA) transfer The previous interface techniques work well on slower I/O devices. DMA is suitable for bulk data transfer from internal memory to external fast I/O, or vise versa. The CPU is bypassed for DMA, when a DMA controller takes over control. Data can be moved between I/O and memory at a rate of one word per memory cycle. The steps of DMA are described as follows: The CPU initialises the DMA controller with a destination address and a count of the words that are to be transfered. When a peripheral is ready, it requests the DMA controller which halts the CPU. The CPU acknowledges its halted state after deactivating all bus lines. The DMA controller takes over the bus lines and transfers the specified amount of data from the peripheral to the specified memory address (i.e. a DMA transfer). The CPU is removed from the halted state on completion of the data transfer and regains the control of system buses. 20
Chapter 2 Logic Gates and Introduction to Computer Architecture
Chapter 2 Logic Gates and Introduction to Computer Architecture 2.1 Introduction The basic components of an Integrated Circuit (IC) is logic gates which made of transistors, in digital system there are
More informationMICROPROCESSOR. Exclusive for IACE Students www.iace.co.in iacehyd.blogspot.in Ph: 9700077455/422 Page 1
MICROPROCESSOR A microprocessor incorporates the functions of a computer s central processing unit (CPU) on a single Integrated (IC), or at most a few integrated circuit. It is a multipurpose, programmable
More informationTechnical Note. Micron NAND Flash Controller via Xilinx Spartan -3 FPGA. Overview. TN-29-06: NAND Flash Controller on Spartan-3 Overview
Technical Note TN-29-06: NAND Flash Controller on Spartan-3 Overview Micron NAND Flash Controller via Xilinx Spartan -3 FPGA Overview As mobile product capabilities continue to expand, so does the demand
More informationCOMPUTER HARDWARE. Input- Output and Communication Memory Systems
COMPUTER HARDWARE Input- Output and Communication Memory Systems Computer I/O I/O devices commonly found in Computer systems Keyboards Displays Printers Magnetic Drives Compact disk read only memory (CD-ROM)
More information150127-Microprocessor & Assembly Language
Chapter 3 Z80 Microprocessor Architecture The Z 80 is one of the most talented 8 bit microprocessors, and many microprocessor-based systems are designed around the Z80. The Z80 microprocessor needs an
More informationLecture N -1- PHYS 3330. Microcontrollers
Lecture N -1- PHYS 3330 Microcontrollers If you need more than a handful of logic gates to accomplish the task at hand, you likely should use a microcontroller instead of discrete logic gates 1. Microcontrollers
More informationCOMPUTERS ORGANIZATION 2ND YEAR COMPUTE SCIENCE MANAGEMENT ENGINEERING UNIT 5 INPUT/OUTPUT UNIT JOSÉ GARCÍA RODRÍGUEZ JOSÉ ANTONIO SERRA PÉREZ
COMPUTERS ORGANIZATION 2ND YEAR COMPUTE SCIENCE MANAGEMENT ENGINEERING UNIT 5 INPUT/OUTPUT UNIT JOSÉ GARCÍA RODRÍGUEZ JOSÉ ANTONIO SERRA PÉREZ Tema 5. Unidad de E/S 1 I/O Unit Index Introduction. I/O Problem
More informationComputer Performance. Topic 3. Contents. Prerequisite knowledge Before studying this topic you should be able to:
55 Topic 3 Computer Performance Contents 3.1 Introduction...................................... 56 3.2 Measuring performance............................... 56 3.2.1 Clock Speed.................................
More informationDEPARTMENT OF COMPUTER SCIENCE & ENGINEERING Question Bank Subject Name: EC6504 - Microprocessor & Microcontroller Year/Sem : II/IV
DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING Question Bank Subject Name: EC6504 - Microprocessor & Microcontroller Year/Sem : II/IV UNIT I THE 8086 MICROPROCESSOR 1. What is the purpose of segment registers
More informationSerial Communications
Serial Communications 1 Serial Communication Introduction Serial communication buses Asynchronous and synchronous communication UART block diagram UART clock requirements Programming the UARTs Operation
More informationMICROPROCESSOR AND MICROCOMPUTER BASICS
Introduction MICROPROCESSOR AND MICROCOMPUTER BASICS At present there are many types and sizes of computers available. These computers are designed and constructed based on digital and Integrated Circuit
More informationMicrotronics technologies Mobile: 99707 90092
For more Project details visit: http://www.projectsof8051.com/rfid-based-attendance-management-system/ Code Project Title 1500 RFid Based Attendance System Synopsis for RFid Based Attendance System 1.
More informationMemory unit. 2 k words. n bits per word
9- k address lines Read n data input lines Memory unit 2 k words n bits per word n data output lines 24 Pearson Education, Inc M Morris Mano & Charles R Kime 9-2 Memory address Binary Decimal Memory contents
More informationComputer Organization & Architecture Lecture #19
Computer Organization & Architecture Lecture #19 Input/Output The computer system s I/O architecture is its interface to the outside world. This architecture is designed to provide a systematic means of
More informationBlock 3 Size 0 KB 0 KB 16KB 32KB. Start Address N/A N/A F4000H F0000H. Start Address FA000H F8000H F8000H F8000H. Block 2 Size 8KB 16KB 16KB 16KB
APPLICATION NOTE M16C/26 1.0 Abstract The following article describes using a synchronous serial port and the FoUSB (Flash-over-USB ) Programmer application to program the user flash memory of the M16C/26
More informationMACHINE ARCHITECTURE & LANGUAGE
in the name of God the compassionate, the merciful notes on MACHINE ARCHITECTURE & LANGUAGE compiled by Jumong Chap. 9 Microprocessor Fundamentals A system designer should consider a microprocessor-based
More informationA+ Guide to Managing and Maintaining Your PC, 7e. Chapter 1 Introducing Hardware
A+ Guide to Managing and Maintaining Your PC, 7e Chapter 1 Introducing Hardware Objectives Learn that a computer requires both hardware and software to work Learn about the many different hardware components
More informationLogical Operations. Control Unit. Contents. Arithmetic Operations. Objectives. The Central Processing Unit: Arithmetic / Logic Unit.
Objectives The Central Processing Unit: What Goes on Inside the Computer Chapter 4 Identify the components of the central processing unit and how they work together and interact with memory Describe how
More informationPART B QUESTIONS AND ANSWERS UNIT I
PART B QUESTIONS AND ANSWERS UNIT I 1. Explain the architecture of 8085 microprocessor? Logic pin out of 8085 microprocessor Address bus: unidirectional bus, used as high order bus Data bus: bi-directional
More informationData Cables. Schmitt TTL LABORATORY ELECTRONICS II
Data Cables Data cables link one instrument to another. Signals can attenuate or disperse on long wires. A direct wire works best for short cables of less than 10 ft. A TTL cable connection can use a Schmitt
More informationChapter 1 Computer System Overview
Operating Systems: Internals and Design Principles Chapter 1 Computer System Overview Eighth Edition By William Stallings Operating System Exploits the hardware resources of one or more processors Provides
More informationApplication Note 132. Introduction. Voice Video and Data Communications using a 2-Port Switch and Generic Bus Interface KSZ8842-16MQL/MVL
Application Note 132 Voice Video and Data Communications using a 2-Port Switch and Generic Bus Interface KSZ42-16MQL/MVL Introduction The IP-Telephony market is booming, due to the ease of use of the technology
More information8741A UNIVERSAL PERIPHERAL INTERFACE 8-BIT MICROCOMPUTER
UNIVERSAL PERIPHERAL INTERFACE 8-BIT MICROCOMPUTER 8-Bit CPU plus ROM RAM I O Timer and Clock in a Single Package One 8-Bit Status and Two Data Registers for Asynchronous Slave-to- Master Interface DMA
More informationChapter 13. PIC Family Microcontroller
Chapter 13 PIC Family Microcontroller Lesson 01 PIC Characteristics and Examples PIC microcontroller characteristics Power-on reset Brown out reset Simplified instruction set High speed execution Up to
More informationWe r e going to play Final (exam) Jeopardy! "Answers:" "Questions:" - 1 -
. (0 pts) We re going to play Final (exam) Jeopardy! Associate the following answers with the appropriate question. (You are given the "answers": Pick the "question" that goes best with each "answer".)
More informationUMBC. ISA is the oldest of all these and today s computers still have a ISA bus interface. in form of an ISA slot (connection) on the main board.
Bus Interfaces Different types of buses: ISA (Industry Standard Architecture) EISA (Extended ISA) VESA (Video Electronics Standards Association, VL Bus) PCI (Periheral Component Interconnect) USB (Universal
More informationMemory Basics. SRAM/DRAM Basics
Memory Basics RAM: Random Access Memory historically defined as memory array with individual bit access refers to memory with both Read and Write capabilities ROM: Read Only Memory no capabilities for
More informationBuilding Blocks for PRU Development
Building Blocks for PRU Development Module 1 PRU Hardware Overview This session covers a hardware overview of the PRU-ICSS Subsystem. Author: Texas Instruments, Sitara ARM Processors Oct 2014 2 ARM SoC
More informationINTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)
INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET) International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 ISSN 0976 6464(Print)
More informationNTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter
NTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter Description: The NTE2053 is a CMOS 8 bit successive approximation Analog to Digital converter in a 20 Lead DIP type package which uses a differential
More information8051 hardware summary
8051 hardware summary 8051 block diagram 8051 pinouts + 5V ports port 0 port 1 port 2 port 3 : dual-purpose (general-purpose, external memory address and data) : dedicated (interfacing to external devices)
More informationProduction Flash Programming Best Practices for Kinetis K- and L-series MCUs
Freescale Semiconductor Document Number:AN4835 Application Note Rev 1, 05/2014 Production Flash Programming Best Practices for Kinetis K- and L-series MCUs by: Melissa Hunter 1 Introduction This application
More informationRead this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 4717 Computer Architecture TEST 2 for Fall Semester, 2006 Section
More informationPowerPC Microprocessor Clock Modes
nc. Freescale Semiconductor AN1269 (Freescale Order Number) 1/96 Application Note PowerPC Microprocessor Clock Modes The PowerPC microprocessors offer customers numerous clocking options. An internal phase-lock
More informationEureka Technology. Understanding SD, SDIO and MMC Interface. by Eureka Technology Inc. May 26th, 2011. Copyright (C) All Rights Reserved
Understanding SD, SDIO and MMC Interface by Eureka Technology Inc. May 26th, 2011 Copyright (C) All Rights Reserved Copyright by Eureka Technology Inc. All Rights Reserved Introduction This white paper
More informationAUTOMATIC NIGHT LAMP WITH MORNING ALARM USING MICROPROCESSOR
AUTOMATIC NIGHT LAMP WITH MORNING ALARM USING MICROPROCESSOR INTRODUCTION This Project "Automatic Night Lamp with Morning Alarm" was developed using Microprocessor. It is the Heart of the system. The sensors
More informationDevelop a Dallas 1-Wire Master Using the Z8F1680 Series of MCUs
Develop a Dallas 1-Wire Master Using the Z8F1680 Series of MCUs AN033101-0412 Abstract This describes how to interface the Dallas 1-Wire bus with Zilog s Z8F1680 Series of MCUs as master devices. The Z8F0880,
More informationChapter 6. Inside the System Unit. What You Will Learn... Computers Are Your Future. What You Will Learn... Describing Hardware Performance
What You Will Learn... Computers Are Your Future Chapter 6 Understand how computers represent data Understand the measurements used to describe data transfer rates and data storage capacity List the components
More informationOpenSPARC T1 Processor
OpenSPARC T1 Processor The OpenSPARC T1 processor is the first chip multiprocessor that fully implements the Sun Throughput Computing Initiative. Each of the eight SPARC processor cores has full hardware
More informationTeaching Systems Integration In An Advanced Microprocessor Applications Course
Teaching Systems Integration In An Advanced Microprocessor Applications Course Phil Fabiano New Jersey Institute of Technology University Heights Newark, New Jersey 07102 Abstract The New Jersey Institute
More informationSoftware engineering for real-time systems
Introduction Software engineering for real-time systems Objectives To: Section 1 Introduction to real-time systems Outline the differences between general-purpose applications and real-time systems. Give
More informationRAM & ROM Based Digital Design. ECE 152A Winter 2012
RAM & ROM Based Digital Design ECE 152A Winter 212 Reading Assignment Brown and Vranesic 1 Digital System Design 1.1 Building Block Circuits 1.1.3 Static Random Access Memory (SRAM) 1.1.4 SRAM Blocks in
More informationTypes Of Operating Systems
Types Of Operating Systems Date 10/01/2004 1/24/2004 Operating Systems 1 Brief history of OS design In the beginning OSes were runtime libraries The OS was just code you linked with your program and loaded
More informationChapter 11 I/O Management and Disk Scheduling
Operating Systems: Internals and Design Principles, 6/E William Stallings Chapter 11 I/O Management and Disk Scheduling Dave Bremer Otago Polytechnic, NZ 2008, Prentice Hall I/O Devices Roadmap Organization
More informationSequential Logic. (Materials taken from: Principles of Computer Hardware by Alan Clements )
Sequential Logic (Materials taken from: Principles of Computer Hardware by Alan Clements ) Sequential vs. Combinational Circuits Combinatorial circuits: their outputs are computed entirely from their present
More informationLizy Kurian John Electrical and Computer Engineering Department, The University of Texas as Austin
BUS ARCHITECTURES Lizy Kurian John Electrical and Computer Engineering Department, The University of Texas as Austin Keywords: Bus standards, PCI bus, ISA bus, Bus protocols, Serial Buses, USB, IEEE 1394
More informationPortable adapter for barcode scanners
Microprocessors and Microsystems 23 (1999) 217 223 Portable adapter for barcode scanners I.Y. Soon a, *, C.K. Yeo b, Y.H. Sng a a School of Electrical and Electronics Engineering, Nanyang Technological
More informationAN141 SMBUS COMMUNICATION FOR SMALL FORM FACTOR DEVICE FAMILIES. 1. Introduction. 2. Overview of the SMBus Specification. 2.1.
SMBUS COMMUNICATION FOR SMALL FORM FACTOR DEVICE FAMILIES 1. Introduction C8051F3xx and C8051F41x devices are equipped with an SMBus serial I/O peripheral that is compliant with both the System Management
More informationSECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks
UNIVERSITY OF KERALA First Degree Programme in Computer Applications Model Question Paper Semester I Course Code- CP 1121 Introduction to Computer Science TIME : 3 hrs Maximum Mark: 80 SECTION A [Very
More informationA N. O N Output/Input-output connection
Memory Types Two basic types: ROM: Read-only memory RAM: Read-Write memory Four commonly used memories: ROM Flash, EEPROM Static RAM (SRAM) Dynamic RAM (DRAM), SDRAM, RAMBUS, DDR RAM Generic pin configuration:
More informationADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-17: Memory organisation, and types of memory
ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-17: Memory organisation, and types of memory 1 1. Memory Organisation 2 Random access model A memory-, a data byte, or a word, or a double
More informationComputer Systems Structure Main Memory Organization
Computer Systems Structure Main Memory Organization Peripherals Computer Central Processing Unit Main Memory Computer Systems Interconnection Communication lines Input Output Ward 1 Ward 2 Storage/Memory
More informationAND8336. Design Examples of On Board Dual Supply Voltage Logic Translators. Prepared by: Jim Lepkowski ON Semiconductor. http://onsemi.
Design Examples of On Board Dual Supply Voltage Logic Translators Prepared by: Jim Lepkowski ON Semiconductor Introduction Logic translators can be used to connect ICs together that are located on the
More information8-Bit Flash Microcontroller for Smart Cards. AT89SCXXXXA Summary. Features. Description. Complete datasheet available under NDA
Features Compatible with MCS-51 products On-chip Flash Program Memory Endurance: 1,000 Write/Erase Cycles On-chip EEPROM Data Memory Endurance: 100,000 Write/Erase Cycles 512 x 8-bit RAM ISO 7816 I/O Port
More information8254 PROGRAMMABLE INTERVAL TIMER
PROGRAMMABLE INTERVAL TIMER Y Y Y Compatible with All Intel and Most Other Microprocessors Handles Inputs from DC to 10 MHz 8 MHz 8254 10 MHz 8254-2 Status Read-Back Command Y Y Y Y Y Six Programmable
More informationUsing the HT46R46 I/O Ports to Implement Half-Duplex SPI Communication
Using the HT46R46 I/O Ports to Implement Half-Duplex SPI Communication D/N: HA0150E Introduction This application explains how to use two I/O lines on the HT46R46 to implement half-duplex SPI communication.
More informationDS12885, DS12885Q, DS12885T. Real Time Clock FEATURES PIN ASSIGNMENT
DS12885, DS12885Q, DS12885T Real Time Clock FEATURES Drop in replacement for IBM AT computer clock/calendar Pin configuration closely matches MC146818B and DS1285 Counts seconds, minutes, hours, days,
More informationZ80 Microprocessors Z80 CPU. User Manual UM008006-0714. Copyright 2014 Zilog, Inc. All rights reserved. www.zilog.com
Z80 Microprocessors Z80 CPU UM008006-0714 Copyright 2014 Zilog, Inc. All rights reserved. www.zilog.com ii Warning: DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS. LIFE SUPPORT POLICY ZILOG S PRODUCTS
More informationLearning Outcomes. Simple CPU Operation and Buses. Composition of a CPU. A simple CPU design
Learning Outcomes Simple CPU Operation and Buses Dr Eddie Edwards eddie.edwards@imperial.ac.uk At the end of this lecture you will Understand how a CPU might be put together Be able to name the basic components
More informationComputer Systems Structure Input/Output
Computer Systems Structure Input/Output Peripherals Computer Central Processing Unit Main Memory Computer Systems Interconnection Communication lines Input Output Ward 1 Ward 2 Examples of I/O Devices
More informationMicrocontroller Based Low Cost Portable PC Mouse and Keyboard Tester
Leonardo Journal of Sciences ISSN 1583-0233 Issue 20, January-June 2012 p. 31-36 Microcontroller Based Low Cost Portable PC Mouse and Keyboard Tester Ganesh Sunil NHIVEKAR *, and Ravidra Ramchandra MUDHOLKAR
More informationINPUT/OUTPUT ORGANIZATION
INPUT/OUTPUT ORGANIZATION Accessing I/O Devices I/O interface Input/output mechanism Memory-mapped I/O Programmed I/O Interrupts Direct Memory Access Buses Synchronous Bus Asynchronous Bus I/O in CO and
More informationCentral Processing Unit
Chapter 4 Central Processing Unit 1. CPU organization and operation flowchart 1.1. General concepts The primary function of the Central Processing Unit is to execute sequences of instructions representing
More informationDAC Digital To Analog Converter
DAC Digital To Analog Converter DAC Digital To Analog Converter Highlights XMC4000 provides two digital to analog converters. Each can output one analog value. Additional multiple analog waves can be generated
More informationFreescale Semiconductor, Inc. Product Brief Integrated Portable System Processor DragonBall ΤΜ
nc. Order this document by MC68328/D Microprocessor and Memory Technologies Group MC68328 MC68328V Product Brief Integrated Portable System Processor DragonBall ΤΜ As the portable consumer market grows
More informationChapter 02: Computer Organization. Lesson 04: Functional units and components in a computer organization Part 3 Bus Structures
Chapter 02: Computer Organization Lesson 04: Functional units and components in a computer organization Part 3 Bus Structures Objective: Understand the IO Subsystem and Understand Bus Structures Understand
More informationMachine Architecture and Number Systems. Major Computer Components. Schematic Diagram of a Computer. The CPU. The Bus. Main Memory.
1 Topics Machine Architecture and Number Systems Major Computer Components Bits, Bytes, and Words The Decimal Number System The Binary Number System Converting from Decimal to Binary Major Computer Components
More informationSwitch Fabric Implementation Using Shared Memory
Order this document by /D Switch Fabric Implementation Using Shared Memory Prepared by: Lakshmi Mandyam and B. Kinney INTRODUCTION Whether it be for the World Wide Web or for an intra office network, today
More informationDigitale Signalverarbeitung mit FPGA (DSF) Soft Core Prozessor NIOS II Stand Mai 2007. Jens Onno Krah
(DSF) Soft Core Prozessor NIOS II Stand Mai 2007 Jens Onno Krah Cologne University of Applied Sciences www.fh-koeln.de jens_onno.krah@fh-koeln.de NIOS II 1 1 What is Nios II? Altera s Second Generation
More informationETEC 2301 Programmable Logic Devices. Chapter 10 Counters. Shawnee State University Department of Industrial and Engineering Technologies
ETEC 2301 Programmable Logic Devices Chapter 10 Counters Shawnee State University Department of Industrial and Engineering Technologies Copyright 2007 by Janna B. Gallaher Asynchronous Counter Operation
More informationCOMPUTER ARCHITECTURE. Input/Output
HUMBOLDT-UNIVERSITÄT ZU BERLIN INSTITUT FÜR INFORMATIK COMPUTER ARCHITECTURE Lecture 17 Input/Output Sommersemester 2002 Leitung: Prof. Dr. Miroslaw Malek www.informatik.hu-berlin.de/rok/ca CA - XVII -
More informationCPS104 Computer Organization and Programming Lecture 18: Input-Output. Robert Wagner
CPS104 Computer Organization and Programming Lecture 18: Input-Output Robert Wagner cps 104 I/O.1 RW Fall 2000 Outline of Today s Lecture The I/O system Magnetic Disk Tape Buses DMA cps 104 I/O.2 RW Fall
More informationDesign of a High Speed Communications Link Using Field Programmable Gate Arrays
Customer-Authored Application Note AC103 Design of a High Speed Communications Link Using Field Programmable Gate Arrays Amy Lovelace, Technical Staff Engineer Alcatel Network Systems Introduction A communication
More informationCentral Processing Unit (CPU)
Central Processing Unit (CPU) CPU is the heart and brain It interprets and executes machine level instructions Controls data transfer from/to Main Memory (MM) and CPU Detects any errors In the following
More informationLCM NHD-12032BZ-FSW-GBW. User s Guide. (Liquid Crystal Display Graphic Module) RoHS Compliant. For product support, contact
User s Guide -FSW-GBW LCM (Liquid Crystal Display Graphic Module) RoHS Compliant NHD- 12032- BZ- F - SW- G- B- W- Newhaven Display 120 x 32 pixels Version Line Transflective Side White LED B/L STN- Gray
More informationHANDLING SUSPEND MODE ON A USB MOUSE
APPLICATION NOTE HANDLING SUSPEND MODE ON A USB MOUSE by Microcontroller Division Application Team INTRODUCTION All USB devices must support Suspend mode. Suspend mode enables the devices to enter low-power
More informationEXERCISES OF FUNDAMENTALS OF COMPUTER TECHNOLOGY UNIT 5. MEMORY SYSTEM
EXERCISES OF FUNDAMENTALS OF COMPUTER TECHNOLOGY UNIT 5. MEMORY SYSTEM Unit 5. Memory System 2 / 6 Most of the exercises in this units deal with installing memory chips in a computer to increase its capacity,
More informationAm186ER/Am188ER AMD Continues 16-bit Innovation
Am186ER/Am188ER AMD Continues 16-bit Innovation 386-Class Performance, Enhanced System Integration, and Built-in SRAM Problem with External RAM All embedded systems require RAM Low density SRAM moving
More informationComputer and Set of Robots
Lesson 11:DESIGN PROCESS EXAMPLES Mobile-Phone, Mobile- Computer and Set of Robots 1 Mobile Phone 2 Mobile phone SoC (System-on-Chip) Hardware units Microcontroller or ASIP (Application Specific Instruction
More informationIntroduction the Serial Communications Huang Sections 9.2, 10.2 SCI Block User Guide SPI Block User Guide
Introduction the Serial Communications Huang Sections 9.2, 10.2 SCI Block User Guide SPI Block User Guide Parallel Data Transfer Suppose you need to transfer data from one HCS12 to another. How can you
More informationHello, and welcome to this presentation of the STM32L4 reset and clock controller.
Hello, and welcome to this presentation of the STM32L4 reset and clock controller. 1 The STM32L4 reset and clock controller manages system and peripheral clocks. STM32L4 devices embed three internal oscillators,
More informationSafeSPI - Serial Peripheral Interface for Automotive Safety
Page 1 / 16 SafeSPI - Serial Peripheral Interface for Automotive Safety Technical SafeSPI_specification_v0.15_published.doc 30 July 2015 Page 2 / 16 1 INTRODUCTION 3 1.1 Requirement specification types
More informationProgramming Logic controllers
Programming Logic controllers Programmable Logic Controller (PLC) is a microprocessor based system that uses programmable memory to store instructions and implement functions such as logic, sequencing,
More informationChapter 1 Lesson 3 Hardware Elements in the Embedded Systems. 2008 Chapter-1L03: "Embedded Systems - ", Raj Kamal, Publs.: McGraw-Hill Education
Chapter 1 Lesson 3 Hardware Elements in the Embedded Systems 1 Typical Embedded System Hardware units 2 Basic Circuit Elements at the System 3 (i) Power Source 1. System own supply with separate supply
More information7a. System-on-chip design and prototyping platforms
7a. System-on-chip design and prototyping platforms Labros Bisdounis, Ph.D. Department of Computer and Communication Engineering 1 What is System-on-Chip (SoC)? System-on-chip is an integrated circuit
More informationOperating Systems. Lecture 03. February 11, 2013
Operating Systems Lecture 03 February 11, 2013 Goals for Today Interrupts, traps and signals Hardware Protection System Calls Interrupts, Traps, and Signals The occurrence of an event is usually signaled
More informationAn Introduction to MPLAB Integrated Development Environment
An Introduction to MPLAB Integrated Development Environment 2004 Microchip Technology Incorporated An introduction to MPLAB Integrated Development Environment Slide 1 This seminar is an introduction to
More informationSection 29. Real-Time Clock and Calendar (RTCC)
Section 29. Real-Time Clock and Calendar (RTCC) HIGHLIGHTS This section of the manual contains the following topics: 29.1 Introduction... 29-2 29.2 Status and Control Registers... 29-3 29.3 Modes of Operation...
More information1. Computer System Structure and Components
1 Computer System Structure and Components Computer System Layers Various Computer Programs OS System Calls (eg, fork, execv, write, etc) KERNEL/Behavior or CPU Device Drivers Device Controllers Devices
More informationDS1721 2-Wire Digital Thermometer and Thermostat
www.dalsemi.com FEATURES Temperature measurements require no external components with ±1 C accuracy Measures temperatures from -55 C to +125 C; Fahrenheit equivalent is -67 F to +257 F Temperature resolution
More informationImplementing SPI Communication Between MSP430 G2452 and LTC2382-16 ADC
Implementing SPI Communication Between MSP430 G2452 and LTC2382-16 ADC Enwei Gu Nov. 12, 2011 MCU ADC MSP430- G2452 LTC2382-16 16- bits SPI Keywords 1 Abstract This document describes and shows how to
More informationSTEPPER MOTOR SPEED AND POSITION CONTROL
STEPPER MOTOR SPEED AND POSITION CONTROL Group 8: Subash Anigandla Hemanth Rachakonda Bala Subramanyam Yannam Sri Divya Krovvidi Instructor: Dr. Jens - Peter Kaps ECE 511 Microprocessors Fall Semester
More informationDS12887. Real Time Clock FEATURES PIN ASSIGNMENT PIN DESCRIPTION
DS12887 Real Time Clock FEATURES Drop in replacement for IBM AT computer clock/ calendar Pin compatible with the MC146818B and DS1287 Totally nonvolatile with over 10 years of operation in the absence
More informationAVR151: Setup and Use of the SPI. Introduction. Features. Atmel AVR 8-bit Microcontroller APPLICATION NOTE
Atmel AVR 8-bit Microcontroller AVR151: Setup and Use of the SPI APPLICATION NOTE Introduction This application note describes how to set up and use the on-chip Serial Peripheral Interface (SPI) of the
More informationComputer Engineering
Computer Engineering Unit Value 3.0 (typically 180 hours for a full-time course) This standard unit is primarily for use by the Technical Institutes when operating the following Courses : Diploma in Computer
More informationCHAPTER 6: Computer System Organisation 1. The Computer System's Primary Functions
CHAPTER 6: Computer System Organisation 1. The Computer System's Primary Functions All computers, from the first room-sized mainframes, to today's powerful desktop, laptop and even hand-held PCs, perform
More informationHandout 17. by Dr Sheikh Sharif Iqbal. Memory Unit and Read Only Memories
Handout 17 by Dr Sheikh Sharif Iqbal Memory Unit and Read Only Memories Objective: - To discuss different types of memories used in 80x86 systems for storing digital information. - To learn the electronic
More informationMicrocontroller Basics A microcontroller is a small, low-cost computer-on-a-chip which usually includes:
Microcontroller Basics A microcontroller is a small, low-cost computer-on-a-chip which usually includes: An 8 or 16 bit microprocessor (CPU). A small amount of RAM. Programmable ROM and/or flash memory.
More informationCS 3530 Operating Systems. L02 OS Intro Part 1 Dr. Ken Hoganson
CS 3530 Operating Systems L02 OS Intro Part 1 Dr. Ken Hoganson Chapter 1 Basic Concepts of Operating Systems Computer Systems A computer system consists of two basic types of components: Hardware components,
More informationIntroduction to Microcontrollers
Introduction to Microcontrollers Motorola M68HC11 Specs Assembly Programming Language BUFFALO Topics of Discussion Microcontrollers M68HC11 Package & Pinouts Accumulators Index Registers Special Registers
More information