SP3012 Series 0.5pF Diode Array for USB3.0

Transcription

1 TVS iode rrays (SP iodes) SP3012 Series 0.5pF iode rray for US3.0 RoHS Pb GRN escription The SP3012 Series integrates either 3, 4 or 6 channels of ultra low capacitance rail-to-rail diodes and an additional zener diode to provide protection for electronic equipment that may experience destructive electrostatic discharges (S). These robust devices can safely absorb repetitive S strikes above the maximum level specified in the IC international standard (±8kV contact discharge) without performance degradation. The extremely low loading capacitance also makes it ideal for protecting high speed signal lines such as US3.0, HMI2.0, US2.0, and est. Pinout Features SP UTG 14 *Pins 6, 7, 9, 10 are not internally connected but should be connected to the trace SP UTG (C-Q101 Qualified) S, IC , ±12kV contact, ±25kV air FT, IC , 40 (t P =5/50ns) Lightning, IC , 4 (t P =8/20μs) Low capacitance of 0.5pF (TYP) per I/O Low leakage current of 1.5μ (MX) at 5V Small form factor μfn (JC MO-229) and SOT23-6 (JC MO- 178) packages provide flow through routing to simplify PC layout C-Q101 Qaulified (μfn10, μfn14 and SOT23-6) pplications 7 1 SP UTG (C-Q101 Qualified) *Pins 1, 2, 3, 4, 5, 6, 7 are not internally connected but should be connected to the opposite pin with the PC trace. Functional lock iagram SP HTG (C-Q101 Qualified) LC/PP TVs Set Top oxes xternal Storages Smartphones V/lu-ray Players Ultrabooks/Notebooks esktops igital Cameras MP3/PMP pplication xample for US3.0 SP UTG SP UTG US Port US Controller PIN 1 PIN 4 PIN 5 PIN 11 PIN 12 PIN 13 PIN 14 PIN 8 PIN 9 V US SP UTG GN (PIN 2) SP HTG PIN 10 SSTX+ SSTX- SSRX+ IC PIN 1 PIN 2 PIN 4 PIN 5 PIN 1 PIN 3 PIN 4 PIN 6 SSRX- GN + SP UTG GN (PIN 3, 8) GN (PIN 2) - Life Support Note: Not Intended for Use in Life Support or Life Saving pplications The products shown herein are not designed for use in life sustaining or life saving applications unless otherwise expressly indicated. Signal GN

2 TLP Current () TVS iode rrays (SP iodes) bsolute Maximum Ratings Parameter Value Units I PP Peak Current (t p =8/20μs) 4.0 T OP Operating Temperature -40 to 125 C T STOR Storage Temperature -55 to 150 C CUTION: Stresses above those listed in bsolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. lectrical Characteristics (T OP =25ºC) SP3012 Parameter Test Conditions Min Typ Max Units Reverse Standoff Voltage V RWM I R 1µ 5.0 V Reverse reakdown Voltage V R I R =1m 6 Reverse Leakage Current I LK V R =5V, ny I/O to GN 1.5 µ I PP =1, t p =8/20µs, Fwd V Clamp Voltage 1 V C I PP =2, t p =8/20µs, Fwd V ynamic Resistance R YN (V C2 - V C1 ) / (I PP2 - I P ) 0.4 Ω IC (Contact) ±12 kv S Withstand Voltage 1 V S IC (ir) ±25 kv iode Capacitance 1 C I/O-GN Reverse ias=0v, f=1 MHz pf iode Capacitance 1 C I/O-/O Reverse ias=0v, f=1 MHz pf Note: 1 Parameter is guaranteed by design and/or device characterization. Capacitance vs. ias Voltage Insertion Loss (S21) I/O to GN Capacitance (pf) ttenuation (d) ias Voltage (V) Frequency (MHz) Clamping Voltage vs. I PP Transmission Line Pulsing(TLP) Plot Clamp Voltage (V) Current () TLP Voltage (V)

3 Temperature TVS iode rrays (SP iodes) Pulse Waveform 110% 100% 90% 80% Percent of I PP 70% 60% 50% 40% 30% 20% 10% 0% Time (μs) Soldering Parameters Reflow Condition Pre Heat Pb Free assembly - Temperature Min (T s(min) ) 150 C - Temperature Max (T s(max) ) 200 C - Time (min to max) (t s ) secs verage ramp up rate (Liquidus) Temp (T L ) to peak 3 C/second max T S(max) to T L - Ramp-up Rate 3 C/second max - Temperature (T L ) (Liquidus) 217 C Reflow - Temperature (t L ) seconds Peak Temperature (T P ) /-5 C Time within 5 C of actual peak Temperature (t p ) seconds Ramp-down Rate 6 C/second max Time 25 C to peak Temperature (T P ) 8 minutes Max. o not exceed 260 C Product Characteristics Lead Plating Lead Material Lead Coplanarity Substitute Material ody Material Pre-Plated Frame (µfn) Matte Tin (SOT23) Copper lloy inches (0.102mm) Silicon Molded poxy Flammability UL 94 V-0 Notes : 1. ll dimensions are in millimeters 2. imensions include solder plating. 3. imensions are exclusive of mold flash & metal burr. 4. lo is facing up for mold and facing down for trim/form, i.e. reverse trim/form. 5. surface matte finish VI T P T L T S(max) T S(min) 25 t S Preheat Ramp-up time to peak temperature Ordering Information Part Numbering System TVS iode rrays (SP iodes) SP 3012 xx Part Marking System V * * x T G t P t L G= Green Ramp-down Time T= Tape & Reel Series Number of Channels U= µfn-6 (1.6x1.6mm) 03 = 3 channel µfn-10 (2.5x1.0mm) 04 = 4 channel µfn-14 (3.5x1.35mm) 06 = 6 channel H= SOT23-6 (3.0x1.75mm) Product Series V = SP3012 ssembly Site Number of Channels 3 = 3 channel 4 = 4 channel 6 = 6 channel Critical Zone TL to TP Part Number Marking Min. Order Qty. SP UTG µfn-6 V* SP UTG µfn-10 V* SP UTG µfn-14 V* SP HTG SOT23-6 V*4 3000

4 TVS iode rrays (SP iodes) pplication Information Signal Integrity of High-Speed ata Interfaces Figure 1: PC Layout of the SP UTG for US 3.0 dding external S protection to a high-speed data port is not trivial for a variety of reasons. 1. S protection devices will add parasitic capacitance to each data line from line to GN and line to line causing impedance mismatches between the differential pairs. This ultimately affects the signal eye-diagram and whether or not the transceiver can distinguish a 1 from a S devices should be placed as close as possible to the port being protected to maximize their effect (i.e. clamping capability) and minimize the effect that PC trace inductance can have during an S transient. epending on the package size and pinout this could be challenging and the bigger the package, the larger the land pattern must be, which adds more parasitic capacitance. 3. Stub traces can add another element of discontinuity adversely affecting signal integrity so S protection is best employed when it s overlaid on the data lines or when the signals can simply pass underneath the device. Taking all of this into account Littelfuse developed the SP3012 Series which was designed specifically for protection of high-speed data ports such as HMI 1.3/1.4 and US 3.0. They present less than 0.5pF from line to GN and only 0.3pF from line to line minimizing impedance mismatch between the differential pairs. Furthermore, the SP3012 is rated up to ±12kV (contact discharge) which far exceeds the maximum requirement of the IC standard. There are two options available (4 channel and 6 channel) and both are housed in leadless µfn packages so the data lines can pass directly underneath the device to reduce discontinuities and maintain signal integrity. Figure 2 shows the US 3.0 eye diagram that resulted from the PC layout above with the SP UTG soldered on the landing pattern Wfrms:500 ase: ns Scale:33.0 ps/div Figure 2: US 3.0 ye iagram with the SP UTG Using a similar layout as above, Figure 3 shows the eye diagram that resulted using the SP UTG to protect the Super-Speed data lines and the SP UTG to protect the legacy data pair. J1 U1 US 3.0 ye iagram ata Figure 1 shows the layout used for the SP UTG in a US 3.0 application. The traces routed toward the top are the two legacy US 2.0 lines (+/-) that run at the slower speed of 480Mbps and therefore are not as critical as the 5Gbps Super-Speed traces Wfrms:850 ase: ns Scale:33.0 ps/div Figure 3: US 3.0 ye iagram with the SP UTG

5 TVS iode rrays (SP iodes) imensions μfn-6 Top View L ottom View μfn-6 (1.6x1.6x0.5mm) JC MO Pin 1 Index rea Pin 1 chamfer 0.10 x Ref Ref b Side View Seating plane e 0.50 SC 0.020SC b C L M C 0.05 M C mbossed Carrier Tape & Reel Specification μfn-6 P2 K0 1 0 User Feeding irection P0 F W 0 t Millimetres F MIN 0.06 MIN P P / /-0.01 W P K t 0.25 TYP 0.01 TYP Pin 1 Location

6 TVS iode rrays (SP iodes) Top View imensions µfn-10 (2.5x1.0x0.5mm) Seating Plane C L P2 X Top View b Side View b M C 0.05 M C ottom View R0.125 e P 1 2xR0.075mm (7x) Recomended Soldering Pad Layout X1 3 mbossed Carrier Tape & Reel YSpecification µfn-10 Z (C) G (Y1) K0 1 0 P0 0 5º Max F W 0 T 5º Max User Feeding irection Pin 1 Location JC Seating µfn-10 (2.5x1.0x0.5mm) Plane MO-229 C 0.10 M C 0.05 M C ottom View b R0.125 b L e 0.50 SC SC 2xR0.075mm (7x) L e Soldering Pad Layout imensions Inch Millimeter C (0.034) (0.875) G P X X Y Y1 (0.061) (1.55) Z Z (C) Z (C) X Recomended Soldering Pad Layout G X G Side View b P P X1 lternative Soldering Pad Layout µfn-10 (2.5x1.0x0.5mm) Min Max F K P P T W X1 b1 1 3 Y (Y1) Y (Y1)

7 TVS iode rrays (SP iodes) imensions µfn-14 (3.5x1.35x0.5mm) PIN 1 Index rea Seating Plane C Top View Side View b ottom View µfn-14 (3.5x1.35x0.5mm) JC MO b e SC 0.020SC L Notes: 1. imension and tolerancing comform to SM Y14.5M Controlling dimensions: Millimeter. Converted Inch dimensions are not necessarily exact. Pin 1 Identification Chamfer 0.10X45º Soldering Pad Layout imensions Recomended Soldering Pad Layout Min Nom Max Min Nom Max Millimeter b L e 0.50 typ typ s s mbossed Carrier Tape & Reel Specification µfn-14 P2 P0 0 User Feeding irection / / F 1 Ø W Pin 1 Location / F / T K / P / / P / K0 0 T / W /- 0.10

8 TVS iode rrays (SP iodes) imensions SOT23-6 SOT23 Pins 6 Recommended Solder Pad Layout M JC MO-178 Notes b C e 0.95 Ref ref - e1 1.9 Ref Ref - L ,5 N a 0º 8º 0º 8º - M O TYP - P TYP - R P O R Notes: 1. imensioning and tolerancing Per SM Y14.5M conforms to IJ SC-74 (1992). 3. imensions and 1 are exclusive of mold flash, protrusions, or gate burrs. 4. Foot length L measured at reference to seating plane. 5. L is the length of flat foot surface for soldering to substrate. 6. N is the number of terminal positions. 7. Controlling dimension: MILLIMTR. Converted inch dimensions are not necessarily exact. mbossed Carrier Tape & Reel Specification SOT23-6 8mm TP N RL CCSS HOL 14.4mm 1.5mm I. HOL 4.0mm 2.0mm 1.75mm 13mm 8mm C L 180mm 60mm 4.0mm SOT-23 (8mm POCKT PITCH) GNRL INFORMTION PICS PR RL. 2. ORR IN MULTIPLS OF FULL RLS ONLY. 3. MTS I-481 RVISION "" SPCIFICTIONS. 8.4mm USR IRCTION OF F PIN 1 dditional Information atasheet Resources Samples COVR TP