Baseband delay line QUICK REFERENCE DATA

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1 FEATURES Two comb filters, using the switched-capacitor technique, for one line delay time (64 µs) Adjustment-free application No crosstalk between SECAM colour carriers (diaphoty) Handles negative or positive colour-difference input signals Clamping of AC-coupled input signals (±(R Y) and ±(B Y)) VCO without external components MHz internal clock signal derived from a 6 MHz CCO, line-locked by the sandcastle pulse (64 µs line) Sample-and-hold circuits and low-pass filters to suppress the MHz clock signal Addition of delayed and non-delayed output signals Output buffer amplifiers Comb filtering functions for NTSC colour-difference signals to suppress cross-colour. GENERAL DESCRIPTION The is an integrated baseband delay line circuit with one line delay. It is suitable for decoders with colour-difference signal outputs ±(R Y) and ±(B Y). QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT V P analog supply voltage (pin 9) V V P2 digital supply voltage (pin ) V I P(tot) total supply current ma V I ±(R Y) input signal PAL/NTSC (peak-to-peak value; pin 6) 525 mv ±(B Y) input signal PAL/NTSC (peak-to-peak value; pin 4) 665 mv ±(R Y) input signal SECAM (peak-to-peak value; pin 6).05 V ±(B Y) input signal SECAM (peak-to-peak value; pin 4). V G v gain V O / V I of colour-difference output signals V / V 6 for PAL and NTSC db V 2 / V 4 for PAL and NTSC db V / V 6 for SECAM db V 2 / V 4 for SECAM db ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION DIP6 plastic dual in-line package; 6 leads (00 mil) long body SOT8-4 T SO6 plastic small outline package; 6 leads; body width.9 mm SOT09- December 994 2

2 BLOCK DIAGRAM ±(R Y) colour-difference input signals ±(B Y) V P sandcastle pulse input 6 SIGNAL CLAMPING pre-amplifiers LINE MEMORY SAMPLE- AND- HOLD LP addition stages 4 9 SIGNAL CLAMPING analog supply 5 FREQUENCY SANDCASTLE PHASE DETECTOR DETECTOR LINE MEMORY DIVIDER BY 92 SAMPLE- AND- HOLD MHz shifting clock LP LP 6 MHz CCO DIVIDER BY 2 0 digital supply GND V P2 GND2 Fig. Block diagram. output buffers , 8 ±(R Y) colour- difference output signals ±(B Y) MEH82.2 December 994

3 PINNING SYMBOL PIN DESCRIPTION V P2 +5 V supply voltage for digital part 2 not connected GND2 ground for digital part (0 V) 4 internally connected SAND 5 sandcastle pulse input 6 not connected 7 internally connected 8 internally connected V P 9 +5 V supply voltage for analog part GND 0 ground for analog part (0 V) V O(R Y) ±(R Y) output signal V O(B Y) 2 ±(B Y) output signal not connected V I(B Y) 4 ±(B Y) input signal 5 not connected V I(R Y) 6 ±(R Y) input signal V P2 GND2 SAND MEH8 Fig.2 Pin configuration. 6 5 V I(R Y) 4 V I(B Y) 2 V O(B Y) V O(R Y) 0 GND 9 V P LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 4). Ground pins and 0 connected together. Note SYMBOL PARAMETER MIN. MAX. UNIT V P supply voltage (pin 9) V V P2 supply voltage (pin ) V V 5 voltage on pin V P +.0 V V n voltage on pins, 2, 4 and V P V T stg storage temperature C T amb operating ambient temperature 0 70 C V ESD electrostatic handling for all pins (note ) ±500 V. Equivalent to discharging a 200 pf capacitor through a 0 Ω series resistor. THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT R thj-a thermal resistance from junction to ambient in free air SOT K/W SOT K/W December 994 4

4 CHARACTERISTICS V P = 5.0 V; input signals as specified in characteristics with 75% colour bars; super-sandcastle frequency of khz; T amb = +25 C; measurements taken in Fig. unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V P supply voltage (analog part; pin 9) V V P2 supply voltage (digital part; pin ) V I P supply current ma I P2 supply current ma Colour-difference input signals V I V I(max) input signal (peak-to-peak value) ±(R Y) PAL and NTSC (pin 6) 525 mv ±(B Y) PAL and NTSC (pin 4) 665 mv ±(R Y) SECAM (pin 6) note.05 V ±(B Y) SECAM (pin 4) note. V maximum symmetrical input signal (peak-to-peak value) ±(R Y) or ±(B Y) for PAL and NTSC before clipping V ±(R Y) or ±(B Y) for SECAM before clipping 2 V R 4, 6 input resistance 40 kω C 4, 6 input capacitance 0 pf V 4, 6 input clamping voltage proportional to V P..5.7 V Colour-difference output signals V O V /V 2 output signal (peak-to-peak value) ±(R Y) on pin all standards.05 V ±(B Y) on pin 2 all standards. V ratio of output amplitudes at equal input signals V I4, 6 =. V (p-p) db V, 2 DC output voltage proportional to V P V R, 2 output resistance Ω G v gain for PAL and NTSC ratio V O /V I db gain for SECAM ratio V O /V I db V n /V n+ ratio of output signals on pins and 2 for adjacent time samples at constant input signals V n noise voltage (RMS value; pins and 2) V I4, 6 =. V (p-p); SECAM signals db V I4, 6 = 0 V; note 2.2 mv S/N(W) weighted signal-to-noise ratio V O = V (p-p); note 2 54 db t d delay of delayed signals µs t tr delay of non-delayed signals ns transient time of delayed signal on pins respectively 2 transient time of non-delayed signal on pins respectively 2 00 ns transient of SECAM signal 00 ns transient of SECAM signal 50 ns 20 ns December 994 5

5 SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Sandcastle pulse input (pin 5) f BK burst-key frequency khz f SAND sandcastle frequency khz V 5 top pulse voltage note 4.0 V P +.0 V V slice internal slicing level V 5.0 V V I 5 input current 0 µa C 5 input capacitance 0 pf Notes. The signal must be blanked line-sequentially. The blanking level must be equal to the non-colour signal. 2. Noise voltage at f = 0 khz to MHz; V I4, 6 = 0 (R S < 00 Ω).. The leading edge of the burst-key pulse or H-blanking pulse is used for timing. December 994 6

6 APPLICATION INFORMATION 0. µf chrominance signal 20 to 400 mv (p-p) Y 220 pf CVBS S-VHS (Y, C) PAL/NTSC SECAM NTSC FILTERS PAL SECAM NTSC-.58 NTSC-4.4 colour standard switching signals MEH Ω 680 Ω V = +2 V P 0 µh Coil: Toko 9LN-A75 GO 27 pf 20 pf 0 Ω 0 Ω 27 pf 220 pf 220 pf TDA4650 colour- difference signals V i -(R-Y) nf nf V i -(B-Y) 6 4 ±(R Y) comb filtering LINE DELAY LINE DELAY SSC (2 V) ±(B Y) comb filtering VCO nf nf HUE off PLL off 8 kω 6.8 kω. kω V P 0 kω HUE control 8.8 MHz X X2 0 pf 7.2 MHz 0 pf 47 nf 0. µf 0. µf. kω Ω 0 kω N V Ω LINE-LOCKED PLL / PULSE PROCESSING +5. V 0 9 () 00 nf 22 µf 0Ω 0Ω +5. V () 00 nf () positioned close to pins Fig. Application circuit with TDA4650. V o -(R-Y) 2 V o -(B-Y) Ω 5. V +2 V December 994 7

7 This datasheet has been download from: Datasheets for electronics components.

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