Reading guide - analysis and design of analog integrated circuits

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Transcription:

Reading guide - analysis and design of analog integrated circuits This reading guide is intended to help you identify the essential parts when reading the course book and point out the part that are less relevant for the course. For those who have not taken any courses in solid state physics and for the first time hear about semiconductors, doping, band gaps, Fermi levels, pn-junctions etc I suggest that you read the introduction to semiconductors at Hyperphysics (link on course homepage). The information on this page explains the physics almost without equations and complements the lecture notes for the first two lectures nicely (semiconductor physics is not covered in the book at all). Only the sections indicated are part of the course and need to be read. Chapter 1 In the first chapter there are many new notations and equations for those of you not used to semiconductors. You are not supposed to know any of these equations by heart (you have the collection of formula on the homepage for that) but you should be able to apply them and select the correct one for a specific problem. The book does not use band structures to explain the operation of BJTs and MOSFETs (since it doesn t have any introduction to semiconducting physics). It is however hard to get a good understanding of the physics behind all the equations unless bands are used which is done in the lectures. 1.1. Introduction 1.2. Describes relation between charge, electric field and potential for pn-junctions. Assumes that the reader is somewhat familiar with pn-junctions, therefore the lecture notes add valuable additional details. Important equations: 1.1, 1.3, 1.14, 1.15. 1.2.1. Ignore part about capacitance of graded junction. Here they do not discuss diffusion capacitance (as is done in the lecture) but only junction capacitance (pn-junction is similar to a parallel plate capacitor with a distance between the plates that depend on bias). Junction capacitance is discussed in the section about BJTs (1.4.2) where it s called base-charging capacitance. 1.2.2. Tunneling and avalanche breakdown are detrimental effects what give a rapidly increasing reverse current. However, the effects can be of use in Zener diodes for e.g. voltage regulator circuits. Zener diodes are operated in reverse bias with the breakdown voltage controlled by doping. 1.3. BJTs 1.3.1. Use expressions for the minority concentrations at edge of depletion region (eq. 1.27, 1.28) to derive the collector current (eq. 1.34) and the (two) base current contributions from recombination in the base (I B1, eq. 1.41) and hole injection from base to emitter (I B2, eq. 1.45). The important metric gain (β F =I C /I B, eq. 1.47, 1.48) is also discussed. Also introduces the base transport factor α T which is a metric very similar to β F that we skip in the lecture. 1.3.2. Discusses the effect that the collector voltage V CE has on the width of the base region. Remember that the depletion width of a pn-junction increases with increased reverse bias. Since the 1

base-collector junction is reverse biased (in the active region) the base width decreases with V CE. The diffusion current in the base depends on the gradient of electron (minority carrier) concentration which increases when the base shrinks. This gives that the current increases with V CE also in the active operating region (the Early effect) which is a bad effect since it gives non-infinite output resistance (r 0 ) discussed in section 1.4.4. 1.3.3. Don t read. We ignore the saturation operating region since it s not used for amplifiers due to small gain. Saturation can be used in digital circuits for logic. Inverse-Active gives worse characteristics than active region since BJT is doped unsymmetrically (emitter higher doping than collector). 1.3.4. Don t read. At high voltages the reverse biased base-collector junction can experience avalanche multiplication with rapid increase in collector current. Similar as for pn-junctions (lecture 2). 1.3.5. Don t read. Discusses differences for high temp and high currents. 1.4. Small-signal model of BJTs. How to describe BJT as a circuit with linear elements (resistor, capacitors, current sources) for DC bias with an additional small AC bias. 1.4.1. Derives the transconductance (eq. 1.89) which is needed to describe the current source in the small-signal model. 1.4.2. Same as diffusion capacitance. Increase base emitter voltage V BE gives an increase in charge in base. Since C=dQ/dV there is an input capacitance C b (eq. 1.104) due to this change. 1.4.3. Since the (small AC signal) base current i b changes with the (small AC signal) input voltage v i this gives and input resistance of r π =v i /i b ) 1.4.4. Due to the Early effect (increase in I C with V CE in active region) there is an output resistance r 0. 1.4.5. Combine the above parts (that are most important) to get the simplest small-signal model. Add more elements in the following sections to get the model more detailed. 1.4.6. Since the base width decreases with V CE (section 1.3.2) the base has less minority carrier charge Q e and therefore the base current I B1 that comes from recombination in the base is reduced (I B1, eq. 1.40). This means that increasing V CE reduces the base current I B. This effect is included in a resistor r µ (eq. 1.116). 1.4.7. Add capacitances to get a small-signal model which works for high-frequency (capacitances are just open circuits at low frequency). Emitter-base junction (forward biased) have depletion region capacitance C je (depletion width changes with bias in pn-junction) and diffusion capacitance C b (charge in base changes with bias). Since this junction is forward biased C b dominates. Base-collection junction (reverse) is dominated by depletion region capacitance C µ. 1.4.8. Don t read. Gain at high frequency is mainly limited by parasitic capacitances (discussed more in the high-speed electronics course). 1.5. MOSFETs 1.5.1. Describes the onset of inversion in a MOS structure. Since the book does not use band structures it could be a bit tricky to follow the description on how an inversion layer is formed. However, this is covered in detail in the first part of lecture 4 which hopefully helps with the understanding. The surface potential (φ) is controlled by the gate but all change in gate voltage (V GS ) does not change the surface potential since there is a voltage drop over the oxide. By using a thin oxide (or with a high dielectric constant) this voltage drop can be reduced and V GS can effectively 2

change the surface potential. This is discussed in lecture 4). Also describes what factors influence the threshold voltage (V t (don t confuse with V T =kt)) in eq.1.140. Here a voltage V SB can also be applied to the body contact to adjust V t, however we usually assume that the body is on the same potential as the source (ground). The section also derives the drain current for V GS >V t (i.e. there is an inverted channel of electrons underneath the gate) using the expression for the drift current (eq. 1.147). This derivation is also done in lecture 4. The book explains pinch-off effect when V DS >V GS -V t causes the current to saturate to be due to that further increase in V DS does not increase the average electric field electric field long the channel. This explanation is a bit brief. At V DS =V GS -V t the drain potential is counteracting the gate potential close to the drain and therefore the p-type substrate is not inverted here i.e. there is no channel there. The current needs to be constant along the channel (don t add or remove charge) and I D =WQ I v d which means that since Q I ->0, v d -> close to the drain i.e. the electric field becomes very high there. Any further increase in V DS will not affect the electric field in the rest (non-pinched off) part of the channel. So if there is no channel at the end why doesn t I DS ->0? The charges that reach the pinch-off point will be quickly swept out into the drain even if there is no inverted channel there (they will be minority carriers (electrons in p-type material) during this part). The pinched-off part of the channel will actually increase with V DS since the drain potential influences the potential in the channel further into the channel with increasing V DS. Since the inverted channel decrease in length with the same applied voltage the electric field increases and therefore also the current resulting in an output resistance which is not infinite. 1.5.2. Remember: For BJTs in saturation the collector current increases with V CE but for MOSFETS in saturation I DS is constant. The BJT region where is collector current is constant is called active. 1.5.3. Just a simple definition. 1.5.4. Don t read. 1.5.5. Four possible problems arising for too high gate or drain bias voltages. 1.6. Similar way of introducing small-signal model as for BJTs 1.6.1. The transconductance is used for the current-source part of the small-signal model. 1.6.2. The parallel plate capacitance between gate and channel are just divided equally between source and drain in the linear (triode) part (small V DS ). After pinch-off (active or saturation region) there is no channel close to the drain i.e. no change in charge with gate voltage (C=dQ/dV) and so C gd =0. 1.6.3. Due to the oxide the gate current is zero at low frequency which is good since that makes the input resistance infinite. 1.6.4. Channel length modulation at V DS beyond pinch-off results in increase in current i.e. noninfinite output resistance. Similar to Early effect in BJTs. 1.6.4. Put it all together for a first simple model. 3

1.6.6. Not in detail. We can sometimes ignore body effects (consider body to be on same potential as source). However, this is considered in one of the excercises 1.6.7. Not in detail. Just additional capacitances to body and due to too big gate and contact resistances. This give a more complicated (and more accurate) model. 1.6.8. Don t read. How the gain is dropping at higher frequency an how to calculate the f t metric. Covered in the high-speed electronics course. 1.7. Short channel effects in MOSFETs. 1.7.1. Don t need to understand the full derivation but it is important to note that I D for a velocity saturated MOSFET (eq 1.224) is linearly dependent on V GS in the saturation region instead of quadratically (as for non-velocity saturated). 1.7.2. Don t read. 1.7.3. Don t read. 1.8. Don t read. This is discussed briefly during the lecture. In the subthreshold region the current increases exponentially with gate voltage due to injection of carriers over the barriers at the source and drain junctions. This is similar to a NPN bipolar transistor. 1.9. Don t read. Chapter 3 Only read the indicated sections.. 3.3.4. 3.3.7. 3.4.2. 3.4.2.2. 3.5. Not in detail 3.5.3. Not in detail 3.5.4. Not in detail 3.5.5. Not in detail Chapter 7 Only read the indicated sections. 7.1. 7.2. 7.2.1. Until eq. 7.12. 4

5