Multiplexers Decoders ROMs (LUTs)

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Transcription:

Multiplexers Decoders ROMs (LUTs) Page

A Problem Statement Design a circuit which will select between two inputs (A and B) and pass the selected one to the output (Q). The desired circuit is called a multiplexer or MUX for short Page 2

Multiplexer Symbols Preferred symbol A Q A Q B B S S Select input Page 3

Data Steering A B Q A B Q A B Q S Key idea: The select input wire selects one of the inputs and passes it out to the output. This is called a 2: MUX (pronounced two-to-one ) Page 4

Multiplexers S A B Q Page 5

Multiplexers S A B Q AB S Page 6

Multiplexers S A B Q A S B AB S Q = S A + SB Q Page 7

Multiplexers Data Inputs { I I I 2 I 3 4: MUX Z A B { Control Inputs Z = A B I + A BI + AB I 2 + ABI 3 Page 8

8 to Multiplexer I I Data Inputs I 2 I 3 I 4 8: MUX Z I 5 I 6 I 7 A B C Control Inputs Z = A B C I + A B CI + A BC I 2 + Page 9

A General MUX N Data Inputs I I I N- N: MUX Z Output s k-..s log 2 (N) Control Inputs Page

A 3: MUX? Q = A B I + A BI + AB I 2 3: I I I 2 MUX Q A B What happens when AB =? Often we just use a 4: MUX and leave I 3 unconnected. Page

Multiplexers In A Microprocessor Each signal here is a 6-bit wide bus A 6-bit wide MUX is simply 6 -bit wide MUXes all with common select inputs Page 2

6-bit 3: MUX Example BusA bit bit BusB bit Select control lines BusC bit Page 3

6-bit 3: MUX Example BusA bit bit BusB bit Select control lines BusC bit Page 4

6-bit 3: MUX Example BusA BusB BusC bit bit bit 2 bit 5 Output s s They all use the same select control lines One bit from each bus goes to each MUX The result is a 6-bit bus Page 5

Implementing Logic with MUX Blocks Page 6

Example Using A as the select input A B C F A= part of the truth table when A=, F= A= part of the truth table when A=, F=B+C B+C A F Page 7

Example 2 Using B as the select input B A C F B= part of the truth table when B=, F=AC B= part of the truth table when B=, F=A AC A B F Page 8

Example 3 Using C as the select input C A B F C= part of the truth table when C=, F=AB C= part of the truth table when C=, F=A AB A C F All 3 of these examples are the same truth table Page 9

Using a Bigger MUX Using AB as the select input A B C F AB= part of the truth table when AB=, F= AB= part of the truth table when AB=, F=C AB= part of the truth table when AB=, F= AB= part of the truth table when AB=, F=C C C AB F Can easily re-order truth table to use different MUX control inputs Page 2

Another 4: MUX Example A B F F AB This shows that a large enough MUX can directly implement a truth table Page 2

Implementing Logic Functions With Muxes Implement: Z = A B + BC A B I C I I 2 4-to- MUX Z I 3 A B Page 22

Implementing Logic Functions With Muxes Implement: Z = A B + BC A B I C I I 2 4-to- MUX Z I 3 for AB=, Z= A B Page 23

Implementing Logic Functions With Muxes Implement: Z = A B + BC A B I C I I 2 4-to- MUX Z I 3 for AB=, Z= A B Page 24

Implementing Logic Functions With Muxes Implement: Z = A B + BC A B I C I I 2 4-to- MUX Z I 3 for AB=, Z= A B Page 25

Implementing Logic Functions With Muxes Implement: Z = A B + BC A B I C I I 2 4-to- MUX Z C I 3 for AB=, Z=C A B Page 26

Implementing Logic Functions With Z = A B + BC Muxes An alternate method A= B= Z = + C = I A= B= Z = + C = I 4-to- MUX Z A= B= Z = + C = I 2 A= B= Z = + C = C C I 3 A B Page 27

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D 4 2 8 5 3 9 3 7 5 2 6 4 Page 28

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X 4 2 X 8 5 3 9 3 2 7 6 X 5 4 Page 29

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B I C D I X X I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A B C Page 3

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B I C D I X X I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A B C Page 3

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D D I I X X I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A B C Page 32

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X D I I I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A B C Page 33

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X D I I I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A B C Page 34

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X D I I I 2 I 3 I 4 8-to- MUX Z I 5 I 6 X I 7 A B C Page 35

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X D I I I 2 I 3 I 4 I 5 8-to- MUX Z I 6 X I 7 A B C Page 36

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X D D I I I 2 I 3 I 4 I 5 I 6 8-to- MUX Z X I 7 A B C Page 37

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X X D D I I I 2 I 3 I 4 I 5 I 6 I 7 8-to- MUX Z A B C Page 38

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B I C D I X X I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A C D Page 39

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B I C D I X X I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A C D Page 4

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D B I I X X I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A C D Page 4

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X B I I I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A C D Page 42

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X B B I I I 2 I 3 8-to- MUX Z I 4 I 5 I 6 X I 7 A C D Page 43

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X B B I I I 2 I 3 I 4 8-to- MUX Z I 5 I 6 X I 7 A C D Page 44

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X B B I I I 2 I 3 I 4 I 5 8-to- MUX Z I 6 X I 7 A C D Page 45

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X B B I I I 2 I 3 I 4 I 5 I 6 8-to- MUX Z X I 7 A C D Page 46

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B C D X X X B B I I I 2 I 3 I 4 I 5 I 6 I 7 8-to- MUX Z A C D Page 47

Implementing Logic Functions With A B Muxes An alternate method C D X X I I I 2 I 3 8-to- MUX Z X I 4 I 5 I 6 Z = AC + AD + A BC + B CD I 7 A C D Page 48

Implementing Logic Functions With Muxes An alternate method A C D Z = AC + AD + A BC + B CD Z = ()() + ()() + ()B() + B ()() = B Z = ()() + ()() + ()B() + B ()() = B Z = ()() + ()() + ()B() + B ()() = Z = ()() + ()() + ()B() + B ()() = B Z = ()() + ()() + ()B() + B ()() = Z = ()() + ()() + ()B() + B ()() = Z = ()() + ()() + ()B() + B ()() = Z = ()() + ()() + ()B() + B ()() = Page 49

Implementing Logic Functions With A B Muxes An alternate method C D X X X Z = AC + AD + A BC + B CD B B B I I I 2 I 3 I 4 I 5 I 6 I 7 8-to- MUX Z A C D Page 5

Implementing Logic Functions With Muxes An alternate method A C D Alternate Method Original Method Z = B Z = Z = B Z = B Z = Z = Z = B Z = B Z = Z = Why are they different? Z = Z = Z = Z = Z = Z = Page 5

Implementing Logic Functions With A B Muxes C D X X The original method used this grouping. X was determined to be. X Z = AC + AD + A BC + B CD Page 52

Implementing Logic Functions With A B Muxes C D X X The alternate method used this grouping. X was determined to be. X Z = AC + AD + A BC + B CD Page 53

Implementing Logic Functions With A B Muxes An alternate method C D X X The new method used this grouping. X was determined to be. X Which is right?? They both are!!!! Z = AC + AD + A BC + B CD Page 54

Implementing Logic Functions With Muxes Z (A,B,C,D) = Σ m(3,5,,,2,5) + Σ d (4,8,4) A B B I C D X X B' D D I I 2 4-to- MUX Z I 3 X F = A B CD = () B ()D = B D A C Page 55

Implementing Logic Functions With Muxes An alternate method A C Z = AC + AD + A BC + B CD Z = ()() + ()D + ()B() + B ()D = B Z = ()() + ()D + ()B() + B ()D = B D Z = ()() + ()D + ()B() + B ()D = D Z = ()() + ()D + ()B() + B ()D = Same as before! Page 56

Decoders Page 57

Decoder Symbol I I F F F2 F3

Decoder Behavior I I F F F2 F3 I I F F F2 F3 I I F F F2 F3 I I F F F2 F3 Key idea: The device decodes an input bus by asserting the appropriate output. This is called a 2:4 decoder (pronounced two-to-four )

2:4 Decoder A B 2:4 Decoder Q Q Q2 Q3 A B Q Q Q2 Q3 Page 6

2:4 Decoder A B 2:4 Decoder Q Q Q2 Q3 A B Q Q Q2 Q3 Q = A B = m Q = A B = m Q2 = AB = m2 Q3 = AB = m3 A decoder is a minterm generator Page 6

3:8 Decoder A B C Q Q Q2 Q3 Q4 Q5 Q6 Q7 3:8 Decoder Q = A B C Q = A B C Q2 = A BC Q7 = ABC = m = m = m2 = m7 Page 62

Implementing Logic With Decoders m 2:4 Decode m2 F = Σ m(, 2) 2:4 Decode m m2 F = Π M(, 2) 2:4 Decode M M3 F = Σ m(, 3) Historically, some decoders have come with inverted outputs Page 63

Uses of Decoders Decode 3-bit op-code into a set of 8 signals op2 op op 3:8 Decoder ADD SUB AND XOR NOT LOAD STORE JUMP Page 64

ROM: Read Only Memory Page 65

ROM: Read-Only Memory Can read values from it Cannot write to it Often used as lookup tables and called LUTs Page 66

ROM: Read-Only Memory Example: 8-entry ROM with -bit output 8x Each entry is bit Address Data 2 3 4 5 6 7 Addr In 8 x ROM Data Out Page 67

ROM: Read-Only Memory Example: 8-entry ROM with 5-bit output 8x5 Each entry is a 5-bit word Address Data 7 2 2 3 4 4 26 5 6 8 7 22 Addr In 8 x 5 ROM Data Out Page 68

Read Only Memory (ROM) Each minterm of each function can be specified 3 Inputs Lines A B C ROM 8 words x 5 bits F 4 F 3 F 2 F F 5 Outputs Lines A B C F 4 F 3 F 2 F F When you program a ROM, you are specifying this Page 69

ROM View # An addressable memory Send in address (addr) Receive data (d) stored at that location Can have multi-bit data addr2 addr addr 8 x 5 ROM d4 d3 d2 d d Page 7

ROM View #2 A hardware implementation of a truth table A B C F A B B C A B C 8 x ROM F F Page 7

ROM Two Different Views Both views are accurate Page 72

ROM Internal Structure n Input Lines. n:2 n decoder... Memory Array 2 n words x m bits... m Output Lines Page 73

ROM Memory Array V V V V V Resistor pulls column down to if no row wire drives it high. A B C 3:8 Decoder m =A B C m =A B C m 2 =A BC m 3 =A BC m 4 =AB C m 5 =AB C m 6 =ABC m 7 =ABC F = m + m3 F = m2 + m7 F 2 = m4 + m6 F 3 = m + m + m2 + m5 F 4 = m + m4 + m7 F 4 F 3 F 2 F F Diode - acts like a one-way conduit. Its presence causes the column to become when the row is decoded. Page 74

ROM Memory Array V V V V V A B C 3:8 Decoder m =A B C m =A B C m 2 =A BC m 3 =A BC m 4 =AB C m 5 =AB C m 6 =ABC m 7 =ABC F 4 F 3 F 2 F F A B C F 4 F 3 F 2 F F Page 75

ROM Technologies: Not Always Diode-Based PROM (Programmable Read Only Memory) Mask programmable Fusible Link EPROM (Erasable PROM) Can be erased with ultraviolet light EEPROM (Electronically Erasable PROM) Can be electrically erased Flash Can also be electronically erased Available in very high densities Used in cell phones, MP3 players, cameras, and more! The details of these technologies are beyond the scope of this class. Page 76

Using a ROM For Logic F = AB + A BC G = A B C + C H = AB C + ABC + A B C A B C F G H Page 77

Using a ROM For Logic F = AB + A BC G = A B C + C H = AB C + ABC + A B C A B C F G H Page 78

Using a ROM For Logic F = AB + A BC G = A B C + C H = AB C + ABC + A B C A B C F G H Just fill out the truth table What size ROM is this? CAD tools usually do the rest Page 79

Using ROM for Combinational Logic A B C D Q ROM6X A a3 B a2 C a INIT=???? D a ROM6X is a Xilinx cell Insert it into schematics like any other primitive Set its contents by double-clicking on inserted cell in schematic. Page 8

Using ROM for Combinational Logic A B C D Q 8 4 D A B C D ROM6X a3 a2 a a Note that ABCD = is the least significant bit INIT=84D Page 8

ROM Types in Xilinx FPGAs ROM6X = 4-input LUT Specify INIT contents with 4-digit HEX value ROM32X = 5-input LUT Specify INIT contents with 8-digit HEX value Page 82

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