Introduction to PSP MOSFET Model G. Gildenblat, X. Li, H. Wang, W. Wu Department of Electrical Engineering The Pennsylvania State University, USA and R. van Langevelde, A.J. Scholten, G.D.J. Smit and D.B.M. Klaassen Philips Research Laboratories, The Netherlands
OUTLINE Origin and General Features of PSP Project Technical Details Fitting Examples NQS Simulation Examples Conclusions
Key Objectives of PSP Project Merge the best features of the two most advanced Surface-Potential- Based Models (SPBM): SP and MM11 Provide the modeling capabilities down to 65nm node and beyond (in the nearest future) Strengthen the infrastructure of the SPBM
What Makes PSP Project Possible Similar approach to compact modeling at PSU and Philips Research Similar modular structure of SP and MM11 Extension of Symmetric Linearization Method beyond SP and MM11
Structure of PSP Model Global Parameter Set Local Parameter Set Core Intrinsic Extrinsic Support Modules PSP JUNCAP NQS
Worth Noting PSP is far more than mixture of the best SP and MM11 modules. For example, the following PSP submodels go beyond both SP and MM11 versions. NQS Gate current
General Features of PSP (I) Physical surface-potential-based formulation in both intrinsic and extrinsic model modules Physical and accurate description of the accumulation region Inclusion of all relevant small-geometry effects Modeling of the halo implant effects, including the output conductance degradation in long devices Coulomb scattering and non-universality in the mobility model Non-singular velocity-field relation enabling the modeling of RF distortions including intermodulation effects. Complete Gummel symmetry
General Features of PSP (II) Mid-point bias linearization enabling accurate modeling of the ratio-based circuits (e.g. R2R circuits) Quantum-mechanical corrections Correction for the polysilicon depletion effects GIDL/GISL model Surface-potential-based noise model including channel thermal noise, flicker noise and channelinduced gate noise. Advanced junction model including trap-assisted tunneling, band-to-band tunneling and avalanche breakdown Spline-collocation-based NQS model including all terminal currents Stress model
OUTLINE Origin and General Features of PSP Technical Details Fitting Examples NQS Simulation Examples Conclusions
Surface Potential without Minority Carriers (for use in S/D overlap regions) 0.1 40 Surface Potential (V) 0.0-0.1-0.2 Numerical Solution Analytical Approximation -40-0.3-1.5-1.0-0.5 0.0 0.5 1.0 1.5 V gs (V) 20 0-20 Error (pv)
PSP: ψ calculation s V SB =1V with F PSP (u)
Accuracy of ψ approximation s
Mobility PSP uses SP mobility model. It includes universal dependence on the vertical effective field E eff and the deviations from the universality associated with the Coulomb scattering. µ = ( E ) eff MU0 µ THEMU 1+ MUE + x q CS q 2 bm ( ) bm + q im 2
Drift Velocity PSP uses MM11 drift velocity model that is conducive to the highly accurate description of saturation region including high order drain conductances. V d = µ E ( E E ) 2 1 + y c This form also assures compliance with Gummel symmetry test and non-singular model behavior at V ds = 0. y
Drain Current I d = ( W L)( q ) 2µ + αφ ψ im 1+ 1+ 2 ( ψ EL) 2 c t ; ψ = ψ ψ sd ss No need for correction factors used in older SPBMs to reproduce proper behavior for small V ds Subthreshold region is accurately modeled through ψ Velocity saturation is introduced in such a way that its effects automatically vanish in subthreshold.
Lateral Field Gradient f = ε qn ψ y 1 s sub s ( )( 2 2) Most SPBMs use GCA: HiSIM: f = f ( L,W) SP, PSP: f = f f = 1 ( L, W, V ) gs, V sb, Vds
Symmetric Linearization (I) Symmetric Linearization (I) ( ) m i s q im q ψ ψ α = ( ) ( ) + = m y y HL H y m ψ ψ ψ 2 1 1 + = H L y m 4 1 2 ψ These equations are the same in SP and PSP
Symmetric Linearization (II) Variable H in PSP is defined differently than in SP Without velocity saturation: ( ) H = q α + φ 0 im t In SP: In PSP: ( ) 1 H = H 1 + δξ ; ξ= ψ EcL SP 0 0 1 1 2 2 2 1 1 1 HPSP = hh0 1 + h ; h= + 1+ 2 2 2 2 ( ξ ) ( ξ )
Normalized Quasi-Static Charges Using Ward-Dutton partition Q Q Q D I G q im α ψ ψ ψ = + 1 2 2 12 2H 20H PSP 2 α ψ = qim 12H PSP 2 ψ = Voxm 12H PSP 2 PSP Q S = QI QD QB = QG QI
Verification of Symmetric Linearization Normalized Transcapacitances 0.9 Linearized CSM Original CSM 0.6 0.3 0.0 C gg C sg C dg -1 0 1 2 3 4 V gs (V) V ds = 2V, V bs = 0 V, V fb =-1V Cbg
PSP Noise Model Includes thermal channel noise, 1/f noise, channelinduced gate noise and shot-noise in the gate-current Thermal channel noise automatically becomes shot noise below threshold, so it is not necessary to model this phenomena separately Rigorously includes fluctuations in the velocity saturation term. Based on MM11 formulation Takes advantage of symmetric linearization to simplify expressions for the spectral densities Experimentally verified
Example Drain (S id ) and gate (S ig ) current noise spectral densities
Gate Current Model Based on Tsu-Esaki formulation, includes supply function Includes contributions from both the channel and the overlap regions. Automatic scaling (no scaling parameters) SP model extended MM11 formulation of I gate by including supply function. PSP version is based on SP but is further developed Experimentally verified using several processes from four different production facilities
Example V sb =0V, V ds =0.025, 0.042, 0.61 and 1V
OUTLINE Origin and General Features of PSP Technical Details Fitting Examples (Global fit, no binning) NQS Simulation Examples Conclusions
I D -VGS for long/wide device I D ( µ A) 10 V 8 BS = 0.. 1.2V 6 4 2 V DS = 0. 05 V 0.0 0.4 0.8 1.2 V GS (V) I D (A) 10-6 10-7 10-8 10-9 10-10 10-11 10-12 V DS = 0. 05 V 0.0 0.4 0.8 1.2 V GS (V) Philips 90nm LP-process NMOS W/L = 10µm/10µm
g m and g m /I D for long/wide device g m ( µ A/V) 15 10 5 V BS = 0.. 1.2V g m / I D (1/V) 40 30 20 10 0.0 0.4 0.8 1.2 V GS (V) V DS = 0. 05 V V DS = 0. 05 V 10-12 10-11 10-10 10-9 10-8 10-7 10-6 I D (A) Philips 90nm LP-process NMOS W/L = 10µm/10µm
I D -VDS for long/wide device 0.20 0.15 V GS = 0.34.. 1.2V V BS = 0V 10-4 I D (ma) 0.10 0.05 g DS (A/V) 10-5 10-6 0.0 0.4 0.8 1.2 V DS (V) 10-7 0.0 0.4 0.8 1.2 V DS (V) Philips 90nm LP-process NMOS W/L = 10µm/10µm
I D -VGS for short/narrow device I D ( µ A) 5 4 3 2 1 V BS = 0.. 1.2V V DS = 0. 05 V 0.0 0.4 0.8 1.2 V GS (V) I D (A) 10-6 10-7 10-8 10-9 10-10 10-11 10-12 10-13 10-14 10-15 V DS = 0. 05 V 0.0 0.4 0.8 1.2 V GS (V) Philips 90nm LP-process NMOS W/L = 110nm/100nm
g m and g m /I D for short/narrow device 8 V BS = 0.. 1.2V 40 6 30 g m ( µ A/V) 4 2 g m / I D (1/V) 20 10 V DS = 0. 05 V 0.0 0.4 0.8 1.2 V GS (V) 10-15 10-14 10-13 10-12 10-11 10-10 V DS = 0. 05 V 10-9 10-8 10-7 10-6 I D (A) Philips 90nm LP-process NMOS W/L = 110nm/100nm
I D -VDS for short/narrow device I D (ma) 0.06 0.04 0.02 V GS = 0.34.. 1.2V V BS = 0V g DS (A/V) 10-4 10-5 0.0 0.4 0.8 1.2 V DS (V) 10-6 0.0 0.4 0.8 1.2 V DS (V) Philips 90nm LP-process NMOS W/L = 110nm/100nm
CV Characteristics W/L = 800µm/90nm, V ds =0, V sb =0
OUTLINE Origin and General Features of PSP Technical Details Fitting Examples NQS Simulation Examples Conclusions
PSP NQS Model Unified model for AC and transient simulations Spline-collocation-based Consistent with QS, includes all terminal currents, and all operation regions Verified by comparison with experiments and channel segmentation method Includes all major small-geometry effects Similar to SP but further developed
Subcircuit-Based Implementation The differential equations to be solved: duk = f (,..., k u1 un) dt Using sub-circuit approach (for N=2): (, ), (, ) f = f V V f = f V V 1 1 1 2 2 2 1 2 V 1 =u 1 V 2 =u 2 R C R Cf 1 Cf 2 C R is sufficiently large so that the current flow through it is negligible
Extended Operation Range 2 Currents (ma) 1 0-1 IG IB -3V 0.6ns 3V 3V QS NQS Currents (ma) 2 1 0-3V 0.6ns 3V 3V IS ID QS NQS -2 0.0 0.2 0.4 0.6 0.8 1.0 Time (ns) -1 0.0 0.2 0.4 0.6 0.8 1.0 Time (ns)
Mobility Degradation Effects 1.6 3V 3V Currents (ma) 1.2 0.8 0.4 0.0-0.4 0V 0.3ns Symbols: NQS QS TCAD constant µ field-dependent µ 0.0 0.2 0.4 0.6 Time (ns)
RF Modeling 90-nm Philips low-power technology Ground-signal-ground configuration; common source bulk; pad open-short-dedicated open de-embedding (Tiemeijer et al.) L=3 µm; Wfing=10 µm; Nfing=6; MULT=2 i.o.w. total width=120 µm markers: measurements dashed lines: PSP-QS solid lines: PSP-NQS
PSP, SWNQS=5 Re[Y 11] V DS =1.5 V V GS =0.5 V V GS =1.0 V V GS =1.5 V PSP, SWNQS=9 MM11, 5 segments
PSP, SWNQS=5 Cgg V DS =1.5 V V GS =0.5 V V GS =1.0 V V GS =1.5 V PSP, SWNQS=9 MM11, 5 segments
The Killer NOR Gate Vdd A B X MP1 MP2 Q MN1 MN2 MP1 W/L=8.0/10.0um MP2, MN1, MN2 W/L=8.0/3.0um
Node Voltages (V) 1.6 1.2 0.8 0.4 0.0 V(A) V(B) V(Q) NQS V(Q) QS 0 50 100 150 200 Time (ns)
Node Voltage at X (V) 0-5 -10 QS NQS 0 50 100 150 200 Time (ns) PSP Default Parameter Set
Node Voltage at X (V) 5 0-5 -10-15 -20 QS NQS 0 50 100 150 200 Time (ns) Generic 90nm Process Parameter Set
Acknowledgement The Authors are grateful to C. McAndrew, J. Watson, P. Bendix, D. Foty, B. Mulvaney, N. Arora, W. Grabinski, J. Victory, G. Workman and S. Veeraraghavan for numerous stimulating discussion of the subject and to D. Gloria and S. Boret for kindly providing the 90 nm RF data. PSP development at PSU was supported in part by SRC, LSI Logic, Freescale Semiconductor, IBM and by simulation tools provided by Freescale Semiconductor, Mentor Graphics and Agilent.
PSP Code and Documentation http://www.semiconductors.philips.co /Philips_Models/mos_models/psp/index.html documentation of the model and parameter extraction strategy Verilog-A code C-code Modules that can be directly linked to Spectre and ADS
Conclusions The commonality between SP and MM11 has been used to merge them into a powerful new model PSP PSP has been extensively tested on several 90 nm nodes PSP satisfies all the requirements for a next generation compact MOSFET model PSP-SOI is in progress