Applicat Nte, V., July 006 MOSFET Pwer Lsses Calculat sg the ata- Sheet Parameters by r. ušan Gravac, Marc Pürschel, Andreas Kiep Autmtive Pwer N e v e r s t p t h i n k i n g.
MOSFET Cnverter Lsses Table f Cntent Abstract...3 MOSFET and ide Lsses...3. Cnduct Lsses...3.. Sn - Takg the Temperature and Prduct Variats t Accunt...5. Switchg Lsses...6.. Switch-n transient...6.. Switch-ff transient...9..3 Switchg Energies and Lsses...0.3 Lss Balance...0 3 Applicat Specific Parameters... 3. Step-dwn (Buck Cnverter... 3. Step-up (Bst Cnverter... 3.3 C Mtr rive...3 3.4 Three-Phase AC Mtr rive...6 3.5 Switched eluctance Mtr rive...8 3.6 Piez-Electric Actuatr...9 4 Cnclus...0 5 Abbreviats... Applicat Nte 006-07-3
MOSFET Cnverter Lsses Abstract The aim f this Applicat Nte is t prvide a mathematical tl fr the calculat f pwer lsses MOSFET-based pwer electrnics cnverters used autmtive applicats. After a general discuss n pwer lsses calculat usg the data-sheet parameters, the typical applicats will be reviewed rder t extract the applicat specific parameters imprtant fr the lss balance. MOSFET and ide Lsses Pwer lsses (P l any cmpnent peratg the itch-mde can be divided three grups: a Cnduct lsses (P c b Switchg lsses (P c Blckg (leakage lsses (P b, nrmally beg neglected Therefre: P P + P + P P + P l c b c. Cnduct Lsses Cnduct lsses pwer MOSFET can be calculated usg an MOSFET-apprximat with the drasurce n-state resistance ( Sn : u S ( i ( i i Sn u S and i are dra-surce vltage and the dra current, respectively. The typical Sn can be read frm the data-sheet diagram, as shwn Fig., where is the MOSFET n-state current as defed by the applicat. Figure ra surce resistance as a funct f dra current (at T J 5 C 3
MOSFET Cnverter Lsses Therefre, the stantaneus value f the MOSFET cnduct lsses is: p CM u S i Sn i ntegrat f the stantaneus pwer lsses ver the itchg cycle gives an average value f the MOSFET cnduct lsses: P CM T pcm dt ( T T 0 T 0 Sn i dt Sn rms where rms is the rms value f the MOSFET n-state current. The cnduct lsses f the anti-parallel dide can be estimated usg a dide apprximat with a series cnnect f C vltage surce (u 0 representg dide n-state zer-current vltage and a dide n-state resistance (, u beg the vltage acrss the dide and i F the current thrugh the dide: u ( i u0 + i F These parameters can be read frm the diagrams the MOSFET datasheet as shwn fig.. n rder t take the parameter variat t accunt, and thus t have a cnservative calculat, the u 0 value read frm the diagram have t be scaled with (u max /u typ. Thse exact values can be read frm the datasheet tables, but fr an engeerg calculat a typical safety marg value f (0%-0% can als be used. Figure ide resistance as a funct f the dide current The stantaneus value f the dide cnduct lsses is: p C u i F u 0 i + i F F f the average dide current is Fav, and the rms dide current is Frms, the average dide cnduct lsses acrss the itchg perid (T /f are: P C T pc dt ( u T T 0 T 0 0 i F + i F dt u 0 Fav + Frms 4
MOSFET Cnverter Lsses.. Sn - Takg the Temperature and Prduct Variats t Accunt The prcedure fr Sn determat, shwn figure, refers t the Sn typical values. While this prcedure shuld be satisfyg fr the majrity f applicats, the Sn value can be calculated by takg t accunt the temperature and prduct variats. t can be dne usg fllwg equat: Sn ( T J TJ 5 C α SnMAX (5 C + 00 where T J is the junct temperature and SnMAX (5 C is the maximum value f Sn at 5 C, which can be read frm the prduct summary table the data-sheet as shwn the fig. 3. The temperature cefficient α can be calculated the fllwg manner: Tw sets f values (T J, Sn and (T J, Sn can be read frm the data sheet as shwn fig. 4. These values can be used with the last equat t determe α. Figure 3 eadg SnMAX (5 C frm the data-sheet Figure 4 eadg T J / Sn frm the data-sheet 5
MOSFET Cnverter Lsses. Switchg Lsses The circuit fr the examat f the MOSFET itchg lsses is presented fig. 5. t is a sgle-quadrant chpper supplyg an ductive type lad. The MOSFET is driven frm the driver circuit, prvidg a vltage r at its utput. The MOSFET ternal dide is used as a free-wheelg dide, because the majrity f applicats, such as 3-phase AC mtr drives, C-mtr drives, synchrnus C/C cnverters, etc., the pwer electrnics cnverter cnsists f ne r mre MOSFET-based half-bridges. f an external freewheelg dide is used, the calculats are still valid, prvided the dide parameters are taken frm the dide data-sheet. Figure 5 MOSFET chpper with an ductive lad Fr the engeerg calculats f the pwer lss balance, a lear apprximat f the MOSFET itchg prcess is sufficient and, as will be shwn later, presents the wrst case calculat. The idealised itchg prcess f the pwer MOSFET is presented Fig. 6. The uppermst part (A presents the gate vltage (u GS and current (i G ; the next ne (B shws the dra-surce vltage (u S and the dra current (i withut takg the reverse recvery f the free-wheelg dide t accunt. The part C gives a qualitative verview f the pwer lsses, while the part shws the reverse-recvery effects n the itchg lsses... Switch-n transient river circuit changes its state frm 0V t r, the gate vltage rises t the threshld vltage ( GS(th, with the time-cnstant defed by the gate resistr and the equivalent MOSFET put capacitance (CissC G +C GS. ntil the gate vltage reaches the GS(th, the utput des nt change. After the GS(th has been reached, the dra current rises and takes ver the lad current. The wrst case value f the current rise-time (tri between zer and n (defed by the applicat can be read frm the MOSFET data-sheet, as shwn fig. 7. urg the current rise-time, the free-wheelg dide is still cnductg and the dra-surce vltage is. n rder fr the dide t itch ff, all the mrity carriers stred it have t be remved (see fig. 6. This reverse-recvery current has t be absrbed by the MOSFET, causg addital pwer lsses. The wrst-case values f the reverse-recvery charge (Qrr and durat (trr, which will be used the pwer lss calculat, can aga be read frm the MOSFET data-sheet (see fig. 8 6
MOSFET Cnverter Lsses Figure 6 Switchg transients f the pwer MOSFET 7
MOSFET Cnverter Lsses Figure 7 eadg the current rise- (red and fall-time (blue frm the data-sheet Figure 8 eadg the reverse recvery time (red and charge (blue frm the data-sheet After the dide has been itched ff, the dra-surce vltage is fallg frm u S t its n-state value u S Sn n. The Miller effect takes place and the gate-surce vltage is clamped at the u GS (plateau (see fig. 9. The slpe f the dra-surce vltage is dictated thrugh the gate current flwg thrugh the gate-dra capacitance (C G Crss. n rder t calculate the vltage fall-time (tfu with a reasnable accuracy, the nn-learity f the gate-dra capacitance has t be taken t accunt. The typical dependence f the gate-dra capacitance n the dra-surce vltage is shwn the fig. 0. Such nn-learity can nt be easily crprated t the engeerg calculats. That is why a tw-pt apprximat is used. t is suppsed that if the dra-surce vltage is the range u S [ /, ], then the gate-dra capacitance takes value f C G C G (. On the ther hand, if the dra-surce vltage is the range u S [0V, /], then the gate-dra capacitance takes value f C G C G ( Sn n. The way t determe thse capacitances is shwn fig. 0. The dra-surce vltage durg the fall time, the tw-pt apprximat beg taken t accunt, is shwn fig. 6B with the dtted le. Sce this apprximat is used nly t determe the vltage fall time (as well as the rise time durg itch ff and the dra-surce vltage is assumed t have the lear frm (slid le fig. 6B, it becmes clear that this analysis presents the wrstcase fr the itchg lsses calculat. The gate current durg tfu can be calculated as: Gn r ( plateau G The vltage fall time can nw be calculated as a median f the fall times defed thrugh the gate current and the capacitances C G and C G. tfu + tfu tfu where: 8
MOSFET Cnverter Lsses tfu ( Sn n C G Gn ( Sn n G ( r C G ( plateau tfu ( Sn n C G Gn ( Sn n G ( r C G ( plateau Figure 9 eadg the plateau vltage frm the data-sheet Figure 0 Tw-pt representat f the gate-dra capacitance.. Switch-ff transient Switch-ff prcess crrespnds t the itchg-n prcess f the MOSFET the reverse rder and will thus nt be discussed detail. Tw imprtant differences are: N reverse recvery takes place The gate current and the vltage rise time can be expressed as: Gff ( plateau G 9
MOSFET Cnverter Lsses tru + tru tru tru ( tru ( Sn Sn n n C G ( Sn n Gff C G ( Sn n Gff G C G G ( plateau C G ( plateau..3 Switchg Energies and Lsses Accrdg t previus cnsiderats, the wrst case turn-n energy lsses pwer MOSFET (E nm can be calculated as the sum f the itch-n energy withut takg the reverse recvery prcess t accunt (E nmi and the itch-n energy caused by the reverse-recvery f the free-wheelg dide (E nmrr : E nm tri+ tfu u 0 S i dt E nmi + E nmrr n tri + tfu + Q rr The peak f the reverse-recvery current can be calculated as: Frrpeak Q trr rr Turn-n energy the dide cnsists mstly f the reverse-recvery energy (E n : E n tri+ tfu u 0 i F dt E nrr Q 4 rr rr where rr is the vltage acrss the dide durg reverse recvery. Fr the wrst case calculat this vltage can be apprximated with a supply vltage ( rr. The itch-ff energy lsses the MOSFET can be calculated the similar manner. The itch-ff lsses the dide are nrmally neglected (E ff 0. Therefre: E ffm tru+ tfi u 0 S i dt ff tru + tfi The itchg lsses the MOSFET and the dide are the prduct f itchg energies and the itchg frequency (f : P M ( E + E f nm ffm P ( E + E n ff f E n f.3 Lss Balance Pwer lsses the MOSFET and the free-wheelg dide can be expressed as the sum f the cnduct and itchg lsses givg: P M P + P + ( E + E CM M Sn rms nm ffm f P P C + P u 0 Fav + Frms + E n f 0
MOSFET Cnverter Lsses 3 Applicat Specific Parameters n the fllwg text the typical applicats will be revisited tgether with the typical signal wavefrms necessary fr the pwer lss balance calculat. 3. Step-dwn (Buck Cnverter Figures and present the tplgy and the typical signals the step-dwn (buck cnverter. Figure Step-dwn cnverter tplgy Figure Step-dwn cnverter typical signals nput parameters fr the calculat: nput vltage (, utput vltage (, utput pwer (P, ductr value (L, itchg frequency (f. Output current: P uty cycle cntuus cnduct mde: Output current ripple:
MOSFET Cnverter Lsses ( L f The parameters needed fr the lss calculat can be determed accrdg t previusly calculated values as: n ff rms + ( Fav ( Frms ( ( 3. Step-up (Bst Cnverter Figures 3 and 4 present the tplgy and the typical signals the step-up (bst cnverter. Figure 3 Step-up cnverter tplgy Figure 4 Step-up cnverter typical signals
MOSFET Cnverter Lsses nput parameters fr the calculat: nput vltage (, utput vltage (, utput pwer (P, put pwer (P, ductr value (L, itchg frequency (f. nput current: P uty cycle cntuus cnduct mde: nput current ripple: L f The parameters needed fr the lss calculat can be determed accrdg t previusly calculated values as: n ff rms + ( Fav ( Frms ( ( 3.3 C Mtr rive Figures 5 and 6 present the tplgy and the typical signals the sgle-quadrant chpper fr the C mtr drive. Figure 5 Sgle-quadrant C mtr drive 3
MOSFET Cnverter Lsses 4 Figure 6 Sgle-quadrant C mtr drive typical signals nput parameters fr the calculat: nput vltage (, utput vltage (, utput pwer (P, armature ductr value (L, armature resistance value (, mtr back-emf value (E, itchg frequency (f. Average value f the utput current: P uty cycle cntuus cnduct mde: Mimum utput current: E e e L f L f m Maximum utput current: E e e L f L f max Output current ripple: max m The parameters needed fr the lss calculat can be determed accrdg t previusly calculated values as: n
MOSFET Cnverter Lsses ff rms + ( Fav ( Frms ( ( Figures 7 8 present the tplgy and the typical signals the fur-quadrant chpper fr the C mtr drive. Fig. 8 shws the case f the biplar PWM, while the fig. 9 shws the case f the uniplar PWM. Apprpriate values can be determed fllwg the same prcedure as fr the sgle-quadrant chpper, takg t accunt that fr the biplar PWM the vltage excurs n the lad is. Figure 7 Fur-quadrant C mtr drive Figure 8 Fur-quadrant C mtr drive typical signals with biplar PWM 5
MOSFET Cnverter Lsses Figure 9 Fur-quadrant C mtr drive typical signals with uniplar PWM 3.4 Three-Phase AC Mtr rive Figures 9 and 0 present the tplgy and the typical signals the three-phase verter fr the AC mtr (permanent magnet synchrnus, brushless C, duct mtr drive. Typical applicats are: electric pwer steerg (EPS, Starter-Generatr (Alternatr, fans, blwers, HVAC etc. Figure 0 Three-phase AC mtr drive nput parameters fr the calculat: nput vltage (, utput le-t-le vltage ( r utput phase vltage ( an, rms value f the utput current ( rms r utput apparent pwer (S 3 an rms, mtr displacement factr (csφ, equivalent statr ductance (L, itchg frequency (f, utput (mtr electrical frequency f and an verter amplitude mdulat dex m a Output current ripple: a ( L f Peak value f the utput current: rms 6
MOSFET Cnverter Lsses MOSFET cnduct lsses: P m ( + 8 a CM Sn rms Sn ide Cnduct lsses: P u u csφ 3π m ( π csφ + 8 m ( 8 a a C 0 Fav + Frms 0 csφ 3π n rder t fd a simple slut fr the itchg lss calculat, it is suppsed that the lsses generated the verter ne half-wave f the utput frequency (/( f crrespnd t the lsses generated if stead f AC utput current a C equivalent utput current is applied. The equivalent C utput current value is: π C This value can be used fr [ n, ff ] the itchg lss calculat as described detail the chapter.3. Figure Three-phase AC mtr drive typical signals 7
MOSFET Cnverter Lsses 3.5 Switched eluctance Mtr rive Figures, 3 and 4 present the tplgy and the typical signals the tw-quadrant chpper fr ne phase f the itched reluctance mtr drive. The cmplete cnverter cnsists f mre tw-quadrant cnverters, the number f which depends n the number f the mtr phases. The prcedure fr the pwer lss calculat is practically the same as with the C mtr drive and therefre the same equats can be used. Figure Tw-quadrant cnverter fr ne phase wdg f the itched reluctance mtr drive Figure 3 Switched reluctance mtr drive typical signals with biplar PWM 8
MOSFET Cnverter Lsses Figure 4 Switched reluctance mtr drive typical signals with uniplar PWM 3.6 Piez-Electric Actuatr Figures 5 and 6 present the tplgy and the typical signals the tw-quadrant C/C cnverter fr the piez-electric actuatr, used, fr example, direct ject systems. The prcedure fr the pwer lss calculat is the same as with the step-dwn (buck cnverter durg chargg and the same as with the step-up (bst cnverter durg the dischargg. Namely, while the actuatr is chargg, the system behaves like a step-dwn cnverter (MOSFET and ide are active and the energy flws frm t C A and the energy flw reverses while the C A is dischargg (MOSFET and ide are active. Figure 5 Tw-quadrant cnverter fr piez-electric actuatr 9
MOSFET Cnverter Lsses Figure 6 Cnverter fr piez-electric actuatr typical signals 4 Cnclus This Applicat Nte presented a mathematical tl fr the calculat f pwer lsses MOSFET-based pwer electrnics cnverters used autmtive applicats. Mathematical mdel fr the pwer lss balance calculat usg the data-sheet parameters was presented. The typical autmtive applicats were reviewed and the applicat specific parameters imprtant fr the lss balance were extracted. 0
MOSFET Cnverter Lsses 5 Abbreviats P l P c P P b p CM P CM p C P CM P M P P M P P E nm E nmi E nmrr E n E ffm u S u u 0 r GS GSth Pwer lsses Cnduct lsses Switchg lsses Blckg (leakage lsses nstantaneus value f the MOSFET cnduct lsses Average value f the MOSFET cnduct lsses nstantaneus value f the dide cnduct lsses Average value f the dide cnduct lsses MOSFET itchg lsses ide itchg lsses MOSFET lsses ide lsses Cnverter utput pwer MOSFET itch-n energy MOSFET itch-n energy withut takg the reverse recvery prcess t accunt MOSFET itch-n energy caused by the reverse-recvery f the free-wheelg dide ide energy durg MOSFET itch-n transient MOSFET itch-ff energy ra-surce vltage Vltage acrss the dide ide n-state zer-current vltage river utput vltage Gate-surce vltage Gate-surce threshld vltage (plateau Plateau vltage rr u L i rms i F Fav Frms rr Frrpeak Vltage acrss the dide durg reverse recvery Cnverter supply (C bus vltage Cnverter put vltage Cnverter utput vltage Vltage acrss the lad ra current MS value f the dra current Current thrugh the dide Average dide current MS value f the dide current everse recvery current Peak value f the dide reverse recvery current
MOSFET Cnverter Lsses G i L Sn G C GS C G C S Qrr L Tj α T f tri tfi tru tfu trr Gate current Lad current Cnverter put current Cnverter utput current ra surce n-state resistance ide n-state resistance Gate resistr Gate-surce capacitance Gate-dra capacitance ra-surce capacitance everse recvery charge Lad resistr Lad nductance Junct temperature Temperature cefficient Switchg perid Switchg frequency Current rise time Current fall time Vltage rise time Vltage fall time everse recvery time uty cycle
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