How To Understand An Outut Stage

Transcription

1 CHATE 3 OUTUT STAGES AND OE AMFES Chapter Outline 3. Classificatin f Output Stages 3. Class A Output Stage 3.3 Class B Output Stage 3.4 Class AB Output Stage 3.5 Biasing the Class AB Circuit 3.6 CMOS Class AB Output Stages NTUEE Electrnics 3-

2 3. CASSFCATONS OF OUTUT STAGES Output Stages Class A utput stage: Bias current is greater than the magnitude f the signal current Cnductin angle is 360 Class B utput stage: Biased at zer dc current Cnductin angle is 80 Anther transistr cnducts during the alternate half-cycle Class AB utput stage: An intermediate t class between A and B Biased at a nnzer dc current much smaller than the peak current f the signal Cnductin angle is greater than 80 but much smaller than 360 Tw transistrs are used and currents are cmbined at the lad Class C utput stage: Cnductin angle is smaller than 80 The current is passed thrugh a parallel C netwrk t btain the utput signal Class A, B and AB are used as utput stage f p amps Class AB amplifiers are preferred fr audi pwer amplifier Class C amplifiers are usually used at higher frequencies NTUEE Electrnics 3-

3 Cllectr current waefrms fr the transistrs perating in different classes The classificatin als applies fr utput stages with MOSFETs NTUEE Electrnics 3-3

4 3. CASS A OUTUT STAGE Transfer Characteristics biased with a cnstant current supplied by O BE O max CC CEsat Omin CC CE sat r O min CC CEsat Signal aefrms The utput swing frm CC t CC fr = CC The instantaneus pwer dissipatin in : D = CE i C NTUEE Electrnics 3-4

5 wer Dissipatin wer dissipatin fr = CC : The maximum instantaneus pwer dissipatin in is CC This is equal t the pwer dissipatin in with n input signal applied quiescent pwer dissipatin) The transistr much be able t withstand a cntinuus pwer dissipatin f CC wer dissipatin fr unladed case: Maximum pwer dissipatin ccurs when O = CC The maximum pwer dissipatin in is CC wer dissipatin fr an utput shrt circuit: A psitie input may lead t an infinite lad current The utput stages are usually equipped with shrt-circuit prtectin t guard against such a situatin wer dissipatin in : cnducts a cnstant current Maximum ltage acrss the cllectr and the emitter is CC Maximum instantaneus pwer dissipatin in is CC A mre significant quantity fr design purpses is the aerage pwer dissipatin f CC NTUEE Electrnics 3-5

6 wer Cnersin Efficiency The pwer cnersin efficiency is defined as lad pwer) S supply pwer) The lad pwer ) with an sinusid utput with a peak alue f is ) The ttal aerage supply pwer is S = CC The cnersin efficiency is gien by 4 CC 4 CC Maximum efficiency 5%) is btained when CC Class A utput stage is rarely used in high-pwer applicatins The efficiency achieed in practice is usually in the range f 0% t 0% NTUEE Electrnics 3-6

7 3.3 CASS B OUTUT STAGE Circuit Operatin Bth transistrs are cut ff when is zer O is zer One f the transistr turns n as exceeds 0.5 O fllws The circuit perates in a push-pull fashin The class B stage is biased at zer current and cnducts nly when the input signal is present Transfer Characteristic There exists a range f input centered arund zer where bth N and are ff The transfer characteristic shws a dead band which results in the crsser distrtin at the utput NTUEE Electrnics 3-7

8 wer Cnersin Efficiency The aerage lad pwer by neglecting the crss-er distrtin is The current drawn frm each supply cnsists f half-sine waes f peak amplitude The aerage pwer drawn frm each f the tw pwer supply is S S CC The ttal supply pwer is S CC The efficiency i is gien by Maximum efficiency is btained when the utput swing is maximized CC ): % The maximum aerage pwer aailable frm a class B stage is 4 CC NTUEE Electrnics 3-8

9 wer Dissipatin The quiescent pwer dissipatin f the class B stage is zer unlike class A) The aerage pwer dissipatin f the class B stage is gien by D = S N and must be capable f safely dissipating half f D D depends n the utput swing and the wrst-case pwer dissipatin is gien by D CC CC D CC D max max The maximum pwer dissipatin f N and ccurs at = 50%: DN max Dmax CC NTUEE Electrnics 3-9

10 educing Crsser Distrtin The distrtin can be reduced by emplying a high-gain p amp and erall negatie feedback The 0.7 dead band is reduced by a factr f the dc gain f the p amp The slew rate limitatin f the p amp may cause the alternate turning n and ff t be nticable Single-Supply Operatin The class B stage can be perated frm a single supply The lad is capacitielu cupled The deriatins are directly applicable with supply f CC NTUEE Electrnics 3-0

11 Circuit Operatin 3.4 CASS AB OUTUT STAGE Crss-er distrtin can be eliminated by biasing N and at a small nnzer current The bias current i N = i = = s exp BB T ) hen ges psitie by a certain amunt: O BEN T BB i ln N S BE T BB i ln S BEN T ln S i i N i N i i The lad current is supplied by N which acts as the utput emitter fllwer N will be cnducting a current that decreases as O increases negligible fr large O ) acts as the utput emitter fllwer when ges negatie The pwer prperties are almst identical t thse deried fr the class B stage 0 NTUEE Electrnics 3-

12 Output esistance The utput resistance is estimated by assuming the surce supply ideal T ut ren re in i T T i i N The utput resistance remains apprximately cnstant in the regin arund = 0 The utput resistance decreases at larger lad currents NTUEE Electrnics 3-

13 Biasing Using Dides 3.5 BASNG THE CASS AB CCUT The bias ltage BB is generated by passing a cnstant current BAS thrugh a pair f dides The dides need nt t be large deices uiescent current in N and will be = n BAS where n is the rati f the areas f the emitter junctin f the BJT and the junctin area f the dides BN increases frm N t N fr a psitie O BAS has t be greater than the BN fr maximum case The rati n cannt be a large number as n = BAS This biasing arrangement prides thermal stabilizatin f the quiescent current in the utput stage Cllect current increases with temperature fr a fixed BE Heat frm pwer dissipatin increases with current sitie feedback may cause thermal runaway BB decreases at the same rate f BEN + EB Thermal runaway is alleiated with clse thermal cntact NTUEE Electrnics 3-3

14 Biasing Using the ltage Multiplier The class AB stage can be biased by BE multiplier BB BE BE ) The alue f BE is determined by the prtin f BAS that flws thrugh the cllectr f C BE BAS C T ln T ln C S BAS The quiescent current can be adjusted by the resistance alue NTUEE Electrnics 3-4

15 3.6 CMOS CASS AB OUTUT STAGES The Classical Cnfiguratin Circuit peratin Fr the case and are matched and and N are matched: ) ) k k p n BAS tp tn SG GS GG p p n n tp tn SG GSN GG k k ) ) ) ) ) ) p p p n n n BAS k k k k NTUEE Electrnics 3-5 Fr the case and are matched and and N are matched: A drawback f the CMOS class AB circuit is the restricted range f utput ltage swing where ON is the erdrie ltage f N when it is supplying i max and O is the erdrie ltage f when sinking the maximum negatie alue f i ) ) n BAS ON tn BAS O DD O max min O tp O SS O

16 An Alternatie Circuit Using Cmmn-Surce Transistrs The allwable utput range can be increased by replacing the surce fllwers with a pair f cmplementary transistrs in the cmmn-surce cnfiguratin supplies the lad current when O is psitie, allwing an utput as high as DD O N sinks the lad current when O is negatie, allwing an utput as lw as SS + ON The disadantage is its high utput resistance ut = r n r p Negatie feedback errr amplifiers) is emplyed t reduce the utput resistance NTUEE Electrnics 3-6

17 Output esistance The utput resistance is deried by tw half circuits: The analysis techniques fr feedback shunt-series feedback) is utilized: and A g r ) The pen-lp utput resistance: The utput resistance with feedback: The utput resistance excluding : Oerall utput resistance: i mp p ut r f p ut utn utp A) rp) [ g m rp)] utp f ) rp g mp g gmp gmn) mp NTUEE Electrnics 3-7

18 The ltage Transfer Characteristics Fr the case where N and are matched: Drain currents: and ad current: Output ltage: Gain errr: k O O O DN i O O D i DN D i i i O O O 4 4 O O NTUEE Electrnics 3-8 Gain errr: m O g 4