FQP5N60C / FQPF5N60C N-Channel QFET MOSFET



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FQP5N60C / FQPF5N60C N-Channel QFET MOSFET 600 V, 4.5 A,.5 Ω Description This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and electronic lamp ballasts. G DS TO-0 G DS Features December 013 4.5 A, 600 V, R DS(on) =.5 Ω (Max.) @ = 10 V, I D =.5 A Low Gate Charge (Typ. 15 nc) Low Crss (Typ. 6.5 pf) 100% Avalanche Tested TO-0F G D S Absolute Maximum Ratings T C = 5 C unless otherwise noted. Symbol Parameter FQP5N60C FQPF5N60C Unit S Drain-Source Voltage 600 V I D Drain Current - Continuous (T C = 5 C) 4.5 4.5 * A Maximum Lead Temperature for Soldering, T L 1/8" from Case for 5 Seconds * Drain current limited by maximum junction temperature. - Continuous (T C = 100 C).6.6 * A I DM Drain Current - Pulsed (Note 1) 18 18 * A S Gate-Source Voltage ± 30 V E AS Single Pulsed Avalanche Energy (Note ) 10 mj I AR Avalanche Current (Note 1) 4.5 A E AR Repetitive Avalanche Energy (Note 1) 10 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns P D Power Dissipation (T C = 5 C) 100 33 W - Derate above 5 C 0.8 0.6 W/ C T J, T STG Operating and Storage Temperature Range -55 to +150 C 300 C Thermal Characteristics Symbol Parameter FQP5N60C FQPF5N60C Unit R θjc Thermal Resistance, Junction-to-Case, Max. 1.5 3.79 C/W R θcs Thermal Resistance, Case-to-Sink Typ, Max. 0.5 -- C/W R θja Thermal Resistance, Junction-to-Ambient, Max. 6.5 6.5 C/W 1

Package Marking and Ordering Information Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity FQP5N60C FQP5N60C TO-0 Tube N/A N/A 50 units FQPF5N60C FQPF5N60C Electrical Characteristics TO-0F Tube N/A N/A 50 units T C = 5 C unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 50 µa 600 -- -- V BS Breakdown Voltage Temperature / T J Coefficient I D = 50 µa, Referenced to 5 C -- 0.6 -- V/ C I DSS = 600 V, = 0 V -- -- 1 µa Zero Gate Voltage Drain Current = 480 V, T C = 15 C -- -- 10 µa I GSSF Gate-Body Leakage Current, Forward = 30 V, = 0 V -- -- 100 na I GSSR Gate-Body Leakage Current, Reverse = -30 V, = 0 V -- -- -100 na On Characteristics (th) Gate Threshold Voltage =, I D = 50 µa.0 -- 4.0 V R DS(on) Static Drain-Source V On-Resistance GS = 10 V, I D =.5 A --.0.5 Ω g FS Forward Transconductance = 40 V, I D =.5 A -- 4.7 -- S Dynamic Characteristics C iss Input Capacitance = 5 V, = 0 V, -- 515 670 pf C oss Output Capacitance f = 1.0 MHz -- 55 7 pf C rss Reverse Transfer Capacitance -- 6.5 8.5 pf Switching Characteristics t d(on) Turn-On Delay Time V DD = 300 V, I D = 4.5 -- 10 30 ns t r Turn-On Rise Time A, R G = 5 Ω -- 4 90 ns t d(off) Turn-Off Delay Time -- 38 85 ns t f Turn-Off Fall Time (Note 4) -- 46 100 ns Q g Total Gate Charge = 480 V, I D = 4.5 A, -- 15 19 nc Q gs Gate-Source Charge = 10 V --.5 -- nc Q gd Gate-Drain Charge (Note 4) -- 6.6 -- nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- 4.5 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- 18 A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 4.5 A -- -- 1.4 V t rr Reverse Recovery Time = 0 V, I S = 4.5 A, -- 300 -- ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs --. -- µc Notes: 1. Repetitive rating : pulse-width limited by maximum junction temperature.. L = 18.9 mh, I AS = 4.5 A, V DD = 50 V, R G = 5 Ω, starting T J = 5 C. 3.I SD 4.5 A, di/dt 00 A/µs, V DD BS, starting T J = 5 C. 4. Essentially independent of operating temperature.

! I D, Drain Current [A] R DS(ON) [Ω ], Drain-Source On-Resistance 10 1 Top : 15.0 V 6 5 4 3 1 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V 10-10 0 10 1, Drain-Source Voltage [V] Figure 1. On-Region Characteristics = 10V = 0V Note : T J = 5 0 0 4 6 8 10 I D, Drain Current [A] 1. 50μ s Pulse Test. T C = 5 I D, Drain Current [A] I DR, Reverse Drain Current [A] 10 1 10 1 5 o C 150 o C Figure. Transfer Characteristics 150 5-55 o C 1. = 40V. 50μ s Pulse Test 4 6 8 10, Gate-Source Voltage [V] 1. = 0V. 50μ s Pulse Test 0. 0.4 0.6 0.8 1.0 1. 1.4 V SD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature Capacitance [pf] 1000 800 600 400 00 C iss C oss C rss C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd Notes ; 1. = 0 V. f = 1 MHz, Gate-Source Voltage [V] 1 10 8 6 4 = 10V = 300V = 480V Note : I D = 4.5A 0 10 0 10 1, Drain-Source Voltage [V] 0 0 4 8 1 16 Q G, Total Gate Charge [nc] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 3

Typical Characteristics (Continued) BS, (Normalized) Drain-Source Breakdown Voltage I D, Drain Current [A] 1. 1.1 1.0 0.9 0.8-100 -50 0 50 100 150 00 10 1 T J, Junction Temperature [ o C] Operation in This Area is Limited by R DS(on) 1. = 0 V. I D = 50 μa Figure 7. Breakdown Voltage Variation vs Temperature 100 µs 1 ms 10 ms 100 ms DC 1. T C = 5 o C. T J = 150 o C 3. Single Pulse 10-10 1 10 10 3, Drain-Source Voltage [V] R DS(ON), (Normalized) Drain-Source On-Resistance I D, Drain Current [A] 3.0.5.0 1.5 1.0 0.5 0.0-100 -50 0 50 100 150 00 10 1 T J, Junction Temperature [ o C] Figure 8. On-Resistance Variation vs Temperature Operation in This Area is Limited by R DS(on) 1. T C = 5 o C. T J = 150 o C 3. Single Pulse 10 ms 100 ms 10 µs 10-10 1 10 10 3, Drain-Source Voltage [V] DC 1. = 10 V. I D =.5 A 1 ms 100 µs Figure 9-1. Maximum Safe Operating Area for FQP5N60C Figure 9-. Maximum Safe Operating Area for FQPF5N60C 5 4 I D, Drain Current [A] 3 1 0 5 50 75 100 15 150 T C, Case Temperature [ ] Figure 10. Maximum Drain Current vs Case Temperature 4

Typical Characteristics (Continued) Z JC (t), Thermal Response [ o C/W] 10 - D=0.5 0. 0.1 0.05 0.0 0.01 single pulse N otes : 10-5 10-4 10-3 10-10 1 t 1, Square W ave Pulse Duration [sec] 1. Z θ JC (t) = 1.5 /W M ax.. D uty F actor, D =t 1 /t 3. T JM - T C = P DM * Z θ JC (t) Figure 11-1. Transient Thermal Response Curve for FQP5N60C P DM t 1 t Z JC (t), Thermal Response [ o C/W] 10 - D=0.5 0. 0.1 0.05 0.0 0.01 single pulse 1. Z θ JC (t) = 3.79 /W M ax.. D uty Factor, D =t 1 /t 3. T JM - T C = P DM * Z θ JC (t) 10-5 10-4 10-3 10-10 1 P DM t 1, S quare W ave P ulse D uration [sec] t 1 t Figure 11-. Transient Thermal Response Curve for FQPF5N60C 5

1V 50KΩ 00nF I G = const. 3mA Same Type as DUT 300nF DUT 10V Charge Figure 1. Gate Charge Test Circuit & Waveform R L V DS 90% V DD R G Q g Q gs Q gd V 10 DUT 10% t d(on) t r t d(off) tf t on t off Figure 13. Resistive Switching Test Circuit & Waveforms L E AS = ---- 1 LI AS BS -------------------- BS -V DD I D BS I AS R G V DD I D (t) V 10 DUT V DD (t) t p t p Time Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms 6

R G DUT I SD Driver + _ L Same Type as DUT dv/dt controlled by RG I SD controlled by pulse period V DD ( Driver ) Gate Pulse Width D = -------------------------- Gate Pulse Period 10V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD V DD Body Diode Forward Voltage Drop Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms 7

Mechanical Dimensions Figure 16. TO-0, Molded, 3-Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http:///package/packagedetails.html?id=pn_tt0-003 8

Mechanical Dimensions Figure 17. TO0, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http:///package/packagedetails.html?id=pn_tf0-003 9

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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary No Identification Needed First Production Full Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I66 10