Symbol Parameter Ratings Units V DSS Drain-to-Source Voltage 80 V V GS Gate-to-Source Voltage ±20 V Drain Current - Continuous (V

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1 FDBL8636_F85 N-Channel PowerTrench MOSFET 8 V, 3 A,.4 mω Features Typical R DS(on) =. mω at V GS = V, I D = 8 A Typical Q g(tot) = 72 nc at V GS = V, I D = 8 A UIS Capability RoHS Compliant Qualified to AEC Q Applications Automotive Engine Control PowerTrain Management Solenoid and Motor Drivers Integrated Starter/Alternator Primary Switch for 2V Systems MOSFET Maximum Ratings T J = 25 C unless otherwise noted. G D S December 24 For current package drawing, please refer to the Fairchild website at FDBL8636_F85 N-Channel PowerTrench MOSFET Symbol Parameter Ratings Units V DSS Drain-to-Source Voltage 8 V V GS Gate-to-Source Voltage ±2 V Drain Current - Continuous (V I GS =) (Note ) T C = 25 C 3 D Pulsed Drain Current T C = 25 C See Figure 4 A E AS Single Pulse Avalanche Energy (Note 2) 82 mj Power Dissipation 429 W P D Derate Above 25 o C 2.86 W/ o C T J, T STG Operating and Storage Temperature -55 to + 75 o C R θjc Thermal Resistance, Junction to Case.35 o C/W R θja Maximum Thermal Resistance, Junction to Ambient (Note 3) 43 o C/W Notes: : Current is limited by bondwire configuration. 2: Starting T J = 25 C, L =.4mH, I AS = 64A, V DD = 4V during inductor charging and V DD = V during time in avalanche. 3: R θja is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. R θjc is guaranteed by design, while R θja is determined by the board design. The maximum rating presented here is based on mounting on a in 2 pad of 2oz copper. Package Marking and Ordering Information Device Marking Device Package FDBL8636 FDBL8636_F85 MO-299A Fairchild Semiconductor Corporation FDBL8636_F85 Rev. C

2 Electrical Characteristics T J = 25 C unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics B VDSS Drain-to-Source Breakdown Voltage I D = 25μA, V GS = V V V I DSS Drain-to-Source Leakage Current DS = 8V, T J = 25 o C - - μa V GS = V T J = 75 o C (Note 4) - - ma I GSS Gate-to-Source Leakage Current V GS = ±2V - - ± na On Characteristics V GS(th) Gate to Source Threshold Voltage V GS = V DS, I D = 25μA V R DS(on) Drain to Source On Resistance Dynamic Characteristics I D = 8A, V GS = V T J = 25 o C -..4 mω T J = 75 o C (Note 4) mω C iss Input Capacitance pf V DS = 25V, V GS = V, C oss Output Capacitance pf f = MHz C rss Reverse Transfer Capacitance pf R g Gate Resistance f = MHz Ω Q g(tot) Total Gate Charge at V V GS = to V V DD = 64V nc Q g(th) Threshold Gate Charge V GS = to 2V I D = 8A nc Q gs Gate-to-Source Gate Charge nc Q gd Gate-to-Drain Miller Charge nc Switching Characteristics FDBL8636_F85 N-Channel PowerTrench MOSFET t on Turn-On Time ns t d(on) Turn-On Delay ns t r Rise Time V DD = 4V, I D = 8A, ns t d(off) Turn-Off Delay V GS = V, R GEN = 6Ω ns t f Fall Time ns t off Turn-Off Time ns Drain-Source Diode Characteristics V SD Source-to-Drain Diode Voltage I SD =8A, V GS = V V I SD = 4A, V GS = V V t rr Reverse-Recovery Time I F = 8A, di SD /dt = A/μs, ns Q rr Reverse-Recovery Charge V DD =64V nc Note: 4: The maximum value is specified by design at T J = 75 C. Product is not tested to this condition in production. FDBL8636_F85 Rev. C 2

3 Typical Characteristics POWER DISSIPATION MULTIPLIER T C, CASE TEMPERATURE( o C) Figure. Normalized Power Dissipation vs. Case Temperature NORMALIZED THERMAL IMPEDANCE, ZθJC 2. DUTY CYCLE - DESCENDING ORDER D = SINGLE PULSE CURRENT LIMITED BY PACKAGE V GS = V CURRENT LIMITED BY SILICON T C, CASE TEMPERATURE( o C) Figure 2. Maximum Continuous Drain Current vs. Case Temperature P DM t t 2 NOTES: DUTY FACTOR: D = t /t 2 PEAK T J = P DM x Z θjc x R θjc + T C FDBL8636_F85 N-Channel PowerTrench MOSFET t, RECTANGULAR PULSE DURATION(s) Figure 3. Normalized Maximum Transient Thermal Impedance V GS = V IDM, PEAK CURRENT (A) T C = 25 o C FOR TEMPERATURES ABOVE 25 o C DERATE PEAK CURRENT AS FOLLOWS: I = I T C SINGLE PULSE t, RECTANGULAR PULSE DURATION(s) Figure 4. Peak Current Capability FDBL8636_F85 Rev. C 3

4 Typical Characteristics 2 ms SINGLE PULSE ms TJ = MAX RATED TC = 25 o ms C.. 5 Figure OPERATION IN THIS AREA MAY BE LIMITED BY rds(on) Figure 7. us Forward Bias Safe Operating Area PULSE DURATION = 8μs DUTY CYCLE =.5% MAX V DD = 5V T J = 25 o C T J = 75 o C T J = -55 o C V GS, GATE TO SOURCE VOLTAGE (V) IAS, AVALANCHE CURRENT (A) 2 Transfer Characteristics Figure 8. If R = t AV = (L)(I AS )/(.3*RATED BV DSS - V DD ) If R t AV = (L/R)ln[(I AS *R)/(.3*RATED BV DSS - V DD ) +] STARTING T J = 5 o C STARTING T J = 25 o C... t AV, TIME IN AVALANCHE (ms) NOTE: Refer to Fairchild Application Notes AN754 and AN755 Figure 6. Unclamped Inductive Switching Capability IS, REVERSE DRAIN CURRENT (A) 3 V GS = V T J = 75 o C T J = 25 o C V SD, BODY DIODE FORWARD VOLTAGE (V) Forward Diode Characteristics FDBL8636_F85 N-Channel PowerTrench MOSFET Figure 9. 8μs PULSE WIDTH Tj=25 o C 5V V GS 5V Top V 8V 7V 6V 5.5V 5V Bottom Saturation Characteristics Figure. 5 5V V GS 5V Top V 8V 5.5V 7V 6V 5.5V 5V Bottom 8μs PULSE WIDTH Tj=75 o C Saturation Characteristics FDBL8636_F85 Rev. C 4

5 Typical Characteristics rds(on), DRAIN TO SOURCE ON-RESISTANCE (mω) NORMALIZED GATE THRESHOLD VOLTAGE I D = 8A T J = 75 o C Figure. PULSE DURATION = 8μs DUTY CYCLE =.5% MAX T J = 25 o C V GS, GATE TO SOURCE VOLTAGE (V) R DSON vs. Gate Voltage V GS = V DS I D = 25μA T J, JUNCTION TEMPERATURE( o C) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE PULSE DURATION = 8μs DUTY CYCLE =.5% MAX I D = 8A V GS = V T J, JUNCTION TEMPERATURE( o C) Figure 2. Normalized R DSON vs. Junction Temperature I D = 5mA T J, JUNCTION TEMPERATURE ( o C) FDBL8636_F85 N-Channel PowerTrench MOSFET Figure 3. Normalized Gate Threshold Voltage vs. Temperature Figure 4. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature CAPACITANCE (pf) f = MHz V GS = V C iss C oss C rss. VGS, GATE TO SOURCE VOLTAGE(V) ID = 8A V DD = 4V V DD =32V V DD = 48V Q g, GATE CHARGE(nC) Figure 5. Capacitance vs. Drain to Source Voltage Figure 6. Gate Charge vs. Gate to Source Voltage FDBL8636_F85 Rev. C 5

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