Embedded Computer Architectures: Associative Processing
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1 Embedded Computer Architectures: Associative Processing Jan Jacobs Océ Technologies BV Monday, October 2, 26 1:4 Part I: Concept, Hardware 11:4 Part II: Applications /4 Jan Jacobs, Océ Technologies BV, 2/1/6 1
2 Part I: Associative Processing Concept, implementation, and chips /4 Jan Jacobs, Océ Technologies BV, 2/1/6 2
3 Overview n intro Océ, vision, problem n associative processing: - concepts - design considerations - chips Jan Jacobs, Océ Technologies BV, 2/1/6 3
4 Intro Océ Jan Jacobs, Océ Technologies BV, 2/1/6 4
5 Jan Jacobs, Océ Technologies BV, 2/1/6 5
6 Jan Jacobs, Océ Technologies BV, 2/1/6 6
7 Office Affordable hi-q Services by Sharing scan print copy extracting / information fusion scan print publishing / navigation building rational and story writing corporate intelligence server security / integrity Jan Jacobs, Océ Technologies BV, 2/1/6 7
8 Problems n Need for Speed! n Large Development effort? and answers n HW: Embedded massively // SIMD n SW: Artificial (Embodied) Intelligence Jan Jacobs, Océ Technologies BV, 2/1/6 8
9 associative processing concepts Jan Jacobs, Océ Technologies BV, 2/1/6 9
10 HW: Embedded massive // SIMD n Flynn s classification n SIMD concept n Associative processing Jan Jacobs, Océ Technologies BV, 2/1/6 1
11 Flynn s classification Jan Jacobs, Océ Technologies BV, 2/1/6 11
12 SIMD concept Jan Jacobs, Océ Technologies BV, 2/1/6 12
13 Associative Processing History n Vannevar Bush [1945]: Memex n Slade and McMahon [1957]: "catalog" memory n Goodyear [1975]: STARAN Properties n Address by content (not address) n Instantaneous association n SIMD n Ultra RISC (2 instructions: Compare, Write) Jan Jacobs, Océ Technologies BV, 2/1/6 13
14 Search pattern J O * * * * * mask FF FF array tag PE J O H N 9 P E T E 5 6 J O S H 3 8 F R E D 1 J A N Jan Jacobs, Océ Technologies BV, 2/1/6 14
15 Found... pattern J O * * * * * Compare mask FF FF array tag PE J O H N 9 1 P E T E 5 6 J O S H F R E D 1 J A N Jan Jacobs, Océ Technologies BV, 2/1/6 15
16 and write! pattern * * * * Write mask FF FF FF PE J O H N 1 P E T E 5 6 J O S H 1 F R E D 1 J A N Jan Jacobs, Océ Technologies BV, 2/1/6 16
17 Smooth, 3x3 kernel (1) image a b c d e x kernel Jan Jacobs, Océ Technologies BV, 2/1/6 17
18 Smooth, 3x3 kernel (2) scanline shift(1) plus shift(-1) plus == horizontal intermediate a a b b c a+b b+c a+b a+2b+c c d c+d b+c b+2c+d d e d+e c+d c+2d+e e d+e 128 bits Jan Jacobs, Océ Technologies BV, 2/1/6 18
19 Operations which benefit... n n n n n n n n searching max/min zoom (reduction/enlargement) rotate (multiple deskews) trig functions (Cordic) DFT compression Operations which don t benefit... n n n Inherent sequential problems (e.g. Huffman decoding, error diffusion) Control intensive (e.g. floating point) Jan Jacobs, Océ Technologies BV, 2/1/6 19
20 Just remember N Von Neumann (1 data item per cycle) +1 W << N W SIMD Associative (1 bit per cycle) Jan Jacobs, Océ Technologies BV, 2/1/6 2
21 associative processing design considerations Jan Jacobs, Océ Technologies BV, 2/1/6 21
22 Implementing the concepts Basics pattern register mask register column select Flip Flop Flip Flop Flip Flip = Flop = Flop = row Flip Flip select = Flop = Flop = tag (shift) register Jan Jacobs, Océ Technologies BV, 2/1/6 22
23 Addition (1): LUT approach [4 cycles/bit] Pattern Reg. Mask Reg. Video Memory Input/ Output Buffer * * * * * * * * Tags Reg. Result Carry A B Jan Jacobs, Océ Technologies BV, 2/1/6 23
24 Addition (2): LUT approach [4 cycles/bit] Pattern Reg. Mask Reg. Video Memory Input/ Output Buffer Tags Reg. Result Carry A B Jan Jacobs, Océ Technologies BV, 2/1/6 24
25 Addition (3): Full Adder approach [1 c/b] Jan Jacobs, Océ Technologies BV, 2/1/6 25
26 associative processing chips Jan Jacobs, Océ Technologies BV, 2/1/6 26
27 Aspex Semiconductor Ltd n Est. 1999, off spring Brunel university (UK) n Fabless semiconductor company n high-speed signal processing devices n markets: telecommunications, imaging and networking n 35 employees n 24: raised 1M$ public capital n Customers: broadcasting (Imagineer Systems), medical (X), wireless communication (Philips), machine vision (X) Jan Jacobs, Océ Technologies BV, 2/1/6 27
28 Linedancer I architecture Jan Jacobs, Océ Technologies BV, 2/1/6 28
29 AsproCore architecture Data Register ALU CR TR1 TR2 TR3 IACN AR Activity PDS 1 15 w1 w db6 db4 db2 db b7 b6 b5 b4 b3 b2 b1 b w1 w db6 db4 db2 db db7 db5 db3 db1 b7 b6 b5 b4 b3 b2 b1 b serial Bit Mask Logic Scalar Output Scalar Input ALU ALU ALU ALU sync async LLinkPort Bit Mask D64 D32 D32 D16 D16 D16 D16 D8 D8D8D8D8D8D8D8 X X 4K ALU ALU ALU ALU Ext [ ] CAM [63..] ab PDS [63..] RLinkPort [..7] Jan Jacobs, Océ Technologies BV, 2/1/6 29
30 Neomagic (former ACL) n Established 1993 by Robomatix and Dr. A. Akerib n 2: NeoMagic, Santa Clara, US CA buys ACL n Low power multi media n Current: chips sales & contract development n 18 Full-Time Employees; 13 Engineers (Santa Clara, Tel Aviv, New Dehli) n Customers: mobile communication (Compal): Digital TV (MBCO), Video Clips, mobile 3D games (M-systems) + multimedia apps (Sony) Jan Jacobs, Océ Technologies BV, 2/1/6 3
31 MiMagic Jan Jacobs, Océ Technologies BV, 2/1/6 31
32 Associative Processing Array Jan Jacobs, Océ Technologies BV, 2/1/6 32
33 NeoMagic s X?K (16K x (96+2K)) Jan Jacobs, Océ Technologies BV, 2/1/6 33
34 Others Jan Jacobs, Océ Technologies BV, 2/1/6 34
35 Next session: Applications Questions? Jan Jacobs, Océ Technologies BV, 2/1/6 35
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