IRFB3004PbF IRFS3004PbF IRFSL3004PbF

Transcription

1 Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Improved Gate, Avalanche and ynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dv/dt and di/dt Capability l Lead-Free G S S G P IRFB3004PbF IRFS3004PbF IRFSL3004PbF V SS HEXFET Power MOSFET R S(on) typ. max. I (Silicon Limited) I (Package Limited) G S 40V.4mΩ.75mΩ 340Ac 95A S G TO-220AB IRFB3004PbF 2 Pak IRFS3004PbF TO-262 IRFSL3004PbF G S Gate rain Source Absolute Maximum Ratings Symbol Parameter Max. Units T C = 25 C Continuous rain Current, V V (Silicon Limited) 340c T C = C Continuous rain Current, V V (Silicon Limited) 240c T C = 25 C Continuous rain Current, V V (Wire Bond Limited) 95 A I M Pulsed rain Current d 3 C = 25 C Maximum Power issipation 380 W Linear erating Factor 2.5 W/ C V GS Gate-to-Source Voltage ± 20 V dv/dt Peak iode Recovery f 4.4 V/ns T J Operating Junction and -55 to 75 T STG Storage Temperature Range Soldering Temperature, for seconds (.6mm from case) Mounting torque, 6-32 or M3 screw 300 lbfxin (.Nxm) C Avalanche Characteristics E AS (Thermally limited) Single Pulse Avalanche Energy e 300 mj I AR Avalanche Currentd See Fig. 4, 5, 22a, 22b A E AR Repetitive Avalanche Energy d mj Thermal Resistance Symbol Parameter Typ. Max. Units R θjc Junction-to-Case kl 0.40 R θcs Case-to-Sink, Flat Greased Surface, TO R θja Junction-to-Ambient, TO R θja Junction-to-Ambient (PCB Mount), 2 Pak j 40 C/W 02/26/09

2 (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V (BR)SS rain-to-source Breakdown Voltage 40 V V (BR)SS / T J Breakdown Voltage Temp. Coefficient V/ C R S(on) Static rain-to-source On-Resistance.4.75 mω V GS(th) Gate Threshold Voltage V I SS rain-to-source Leakage Current 20 µa 250 I GSS Gate-to-Source Forward Leakage na Gate-to-Source Reverse Leakage - R G Internal Gate Resistance 2.2 Ω (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units gfs Forward Transconductance 70 S Q g Total Gate Charge nc Q gs Gate-to-Source Charge 40 Q gd Gate-to-rain ("Miller") Charge 68 Q sync Total Gate Charge Sync. (Q g - Q gd ) 92 t d(on) Turn-On elay Time 23 ns t r Rise Time 220 t d(off) Turn-Off elay Time 90 t f Fall Time 30 C iss Input Capacitance 9200 pf C oss Output Capacitance 2020 C rss Reverse Transfer Capacitance 340 C oss eff. (ER) Effective Output Capacitance (Energy Related) i 2440 C oss eff. (TR) Effective Output Capacitance (Time Related)h 2690 iode Characteristics Symbol Parameter Min. Typ. Max. Units I S Continuous Source Current 340c A Conditions V GS = 0V, I = 250µA Reference to 25 C, I = 5mAd V GS = V, I = 95A g V S = V GS, I = 250µA V S = 40V, V GS = 0V V S = 40V, V GS = 0V, T J = 25 C V GS = 20V V GS = -20V Conditions V S = V, I = 95A I = 87A V S =20V V GS = V g I = 87A, V S =0V, V GS = V V = 26V I = 95A R G = 2.7Ω V GS = V g V GS = 0V V S = 25V ƒ =.0 MHz, See Fig. 5 V GS = 0V, V S = 0V to 32V i, See Fig. V GS = 0V, V S = 0V to 32V h Conditions MOSFET symbol (Body iode) showing the I SM Pulsed Source Current 3 A integral reverse G (Body iode)d p-n junction diode. V S iode Forward Voltage.3 V, I S = 95A, V GS = 0V g t rr Reverse Recovery Time 27 ns V R = 34V, 3 T J = 25 C I F = 95A Q rr Reverse Recovery Charge 8 nc di/dt = A/µs g 4 T J = 25 C I RRM Reverse Recovery Current.2 A t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSL) S Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 95A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-40) Repetitive rating; pulse width limited by max. junction temperature. ƒ Limited by T Jmax, starting, L = 0.06mH R G = 25Ω, I AS = 95A, V GS =V. Part not recommended for use above this value. I S 95A, di/dt 930A/µs, V V (BR)SS, T J 75 C. Pulse width 400µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V S is rising from 0 to 80% V SS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V S is rising from 0 to 80% V SS. ˆ When mounted on " square PCB (FR-4 or G- Material). For recom mended footprint and soldering techniques refer to application note #AN-994. R θ is measured at T J approximately 90 C. Š R θjc value shown is at time zero. 2

3 C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I, rain-to-source Current (A) R S(on), rain-to-source On Resistance (Normalized) I, rain-to-source Current (A) I, rain-to-source Current (A) IRFB/S/SL3004PbF 00 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 4.8V BOTTOM 4.5V 00 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 4.8V BOTTOM 4.5V 4.5V 4.5V 60µs PULSE WITH Tj = 25 C 0. V S, rain-to-source Voltage (V) 60µs PULSE WITH Tj = 75 C 0. V S, rain-to-source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I = 95A V GS = V T J = 75 C.5 V S = 25V 60µs PULSE WITH V GS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics T J, Junction Temperature ( C) Fig 4. Normalized On-Resistance vs. Temperature V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTE C rss = C gd C oss = C ds C gd C iss I = 87A V S = 32V V S = 20V 0 C oss C rss V S, rain-to-source Voltage (V) Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance vs. rain-to-source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3

4 Energy (µj) E AS, Single Pulse Avalanche Energy (mj) V (BR)SS, I, rain Current (A) rain-to-source Breakdown Voltage (V) I S, Reverse rain Current (A) I, rain-to-source Current (A) IRFB/S/SL3004PbF 0 00 OPERATION IN THIS AREA LIMITE BY R S (on) T J = 75 C 0 µsec msec msec V GS = 0V V S, Source-to-rain Voltage (V) Fig 7. Typical Source-rain iode Forward Voltage Limited By Package Fig 8. Maximum Safe Operating Area Id = 5mA C Tc = 25 C Tj = 75 C Single Pulse V S, rain-to-source Voltage (V) T C, Case Temperature ( C) Fig 9. Maximum rain Current vs. Case Temperature T J, Temperature ( C ) Fig. rain-to-source Breakdown Voltage I TOP 30A 54A BOTTOM 95A V S, rain-to-source Voltage (V) Starting T J, Junction Temperature ( C) Fig. Typical C OSS Stored Energy Fig 2. Maximum Avalanche Energy vs. raincurrent 4

5 E AR, Avalanche Energy (mj) Avalanche Current (A) IRFB/S/SL3004PbF Thermal Response ( Z thjc ) C/W = SINGLE PULSE ( THERMAL RESPONSE ) R R 2 R 3 R R 2 R 3 τ J τ J τ τ τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci i/ri R 4 Ri ( C/W) τi (sec) R Notes:. uty Factor = t/t2 2. Peak Tj = P dm x Zthjc Tc 0.00 E-006 E t, Rectangular Pulse uration (sec) 0 Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case τ 4 τ 4 τ C τ uty Cycle = Single Pulse 0.0 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 50 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Τj = 25 C and Tstart = 50 C..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 4. Typical Avalanche Current vs.pulsewidth TOP Single Pulse BOTTOM.0% uty Cycle I = 95A Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-5 at Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 6a, 6b. 4. P (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 4, 5). t av = Average time in avalanche. = uty cycle in avalanche = t av f Z thjc (, t av ) = Transient thermal resistance, see Figures 3) Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature P (ave) = /2 (.3 BV I av ) = T/ Z thjc I av = 2T/ [.3 BV Z th ] E AS (AR) = P (ave) t av 5

6 Q RR (nc) I RRM (A) Q RR (nc) V GS(th), Gate threshold Voltage (V) I RRM (A) IRFB/S/SL3004PbF I F = 78A V R = 34V T J = 25 C I = 250µA I =.0mA I =.0A T J, Temperature ( C ) Fig 6. Threshold Voltage vs. Temperature di F /dt (A/µs) Fig. 7 - Typical Recovery Current vs. di f /dt 9 8 I F = 7A V R = 34V T J = 25 C I F = 78A V R = 34V T J = 25 C di F /dt (A/µs) Fig. 8 - Typical Recovery Current vs. di f /dt di F /dt (A/µs) Fig. 9 - Typical Stored Charge vs. di f /dt I F = 7A V R = 34V T J = 25 C di F /dt (A/µs) Fig Typical Stored Charge vs. di f /dt 6

7 -.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current river Gate rive Period P.W..U.T. I S Waveform Body iode Forward Current di/dt.u.t. V S Waveform iode Recovery dv/dt = P.W. Period V GS =V V * R G dv/dt controlled by RG river same type as.u.t. I S controlled by uty Factor "".U.T. - evice Under Test V - Re-Applied Voltage Body iode Inductor Curent Current Forward rop Ripple 5% I S * V GS = 5V for Logic Level evices Fig 2. Peak iode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs 5V tp V (BR)SS V S L RIVER R G 20V V GS tp.u.t I AS 0.0Ω - V A I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms V S R V S V GS.U.T. 90% R G - V VV GS Pulse Width µs uty Factor 0. % % V GS t d(on) t r t d(off) t f Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Current Regulator Same Type as.u.t. Vds Id 50KΩ Vgs 2V.2µF.3µF V GS.U.T. V - S Vgs(th) 3mA I G I Current Sampling Resistors Qgs Qgs2 Qgd Qgodr Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 7

8 TO-220AB Package Outline imensions are shown in millimeters (inches) TO-220AB Part Marking Information (;$03/( 7,6,6$,5) $66(0%/('2::,7($66(0%/</,(& RWH3LQVVHPEO\OLQHSRVLWLRQ LQGLFWHV/HG)UHH,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/< 3$5780%(5 '$7(&2'( <($5 :((. /,(& TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at 8

9 TO-262 Package Outline imensions are shown in millimeters (inches) TO-262 Part Marking Information (;$03/( 7,6,6$,5// $66(0%/('2::,7($66(0%/</,(&,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/< 3$5780%(5 '$7(&2'( <($5 :((. /,(& 25,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/< 3$5780%(5 '$7(&2'( 3 '(6,*$7(6/($')5(( 352'8&7237,2$/ <($5 :((. $ $66(0%/<6,7(&2'( Note: For the most current drawing please refer to IR website at 9

10 2 Pak (TO-263AB) Package Outline imensions are shown in millimeters (inches) 2 Pak (TO-263AB) Part Marking Information 7,6,6$,5)6:,7,7(5$7,2$/ $66(0%/('2:: 5(&7,),(5,7($66(0%/</,(/ /2*2 $66(0%/< )6 3$5780%(5 '$7(&2'( <($5 :((. /,(/ 25,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/< )6 3$5780%(5 '$7(&2'( 3 '(6,*$7(6/($')5(( 352'8&7237,2$/ <($5 :((. $ $66(0%/<6,7(&2'( Note: For the most current drawing please refer to IR website at

11 2 Pak (TO-263AB) Tape & Reel Information imensions are shown in millimeters (inches) TRR.60 (.063).50 (.059) 4. (.6) 3.90 (.53).60 (.063).50 (.059) (.045) (.035) FEE IRECTION TRL.85 (.073).65 (.065).60 (.457).40 (.449) 5.42 (.609) 5.22 (.60) (.957) (.94).90 (.429).70 (.42) 6. (.634) 5.90 (.626).75 (.069).25 (.049) 4.72 (.36) 4.52 (.78) FEE IRECTION 3.50 (.532) 2.80 (.504) (.079) (.94) (4.73) MAX (2.362) MIN. NOTES :. COMFORMS TO EIA CONTROLLING IMENSION: MILLIMETER. 3. IMENSION HUB. 4. INCLUES FLANGE OUTER EGE (.039) (.96) (.97) MAX. 4 Note: For the most current drawing please refer to IR website at: ata and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORL HEAQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) TAC Fax: (3) Visit us at for sales contact information. 02/2009