Defining Platform-Based Design. System Definition. Platform Based Design What is it? Platform-Based Design Definitions: Three Perspectives

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1 Based Design What is it? Question: How many definitions of Based Design are there? Defining -Based Design Answer: How many people to you ask? What does the confusion mean? It is a definition in transition Or Marketing has gotten involved 2 -Based Design Definitions: Three Perspectives System Definition Systems Designers Semiconductor Academic (ASV) Ericsson's Internet Services is a new tool for helping CDMA operators and service providers deploy Mobile Internet applications rapidly, efficiently and cost-effectively Source: Ericsson press release 3 4

2 Semiconductor Definition s s Service Examples Cisco: ONS DWDM Ericsson: Internet Services platform Nokia: Mobile Internet Architecture Intel: Personal Internet Client Architecture Sony: Playstation 2 We define platform-based design as the creation of a stable microprocessor-based architecture that can be rapidly extended, customized for a range of applications, and delivered to customers for quick deployment Source: Jean-Marc Chateau (ST Micro) 5 System SW HW Implementation Fabrics Manufacturing TI: OMAP Philips: Nexperia ARM: PrimeXSys Xilinx: Virtex II easic: eunit 6 Architectures: Philips Nexperia MIPS MIPS CPU D$ PRxxxx I$ DVP SYSTEM SILICON PI BUS SDRAM MMI DVP MEMORY BUS PI BUS TriMedia TriMedia CPU TM-xxxx D$ I$ s Middleware JavaTV, TVPAK, OpenTV, MHP/Java, proprietary Streaming and Software Nexperia Hardware Hardware Software Kernel: psos, VxWorks, Win-CE Source: Philips Types Communication Centric SONIC, Palmchip Concentrates on communication Delivers communication framework plus peripherals Limits the modeling efforts SONICs Architecture { SiliconBackplane (patented) DMA CPU DSP C MEM I O MPEG Open Core Protocol MultiChip Backplane SiliconBackplane Agent Source: G Martin 7 8

3 Types Highly Programmable Triscend A7, Altera Excalibur, Xilinx FPGA, Chameleon Concentrates on reconfigurability Delivers reconfigurable processor plus programmable logic Modeling efforts undetermined because of programmable parts Triscend A7 ASV: The Next Level of Abstraction in the Architecture Space Gate Level Model Capacity Load IP Block Performance Inter IP Communication Performance Models SDF Wire Load RTL cluster IP Blocks RTL Clusters SW Models Transistor Model Capacity Load cluster Xilinx Vertex II FPGA cluster s 1980 s 1990 s Year Hardware s (1998) Hardware s Not Enough! Hardware platform has to be extended upwards to be really effective in time-to-market Interface to the application software is an API A Hardware is a family of architectures that satisfy a set of architectural constraints imposed to allow the re-use of hardware and software components Software layer performs ion: Programmable cores and memory subsystem with (RT)OS I/O subsystem via Device Drivers 11 12

4 Software s ASV Triangles (1998) Instance Space Mapping Input devices Hardware Output Devices I O Design-Space Export System Instance Architectural Space A Discipline of -Based Design Programming Model: Models/Estimators Kernels/Benchmarks Architecture(s) Architectural Microarchitecture(s) ASV s In general, a platform is an ion layer that covers a number of possible refinements into a lower level Cycle-speed, power, area Circuit Fabric(s) Silicon Implementation Manfacturing Interface Functional Blocks, Interconnect V S G S V S V S G S V S S S V V G S stack { Mapping Tools Delay, variation, SPICE models Basic device & interconnect structures Silicon Implementation Source: R Newton 15 16

5 ASV s The design process is meet-inthe-middle: Top-down: map an instance of the top platform into an instance of the lower platform and propagate constraints Bottom-up: build a platform by defining the library that characterizes it and a performance ion (eg, number of literals for tech Independent optimization, area and propagation delay for a cell in a standard cell library) The library has elements and interconnects Upper layer of ion Constraints Performance Annotation Lower layer of ion For For every every platform, there there is is a view view that that is is used used to to map map the the upper upper layers layers of of ion into into the the platform and and a view view that that is is used used to to define define the the class class of of lower lower level level ions implied by by the the platform -Based Implementation s eliminate large loop iterations for affordable design Restrict design space via new forms of regularity and structure that surrender some design potential for lower cost and first-pass success The number and location of intermediate platforms is the essence of platform-based design 17 Silicon Implementation Silicon Implementation 18 -Based Design Process Different situations will employ different intermediate platforms, hence different layers of regularity and design-space constraints Critical step is defining intermediate platforms to support: Predictability: : ion to facilitate higher-level optimization Verifiability: : ability to ensure correctness Architecture Implementation Process Skipping platforms can potentially produce a superior design by enlarging design space if design-time and product volume ($) permits However, even for a large-step-across-platform flow there is a benefit to having a lower-bound on what is achievable from predictable flow Architecture Logic Regularity Logic Regularity Component Regularity and Reuse Component Regularity and Reuse Regular Fabrics Regular Fabrics Geometrical Regularity Silicon Implementation 19 Geometrical Regularity Silicon Implementation 20

6 Tight Lower Bounds The larger the step across platforms, the more difficult to: predict performance, optimize at system level, and provide a tight lower bound Design space may actually be smaller than with smaller steps since it is more difficult to explore and restriction on search impedes complete design space exploration The predictions/ions may be so wrong that design optimizations are misguided and the lower bounds are incorrect! Consequences There is no difference between HW and SW Decision comes later HW/SW implementation depend on choice of component at the architecture platform level Function/Architecture co-design happens at all levels of ions Each platform is an architecture since it is a library of usable components and interconnects It can be designed independently of a particular behavior Usable components can be considered as containers, ie, they can support a set of behaviors Mapping chooses one such behavior A Instance is a mapped behavior onto a platform A fixed architecture with a programmable processor is a platform in this sense A processor is indeed a collection of possible behaviors A SW implementation on a fixed architecture is a platform instance 21 22