Wideband 2.5 GHz, 37 db Isolation at 1 GHz, CMOS, 1.65 V to 2.75 V, 4:1 Mux/SP4T ADG904-EP

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1 Wideband 2.5 GHz, 37 db Isolation at GHz, CMOS,.65 V to 2.75 V, 4: Mux/SP4T FEATURES Wideband switch: 3 db frequency at 2.5 GHz Absorptive 4: mux/single-pole, four-throw (SP4T) High off isolation (37 db at GHz) Low insertion loss (. db dc to GHz) Single.65 V to 2.75 V power supply (VDD) CMOS/LVTTL control logic 20-lead, 4 mm 4 mm LFCSP package Low power consumption (2.5 µa maximum) HANCED PRODUCT FEATURES Supports defense and aerospace applications (AQEC standard) Military temperature range: 55 C to +25 C Controlled manufacturing baseline assembly/test site fabrication site Enhanced product change notification Qualification data available on request APPLICATIONS Wireless communications General-purpose radio frequency (RF) switching Dual-band applications High speed filter selection Digital transceiver front-end switches IF switching Tuner modules Antenna diversity switching GERAL DESCRIPTION The is a wideband analog 4: multiplexer that uses a CMOS process to provide high isolation and low insertion loss to GHz. The is an absorptive/matched mux with 50 Ω terminated shunt legs. This device is designed such that the isolation is high over the dc to GHz frequency range. The switches one of four inputs to a common output,, as determined by the 3-bit binary address lines, A, and. A Logic on the pin disables the device. FUNCTIONAL BLOCK DIAGRAM RF RF3 RF4 OF 4 A Figure. The device has on-board CMOS control logic, which eliminates the need for external control circuitry. The control inputs are both CMOS and LVTTL compatible. The low power consumption of this device makes it ideally suited for wireless applications and general-purpose high frequency switching. Additional application and technical information can be found in the ADG904 data sheet. PRODUCT HIGHLIGHTS. 37 db off isolation at GHz. 2.. db insertion loss at GHz lead LFCSP package Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 906, Norwood, MA , U.S.A. Tel: Analog Devices, Inc. All rights reserved. Technical Support

2 TABLE OF CONTTS Features... Enhanced Product Features... Applications... Functional Block Diagram... General Description... Product Highlights... Revision History... 2 Specifications... 3 Continous Current Per Channel... 4 Enhanced Product Absolute Maximum Ratings...5 Thermal Resistance...5 ESD Caution...5 Pin Configuration and Function Descriptions...6 Typical Performance Characteristics...7 Test Circuits...9 Outline Dimensions... Ordering Guide... REVISION HISTORY 3/207 Rev. A to Rev. B Changes to Endnote 4, Table... 3 Added Endnote, Table /206 Rev. 0 to Rev. A Changes to Figure /206 Revision 0: Initial Version Rev. B Page 2 of

3 SPECIFICATIONS VDD =.65 V to 2.75 V, = 0 V, input power = 0 dbm, temperature range = 55 C to +25 C, unless otherwise noted. Table. Parameter Symbol Test Conditions/Comments Min Typ Max Unit AC ELECTRICAL CHARACTERISTICS 3 db Frequency GHz Insertion Loss S2, S2 DC to 00 MHz; VDD = 2.5 V ± 0%; 0.5 db see Figure MHz; VDD = 2.5 V ± 0% db 000 MHz; VDD = 2.5 V ± 0%..8 db Isolation to RFx S2, S2 00 MHz; see Figure db 500 MHz; see Figure db 000 MHz; see Figure db Crosstalk S2, S2 00 MHz; see Figure db 500 MHz; see Figure db 000 MHz; see Figure db Return Loss 2 S, S22 On Channel DC to 00 MHz 9 27 db 500 MHz 26 db 000 MHz 8 db Off Channel DC to 00 MHz 4 22 db 500 MHz 9 db 000 MHz 8 db Timing On Switching Time 2 ton () 50% to 90% RF; see Figure ns Off Switching Time 2 toff () 50% to 0% RF; see Figure ns Transition Time ttrans 50% /A to 0% RF 2 5 ns Rise Time 2 trise 0% to 90% RF; see Figure ns Fall Time 2 tfall 90% to 0% RF; see Figure ns Third-Order Intermodulation Intercept IP3 900 MHz/90 MHz, 4 dbm; see Figure dbm Video Feedthrough 3 See Figure 20 3 mv p-p INPUT POWER db Input Compression PdB 000 MHz 4 ; see Figure 22 6 dbm DC ELECTRICAL CHARACTERISTICS Input High Voltage VINH VDD = 2.25 V to 2.75 V.7 V VDD =.65 V to.95 V 0.65 VDD V Input Low Voltage VINL VDD = 2.25 V to 2.75 V 0.7 V VDD =.65 V to.95 V 0.35 VDD V Input Leakage Current II 0 V VIN 2.75 V ±0. ± µa CAPACITANCE 2 f = MHz RF Port On Capacitance CRF ON 3 pf Digital Input Capacitance C 2 pf POWER REQUIREMTS VDD V Quiescent Power Supply Current IDD Digital inputs = 0 V or VDD µa Typical values are at VDD = 2.5 V and 25 C, unless otherwise stated. 2 Guaranteed by design, not subject to production test. 3 Video feedthrough is the dc transience at the output of any port of the switch when the control voltage is switched from high to low or low to high in a 50 Ω test setup, measured with ns rise time pulses and 500 MHz bandwidth. 4 Less than 00 MHz, refer to the AN-952 Application Note for more information about power handling. Rev. B Page 3 of

4 Enhanced Product CONTINOUS CURRT PER CHANNEL Table 2. Parameter 25 C 85 C 05 C 25 C Unit Test Conditions/Comments CONTINUOUS CURRT PER CHANNEL 20-lead LFCSP, θja = 30.4 C/W, dc bias = 0.5 V VDD = 2.75 V, VSS = 0 V ma maximum VDD =.65 V, VSS = 0 V ma maximum. Guaranteed by design, not production tested. Rev. B Page 4 of

5 ABSOLUTE MAXIMUM RATINGS TA = 25 C, unless otherwise noted. Table 3. Parameter Rating VDD to 0.5 V to +4 V Inputs to 0.5 V to VDD V 2 Continuous Current Data 3 + 5% Input Power 4 8 dbm Operating Temperature Range (Industrial) 55 C to +25 C Storage Temperature Range 65 C to +50 C Junction Temperature 50 C Lead Temperature, Soldering (0 sec) 300 C IR Reflow, Peak Temperature (<20 sec) 235 C Electrostatic Discharge (ESD) kv Tested at 55 C to +25 C. 2 RFx off port inputs to ground = 0.5 V to VDD 0.5 V. 3 See Table 2. 4 Input power is tested with switch in both open and close position. Power is applied on RFx, while is terminated to a 50 Ω resistor to. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. Table 4. Thermal Resistance Package Type θja θjc Unit CP C/W Test condition: thermal impedance simulated values are based on JEDEC 2S2P thermal test board with four thermal vias. See JEDEC JESD5. Table 5. Truth Table A On Switch X 2 X 2 None RF RF3 0 RF4 Off switches have 50 Ω termination to. 2 X means don t care. ESD CAUTION Rev. B Page 5 of

6 Enhanced Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 9 6 A RF RF3 5 TOP VIEW (Not to Scale) RF4 NOTES. THE EXPOSED PAD IS TIED TO THE SUBSTRATE,. Figure 2. Pin Configuration Table 6. Pin Function Descriptions Pin No. Mnemonic Function 0 EPAD Exposed Pad. The exposed pad is tied to the substrate,., 3, 4, 6, 7, 9, 0, 2, 3, 5, 20 Ground Reference Points for All Circuitry on the Device. 2 RF RF Port. 5 RF3 RF 3 Port. 8 Common RF Port for Switch. RF4 RF 4 Port. 4 RF 2 Port. 6 A Logic Control Input. 7 Logic Control Input 0. 8 Active Low Digital Input. When high, the device is disabled and all switches are off. When low, Ax logic inputs determine on switches. 9 VDD Power Supply Input. This device operates from.65 V to 2.75 V. VDD must be decoupled to. Rev. B Page 6 of

7 TYPICAL PERFORMANCE CHARACTERISTICS INSERTION LOSS (db) = 2.25V = 2.75V = 2.50V T A = 25 C 0k 00k M 0M 00M G 0G Figure 3. Insertion Loss vs. Frequency for VDD > 2.2 V (RFx to ) INSERTION LOSS (db) T A = 55 C T 0.8 A = 40 C TA = +25 C 0.9 TA = +85 C T.5 A = +25 C k 00k M 0M 00M G 0G Figure 6. Insertion Loss vs. Frequency over Various Temperature (RFx to ) =.65V TO 2.75V INSERTION LOSS (db) = 2.50V = 2.75V = 2.25V ISOLATION (db) S2 S2.0 T A = 25 C. 0k 00k M 0M 00M G 0G Figure 4. Insertion Loss vs. Frequency for VDD > 2.2 V (RFx to ) Zoomed View of Figure k 00k M 0M 00M G 0G Figure 7. Isolation vs. Frequency over Supplies (RFx to ) INSERTION LOSS (db) =.65V =.80V =.95V T A = 25 C 3.0 0k 00k M 0M 00M G 0G Figure 5. Insertion Loss vs. Frequency for VDD < 2 V (RFx to ) ISOLATION (db) T A = +25 C T A = +85 C T A = +25 C 60 T A = 40 C T A = 55 C 00 0k 00k M 0M 00M G 0G Figure 8. Isolation vs. Frequency over Various Temperature (RFx to ) Rev. A Page 7 of

8 Enhanced Product 0 [ T ] T TRIG'D Δ: 2.40mV 5 0 RETURN LOSS (db) OFF SWITCH ON SWITCH 30 = 2.5V T A = 25 C 35 0k 00k M 0M 00M G 0G CH.00V CH3.00mV M 20.0ns Figure 9. Return Loss vs. Frequency (RFx to ) Figure 2. Video Feedthrough CROSSTALK (db) IP3 (db) = 2.5V T A = 25 C 80 0k 00k M 0M 00M G 0G = 2.5V T A = 25 C FREQUCY (MHz) Figure 0. Crosstalk vs. Frequency Figure 3. Third-Order Intermodulation Intercept (IP3) vs. Frequency TEK RUN: 5.00GSPS ET VELOPE [ T ] A 3 RF/3 CH.00V CH2 00mV M 5.00ns CH3 00mV db INPUT COMPRESSION (dbm) = 2.5V 0 T A = 25 C FREQUCY (MHz) Figure. Switch Timing Figure 4. db Input Compression vs. Frequency (DC Bias Not Used) Rev. B Page 8 of

9 TEST CIRCUITS R L RFx R L V 50% 50% t ON 90% 0% t OFF OF 4 A RFx NETWORK ANALYZER INSERTION LOSS = 20log Figure 5. Switch Timing, ton () and toff () Figure 8. Insertion Loss NETWORK ANALYZER Ax RFx R L V Ax 0% 50% 50% t RISE 90% 90% t FALL 0% OF 4 A RF CROSSTALK = 20log R L Figure 6. Switch Timing, trise and tfall Figure 9. Crosstalk RF R L OSCILLOSCOPE RFx NC NETWORK ANALYZER NC OF 4 A OFF ISOLATION = 20log OF 4 A Figure 7. Off Isolation Figure 20. Video Feedthrough Rev. B Page 9 of

10 Enhanced Product SPECTRUM ANALYZER OF 4 A RF COMBINER RF SOURCE RF SOURCE SPECTRUM ANALYZER OF 4 A RF RF SOURCE VS Figure 2. Third-Order Intermodulation Intercept (IP3) Figure 22. db Input Compression (PdB) Rev. B Page 0 of

11 OUTLINE DIMSIONS PIN INDICATOR SQ BSC PIN INDICATOR EXPOSED PAD SQ SEATING PLANE TOP VIEW MAX 0.02 NOM COPLANARITY REF BOTTOM VIEW COMPLIANT TO JEDEC STANDARDS MO-220-WGGD-. Figure Lead Lead Frame Chip Scale Package [LFCSP] 4 mm 4 mm Body and 0.75 mm Package Height (CP-20-6) Dimensions shown in millimeters 0.20 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET B ORDERING GUIDE Model Temperature Range Package Description Package Option ADG904SCPZ-EP 55 C to +25 C 20-Lead Lead Frame Chip Scale Package [LFCSP] CP-20-6 ADG904SCPZ-EP-RL7 55 C to +25 C 20-Lead Lead Frame Chip Scale Package [LFCSP] CP-20-6 Z = RoHS Compliant Part Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D /7(B) Rev. A Page of