Bypasses for high Currents Wirelaid - Partial high Current Solution, Technology, Applications.

Transcription

1 Bypasses for high Currents Wirelaid - Partial high Current Solution, Technology, Applications

2 Agenda Introduction Design Guide Thermal Views Preisvergleich, thermische Betrachtung WIRELAID vs Standard Example of use Cost Comparison FAQ Need to know References Perspective Seite 2

3 Introduction Market requirements: Currents (300A and more) Logic (SMD, Fine Lines) Use on one single PCB Seite 3

4 Introduction Principle Use of wires to realize high current nets Power and controllers on one single PCB or layer Alternative to thick copper or low amount of layers Technique Welding of flat copper wires(1,4mm x 0,35mm) onto the treatment side (later inside) from standard copper foils After pressing, wires are inside the laminate, embedded in prepreg/raisin Additional cross section under a conventional copper track Outer layers keeps SMD cabability Seite 4

5 Introduction 3D Feature Deep milling through base material Complex clearance without connectors High cross small bending radiuses(<1mm) possible Secure and fully intergated 90 high current application Seite 5

6 Introduction For more intensive introduction, please use our web archive: Video recordings Presentationslides as pdf By the way: for all web contents Seite 6

8 WIRELAID versus Standard Customer requirement: 20K (35µm Base-Cu) 0,63mm² 8,9mm 4,5mm 1,9mm With WIRELAID saving of 78,7% width WIRELAID Cross section wire Cu over wire (35µm Base-Cu) Width standard track (35µm Basis-Cu) Reduction of width F14 0,5mm² 1,9mm 8,9mm 78,7% Seite 8

10 Design Guide NEU Since electronica 2014 there is the new WIRELAID Design Guide 1.2 new: Nomenclature new: Design notes for use of Wirelaid layers new: Cost comparison new: Current feeding english / french versions follows Seite 10

11 Design Guide: Nomenclature of WIRELAID Layer stack up MLn n = Number of layers a, b, c : Layers with wires Outer Layer Inner Layer Example shows a multilayer with 6 layers and wires under layer 1 and 6 Example shows a multilayer with 6 layers and wires under layer 2 and 5 Seite 11

12 Design Guide: Outer layer? Inner layer? Consideration 1: More complex logic devices use SMD components like controllers or memories with small pitches. To keep the SMD layers free for fine line structures, the wires are applied in the inner layers. Requirements concerning EMC and multiple power supplies, using the innerlayers, can be implemented with standard cores and copper thicknesses. The number of layers is, compared with the normal multilayer setup, almost equal, have a look at the stackup ML6 Wire@2@5: Seite 12

13 Design Guide: Outer layer? Inner layer? Consideration 2: When cooling thru direct contact to the housing plays a roll or power semiconductors like IGBTs or D²PACs are placed directly to the outer layer, then, a Wirelaid layer with welded wire will be used. Look at the stackup ML6 Wire@1@6.: This should be the aim for more simple logic devices as well. Furthermore many vias/thru holes can be saved and thereby costs, when the power components will be placed directly onto the welding pad from Wirelaid For more simple devices it is possible to reduce the number of layers Seite 13

15 Example of Use Permanent current charge 70 A Maximum temperature 80C Previous: 8 Layers, 6 Innelayers at 105µm Cu After: 4 Layers Wirelaid ML4 Wire@2 Cost advantage thru lower layer number and thin copper foils Seite 15

16 Cost comparison: conventional solution Initial situation A multilayer PCB with 6 layers at 105 micron copper, takes the high current part. The logic is placed at a separate fine line module, connected by PCB connectors to the main board New solution with WIRELAID Due to the possibility of fine line structures together at the assembly layers, the logic module can be completely integrated. All kind of connection technologies, as well as every other assembly costs for the module integration, can be cancelled. Seite 16

17 Cost comparison 1: PCB level 6-layer: inner 210µm / outer 70µm WIRELAID Saving from 2 layers Number of wires per manufacturing panel up to equal costs Seite 17

18 Cost comparison 2: System level Conventional solution New solution Power PCB ML6, 105µm, logic module & connectors WIRELAID PCB ML6 Mainboard Logic module Connectors Initials assembly Stencils AOI test Testcosts Set up costs per order Stock and logistics In practice:1/2 of the costs. Impressing as well is the high potential of savings at the Initials, which, seen absolutely, are decisive especially at lower volumes. Seite 18

19 Frequently asked questions from customer point of view FAQ WIRELAID Everydays exemplary experiences 1. Hot spots at wire transitions? 2. How can I realize power feeds in and out? Seite 19

20 FAQ Everydays experiences Hot Spots t wire transitions? No Increasing current densities Distances determined by wires and design rules Problem analysation Thermographic analyse Background: Power drop at ohmic P = I² x R, higher current density S Solution: Due to the high local heat capacity, not hot spot occurs (spreading) Valid relation: I [A] = 9,1 [mm²] 0,68 * ΔT [K] 0,43 Seite 20

21 FAQ: Power feeding through power elements Up to 50 A: SMD Power elements No pad drilling Ideal for WIRELAID Standard assembling and soldering Available is reel with suction cap In- and external thread M3 or M4 over 50 A: Press-Fit Powerelements Solderless, high reliable connections In- and external thread up to M10 Retention force by IEC Respect drill spec for pressfittechnolgy! No drill into WIRELAID wires! More Infos: we-online.com/powerelements Seite 21

22 FAQ: Power feeding through power elements Press-Fit Powerelements Drill spezification: Chemical surfaces HAL Surface Seite 22

23 FAQ: Power feeding through power elements Press-Fit Powerelements WIRELAID wires has not to be drilled! Cross section comparison: Welding area at wire / Pad: ca. 1mm 0,8mm² Connection in plated drill: Dia 1,45mm,* Wire thickness 0,35mm Cross section drill 1,45mm, 25µm Cu plating in drill: 0,6mm² 0,11mm² Seite 23

25 Thermal View (TRM Software Adam Research) Servo driver 75A Layout Wirelaid ML4 IL70µm, AL 35µm Cu Base Servo driver75a Layout conventionel ML6, je 70µm Cu Base Seite 25

26 Thermal View (TRM Software Adam Research) Setting the simulation area after : Current density S Electrical conductivity σ (Sigma) Thermal conductivity λ (Lambda) Layer Stack Up Seite 26

27 Thermal View (TRM Software Adam Research) Real IR Masuring Driver Servo Motor 75A Layout conventionel Tmax: 35,3 C Simulation result, Driver Servo Motor 75 A Layout WIRELAID Tmax 33,8 C Seite 27

28 Thermal View (TRM Software Adam Research) Real IR Measuring Driver Servo Motor 75 A Layout Wirelaid Tmax: 27,4 C Due to the WIRELAID setup, at better performance, a core (2layers) and base copper could be saved Seite 28

29 Thermal View: Demonstrator left: Multilayer 6 Layer each 105µm Cu right: 2 LayerML2 Wire@1@2 each 35µm Cu, Wires F14 Result at 50A: Equal heating, measured with OPTRIS IR Camera Kindly supported by Optris, Berlin Seite 29

30 The following is a short survey Which statement applies to WIRELAID? Seite 30

31 Agenda Introduction Design Guide Thermal Views Preisvergleich, thermische Betrachtung WIRELAID vs Standard Example of use Cost Comparison FAQ Needs to know References Perspective Seite 31

32 Need to know: Manufacturing of WIRELAID foils Manufacturing steps current stage of evolution : available are base materials and wires with adapted surfaces and fillings in proven combinations up to 180 C PCB working temperatures Seite 32

33 Need to know: Application range of WIRELAID The WIRELAID current capacity has no typical lower limit Also small, area sensitive devices can benefit Present applications realsizes up to 300 A The upper boarder of the currents limit only economic aspects The upper limit is only fixed at economic borders Any Questions? For more informations concerning higher currents, please contact directly our product management: wirelaid@we-online.de Seite 33

34 Need to know: Supplier base: WIRELAID License partners 5 licensed german manufacturers 2 asian manufacturers for high volumes Currently negotiations with two more potential asian partners Welding machines: 6. Evolution variant for extended use with other manufacturers Series production of various applications in the field of 10k / y Seite 34

35 References: WIRELAID Qualifications HTG Storage: Bosch Norm BV Y273 R h at 140 C Humidity climate: IPC TM h bei 85 C and 85% RH TWT: IPC 6012 B, 1000 Zyklen BV Y273 R80029 Corrosion: IPC612 B / TM 650 Testing for silver migration Permanent shock: EN Impulses (11ms) at max. 50G Delamination: IPC 6012B Solder bath test 10s at 288 C UL: Kategorie ZPMV2/8 Full Recognition with MOT and CTI in work Seite 35

36 References: WIRELAID Application Winderergy Pitchadjustment Previous: ML6 After: ML4 Seite 36

37 References: WIRELAID Apllication Industry AC Servo Amplifier Permanent current charge 50 A Maximum Temperature 80C Previous: 2 PCBs, 6 Layer 70µm After: 1 Leiterplatte, ML6 + 3D Benefit: Manufacturing, assembly, test, stock and loss of single modules and PCB connectors Seite 37

38 References: WIRELAID Application automotive Vehicle Components Endurance Test Bench Previous: After: Combination of flat wire / connector PCB, 2 PCBs ML4 1 PCB, ML4 + 3D Benefits: Eliminating all manual operations, fully integrated PCB connection, more usable PCB space Seite 38

39 References: WIRELAID Application E-Bike Drive controll, charging electronics (picture is exemplary) Previous: ML6 70µm/4x210µm/70µm After (in development): ML6 Wire each 70µm Benefits: Reduction to 70µm Cu base on all layers, PCB with smaller dimensions, easy to manufacture Seite 39

40 Perspective: Passive cooling Measurement 1 without WIRELAID ML4 Heating chip of Tu = 20 C to Tmax = 55 C, at nominal power dissipation (16,5W / cm²)? 15s image after operation Measurement 2 with WIRELAID ML4 Heating chip of Tu = 20 C to Tmax = 38 C, at nominal power dissipation (16,5W / cm²) Image after 15s operating Note the significant heat spreading over the horizontal wires and the lower temperature after the measuring time Tmax Much improved situation, and NO hot spot spot Seite 40

41 Perspective: Powerflex Embedded wires through Semiflex-Area Combination buckling and bending area Signals and currents transported over buckling areas We have now arrived at the end of the webinar. You see, WIRELAID is an interesting tool in electronic development and design. I hope you were able to gain new knowledge or extend existing ones. Seite 41

42 Thank you for your attention Seite 42