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1 Preface xiii Introduction xv 1 Planning for surface mount design General electronic products 3 Dedicated service electronic products 3 High-reliability electronic products 4 Defining the environmental use category 6 Defining SMT assembly type and complexity 8 Adapting SIP, SIM, and MCM 9 Planning the SMT assembly 11 Component package selection Component selection for SMT 13 Components for surface mount technology 13 Mixed technology 13 Planning component requirements 14 Standard devices for SMT 14 Passive devices for SMT 14 Packaging for automation 19 Resistor networks 19 Potentiometers for SMT 20 Monolithi capacitors 22 Chip capacitor selection 23 Dielectric type 23 Standard mo.lded tantalum capacitors 24 Nonstandard miniature tantalum devices 26 Inductor devices for SMT 26

2 Standard surface mount diodes 26 Standard transistor packaging for SMT 27 Transistor array packaging 29 Integrated circuits for SMT 30 IC packaging standards 31 Small outline IC 31 SOIC 34 Thin small outline package (TSOP) 34 Plastic lead chip carriers and quad packages (PLCC) 35 SOJ (small outline J lead) package 37 Quad flat pack for SMT 39 JEDEC O.O25-in lead pitch QFP 39 EIAJ/JEDEC Shrink Quad Flat Pack (SQFP) 40 Square SQFP device 40 Rectangular SQFP devices 41 Ball Grid Array (BGA) packaging 42 Standards for BGA packaging 43 Plastic Ball Grid Array 43 Ceramic Column Grid package 44 Standard contact matrix 44 Chip Scale (CSP) packaging 44 3 Land pattern development for SMT 47 Land pattern planning 47 Passive component land pattern design 48 Optional wave-solder land pattern design for passive components 51 MELF component land pattern geometry 54 Plastic diode land pattern 55 Tantalum capacitor land pattern 55 Inductor land patterns 55 Transistor land patterns 56 SOT -23 contact geometry 57 SOT -23 placement and spacing 57 SOT -89 contact geometry 58 SOT Small outline IC 59 SOIC contact geometry 61 Land pattern for the EIAJ SOP family 61 Alternative land patterns for JEDEC/EIAJ devices 62

3 TSOP land patterns 63 SOJ device 63 Plastic-leaded chjp carriers (PLCC) 64 Quad Flat Pack ICs 67 JEDEC QFP land pattern 68 Ceramic IC devices for SMT 69 Ball grid array land patterns 71 Die Grid Array land patterns 71 Requirements for CAD/CAM data transfer 72 Establishing a component data base for CAD/CAM Review of component packaging standards 74 Developing usable machine program data 76 CAD data for fixture development Space planning and interface 79 Space study for SMT 79 Estimating total component area 80 Component spacing for SMT 81 Component placement 81 Preferred orientation for SMT assembly 82 Fine pitch, QFP, and SOIC space planning 83 Using both sides of the substrate 83 Trace-to-contact guidelines for SMT 85 Spacing for higher profile components 88 Modular PC board planning 89 Wave solder processing surface mount devices 91 Connectors and interface for SMT assembly 95 Heat seal 96 Compression 97 DIP and SIP module design 98 Low profile edge pins 100 Standards for SMT memory module 102 Quad module design 102

4 Providing for chip device attachment 107 Component spacing 108 Land pattern to via pad connection 110 Interconnecting SOT-23 components 113 Solder mask for solder control 113 Conductor trace routing 118 Contact (land) to via pad 119 Providing for vision-aided assembly automation 119 Mixed technology leaded for through-hole and surface mount 1 Axial lead device mounting 122 Hole diameter and spacing requirements for leaded devices 122 Axial lead component placement guidelines 122 Axial lead component spacing 125 Design guidelines for DIP ICs 125 Hole size recommendation for DIP ICs 127 Spacing between DIP ICs and sockets 128 DIP socket spacing for auto insertion 128 Surface mount device for wave solder 128 Chip component land pattern options for wave solder 129 Device selection guidelines for wave solder 131 Component-to-board edge requirement for mixed technology 132 Alternative reflow/wave solder processes 132 Planning for double reflow-wave SMT layout and guidelines for flexible circuits Base material selection 136 Base material properties for flexible circuits 136 Preferred materials for SMT solder processing 136 Fabrication of flex and rigid-flex circuits 137 Rigid support for flex circuits 137 Rigid-flex circuit construction 138 Flex circuit design guidelines 139 Conductor trace routing 139 Fold line considerations 140 Two-sided conductorouting 140 Circuit conductor width and air gap 140 Hole size to pad recommendations 141 Trace connections and filleting 142 Cover layer openings for SMT land patterns 142

5 Strain relief and tear restraint methods 143 SMT components near a fold line 144 Inside corner support 144 Panelization for automated assembly processing Fiducial targets for assembly automation 146 Documentation requirements Design requirements for fine-pitch devices Factors that influence the use of fine pitch 149 Planning the substrate 149 Typical device package description 150 Allowance for physical tolerances of devices 151 Land pattern development 151 Design impact on assembly efficiency 151 Avoiding solder process defects 153 Concerns and process refinement 153 Solder paste stencil development 154 Fiducial targets for stencil alignment 154 Placement accuracy and land pattern geometry 155 Solder process evaluation 156 Cause and effect of solder defects 157 Defining solder mask requirements 157 Land pattern development for fine pitch 158 Converting metric dimensions Providing for test automation Planning for automatic testing 161 In-circuitest 162 Requirements for ICT 163 ICT checklist 163 Function cluster test 163 Board level functional test 164 Test probe design options 164 Test contact size and spacing 165 Test point contact size and spacing 166 Test probe contact identification 166 Tooling holes for"fixture alignment 167 Design for test checklist 170 Test fixture preparation 171

6 9 Specifying substrate materials and fabrication options 173 Base material selection for PC boards 173 High-performance PC board materials 174 Laminated material for SMT and MCM-C 174 High-performance laminates 175 Ceramic Multichip Module MCM-C 176 Fabrication and material planning 177 Fabrication options 179 Panel planning 180 Dimensioning the PC board substrate 180 Multilayer and fine line 180 Via hole planning 181 Smaller via holes for high-density multilayer SMT and MCM-L 182 Providing for high-density circuit routing 183 Plated through-holes for lead device attachment 184 Higher circuit density for SMT 186 Multilayer design considerations 187 Providing for CAD auto-routing of circuits 187 Selecting solder mask material 188 Plating options for SMT 189 Specify standard materials 190 Preparing the printed circuit board fabrication detail 190 Furnish specific requirements 190 Planning efficient material usage 192 Panel planning for thin materials 192 Plating requirements for COB processing 193 Plating process for SMT 194 Typical fabrication notes for a two-sided surface mount PC board 194 Bare board test 195 Base materials for flex circuits 196 Copper foil lamination 196 Single conductor layer flex circuit 196 Coverlay preprocessing 198 Coverlay lamination and piercing 198 Double conductor layer flex circuit 198 Finish coat option 198 Post plating and die cutting 198 Die cutting 199 Finish coat or plating options 200 Rigid-flex circuit fabrication 200

7 High-tech materials for military applications 201 Specifying Copper-clad Invar 202 Materials for Copper-clad Invar-Polyimide substrate fabrication 205 Recommendations to ensure successful CCI fabrication SMT assembly process 207 Planning the SMT assembly process 207 Double-sided surface mount 208 Wave solder for SMT assembly 209 Retlow process options 210 Cleaning retlow-soldered assemblies 211 Equipment planning for SMT assembly 212 Alternative solder processes 213 Planning SMT equipment 214 Planning the SMT assembly process 214 Case study product description 215 Assembly considerations 216 Solders for component attachment 218 Using solder pastes with SMT 218 Solder application 220 Providing for automatic vision alignment 222 Selecting solder paste for fine pitch 223 Viscosity testing 224 Fine-pitch solder stencil development 224 Alternative stencil materials 225 Solder volume measurement 225 Retlow-solder processing for no-clean solder 226 Concerns and process refinement Aqueous cleaning for surface mount assemblies: Elimination of CFC materials from the SMT manufacturing environment 227 Identify impact on materials and process 229 PC board layout and component density 229 Solder mask and cleaning 230 Cleaning issues f.or surface mount devices 232 Concerns for unique stacked assembly types 233 Efficiency on fine-pitch devices 233

8 Testing solder paste materials 234 Example of testing program description 234 Cleaning systems evaluation 236 Cost benefit of aqueous systems 236 Water filtering and disposal Design evaluation for efficient assembly processing Inspection of the PC board 239 Verify dimensional accuracy 240 Assembly documentation 240 Bill of material 242 Fabrication detail 242 Photo tool (art work) review 242 Post process assembly evaluation 243 Design for test 244 General considerations for in-circuitest automation 244 General design recommendations 245 Issues related to fine pitch 245 Test automation concerns 246 Process control and inspection 246 Assembly process development 247 Requirements for process development 248 EIAJ/JEDEC Shrink Quad Flat Pack (SQFP) 248 Square SQFP Device 249 Rectangular SQFP Devices 250 Thin Small Outline Package(TSOP) 250 Process monitoring for two-sided SMT Index 253

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