Data Sheet. ACPL-K370, ACPL-K376 Isolated Voltage/Current Detector. Description. Features. Applications. Functional Diagram. Connection Diagram

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1 ACPL-K7, Isolated Voltage/ Detector Data Sheet Description The ACPL-K7 and are voltage/current threshold detection optocouplers. The is a lowcurrent version of the ACPL-K7. To obtain lower current operation, the uses a high-efficiency AlGaAs LED which has higher light output at lower drive currents. Both devices have a threshold sensing input buffer IC that allows threshold levels to be set by a single external resistor over a wide range of input voltages. The input buffer has several performance enhancing features: hysteresis for extra noise immunity and switching immunity, a diode bridge for easy use with AC input signals, and internal clamping diodes to protect the buffer and LED from over-voltage and over-current transients. Because threshold sensing is done prior to driving the LED, variations in optical coupling from the LED to the detector will not effect the threshold levels. The ACPL-K7 input buffer IC has a nominal turn-on threshold of.8 V(V TH+ ) and.77 ma (I TH+ ). The buffer IC for the is designed for lower input current. The nominal turn-on threshold for the is.8 V (V TH+ ) and. ma (I TH+ ), which reduces power dissipation by %. The high-gain output stage features an open-collector output for both TTL compatible saturation voltages and CMOS compatible breakdown voltages. By combining many unique functions in a single package, the ACPL-K7 and are ideal components for industrial control computer input boards and other applications where a predetermined input threshold level is needed. Functional Diagram Features ± % voltage detection accuracy Wide AC or DC detection range: up to Vpeak User configurable single/dual detection levels Built-in hysteresis improves noise immunity Very low threshold current:. ma () Logic compatible output Wide output supply voltage: V to 8 V C to + C operating temperature range SSO-8 package with 8 mm creepage and clearance Safety and regulatory approval: IEC/EN/DIN EN 677--: Vpeak working insulation voltage UL 77: Vrms/minute double protection rating CSA: Component Acceptance Notice # Applications Limit switch sensing Low voltage detector AC mains and DC-link voltage detection Relay contact monitor Relay coil voltage monitor sensing Microprocessor interfacing Telephone ring detection Connection Diagram AC I CC 8 V CC ISOLATION BARRIER D D R X DC+ DC D D I O 7 6 NC V O TRUTH TABLE (POSITIVE LOGIC) AC/DC POWER CONTROLLER AC GND INPUT H L OUTPUT L H GND ACPL-K7 GND Figure. Functional Diagram Figure. Connection Diagram

2 Table. Ordering Information The ACPL-K7 and are UL recognized with Vrms for minute per UL77. Part number ACPL-K7 Option RoHS Compliant Package Surface Mount Tape & Reel IEC/EN/ DIN EN Quantity -E X 8 per tube -6E Stretched X X 8 per tube -E SO-8 X X per reel -6E X X X per reel To form a complete ordering part number, choose a part number from the part number column and combine it with the desired option from the option column. Example : ACPL-K7-6E orders an RoHS compliant part with an IEC/EN/DIN EN certification and Tape & Reel packaging. Package Outline Drawings Stretched SO-8 Package (SSO-8) RECOMMENDED LAND PATTERN.8 ±. (. ±.) PART NUMBER DATE CODE.6 (.) Z = OPTION CODE [] RoHS-COMPLIANCE INDICATOR K7 Z YYWW 6.87 ±.7 (.68 ±.).9 (.) 7.8 ±.7 (. ±.). (.8).9 ±.7 (.6 ±.).8 ±. (. ±.).7 (.) BSG Note. V = Options comprise 6; other options are not marked. Figure..7 ±. (.9 ±.). ±. (. ±.) Dimensions in millimeters and (inches). Lead coplanarity =. mm (. inches).. ±. (.8 ±.)

3 Recommended Lead-Free IR Soldering Profile The recommended reflow soldering profile is per JEDEC Standard J-STD- (latest revision). Non-halide flux should be used. Regulatory Information The ACPL-K7/K76 is approved by the following organizations: IEC/EN/DIN EN (with option 6) Approved with a maximum working insulation voltage of V IORM = Vpeak, and with a highest allowable overvoltage of V IOTM = 8 Vpeak. UL Approval under the UL 77 component recognition program up to V ISO = V RMS / minute. File E6. CSA Approval under CSA Component Acceptance Notice #, File CA 88. Table. Insulation Related Specifications Parameter Symbol Value Units Conditions Minimum External Air Gap L(IO) 8 mm L(IO) (Clearance) Minimum External Tracking Path L(IO) 8 mm Measured from input terminals to output terminals (Creepage) Minimum Internal Plastic Gap.8 mm Through insulation distance conductor to conductor (Clearance) Tracking Resistance CTI 7 V DIN IEC /VDE Part Isolation Group (per DIN VDE 9) IIIa Material Group DIN VDE 9

4 Table. IEC/EN/DIN EN Insulation Related Characteristics [] (with option 6) Description Symbol Characteristic Units Installation Classification per DIN VDE /.89, Table : for rated mains voltage Vrms for rated mains voltage Vrms for rated mains voltage 6 Vrms for rated mains voltage Vrms Climatic Classification // Pollution Degree (DIN VDE /.89) Maximum Working Insulation Voltage V IORM Vpeak Input to Output Test Voltage, Method b V IORM x.87 = V PR, % Production Test with t m = second, Partial Discharge < pc V PR 7 Vpeak Input to Output Test Voltage, Method a V IORM x.6 = V PR, Type and sample test, t m = seconds, Partial Discharge < pc I-IV I-III I-III I-II V PR 8 Vpeak Highest Allowable Overvoltage (Transient overvoltage, t ini = 6 seconds) V IOTM 8 Vpeak Safety Limiting Values (Maximum values allowed in the event of a failure) Case Temperature Input [] Output Power [] T S I S,INPUT P S,OUTPUT Insulation Resistance at T S, V IO = V R S 9 Notes:. Insulation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits within the application.. Safety-limiting parameters are dependent on case temperature. The input current, I S,INPUT, should be derated linearly above C free-air case temperature at a rate of. ma / C; the Output Power, P S,OUTPUT, should be derated linearly above C free-air case temperature at a rate of mw / C. 7 6 C ma mw

5 Table. Absolute Maximum Ratings Parameter Symbol Min Max Units Note Storage Temperature T S C Operating Temperature T A C Input, Average I IN ma Input, Surge I IN ma, Input, Transient I IN ma, Input Voltage (Pins -) V IN. V Input Power Dissipation P IN mw Total Package Power Dissipation P T 69 mw Output Power Dissipation P O 6 mw Output, Average I O ma 6 Supply Voltage (Pins 8-) V CC. V Output Voltage (Pins 6-) V O. V Lead Solder Temperature 6 C for seconds, measured at.6 mm below seating plane. Notes:. into or out of any single lead.. Surge input current duration is ms at a Hz pulse repetition rate. Transient input current duration is μs at a Hz pulse repetition rate. Note that the maximum input power, PIN, must be observed.. Derate linearly above C free-air temperature at a rate of mw / C. The maximum input power dissipation of mw allows an input IC junction temperature of C at an ambient temperature of T A = C. Excessive P IN and T J may result in IC chip degradation.. Derate linearly above C free-air temperature at a rate of. mw / C.. Derate linearly above C free-air temperature at a rate of 8. mw / C. A maximum output power dissipation of 6 mw allows an output IC junction temperature of C at an ambient temperature of T A = C. 6. Derate linearly above C free-air temperature at a rate of. ma / C. Table. Recommended Operating Conditions Parameter Symbol Min Max Units Note Supply Voltage V CC 8 V Operating Temperature T A C Operating Frequency, V CC = V f 9 khz Operating Frequency, V CC =. V f khz Notes:. Maximum operating frequency is defined when the output waveform at pin 6 obtains only 9% of V CC with R L =.7 k, C L = pf using a V square wave input signal.

6 Table 6. Electrical Specifications Unless otherwise noted, T A = C to + C and V CC = V to. V. Parameter Sym. Device Min Typ [] Max Units Test Conditions/Notes Fig. Upper Threshold V TH+.6.8 V T A = C, V IN = V DC+ V DC ;, 6 Voltage, DC Input ( %) (+%) AC and AC open (Pins, ).. V V IN = V DC+ V DC ; AC and AC open, 6 Lower Threshold Voltage, DC Input (Pins, ) Upper Threshold Voltage, AC Input (Pins, ) Lower Threshold Voltage, AC Input (Pins, ) Upper Threshold Upper Threshold Lower Threshold V TH. ( %) V TH+.7 ( 6%) V TH.7 ( 6%).9.7 (+%) V T A = C, V IN = V DC+ V DC ; AC and AC open..96 V V IN = V DC+ V DC ; AC and AC open, 6. (+6%) V T A = C, V IN = V AC V AC, DC+ and DC open; Note.. V V IN = V AC V AC, DC+ and DC open, 6.8. (+6%) V T A = C, V IN = V AC V AC, DC+ and DC open.87. V V IN = V AC V AC, DC+ and DC open, 6 I TH+ ACPL-K ma T A = C, ma, 6 I TH+...6 ma T A = C, ma, 6 I TH ACPL-K ma T A = C, 6.6 ma, 6 Lower Threshold I TH ma T A = C, 6..8 ma, 6 Hysteresis I HYS ACPL-K7. ma I HYS = I TH+ I TH.6 ma Voltage Hysteresis V HYS. V V HYS = V TH+ V TH Input Clamp Voltage V IHC V V IHC = V DC+ V DC, I IN = ma, AC & AC connected to DC V IHC V V IHC = V AC V AC, I IN = ma, DC+ and DC open V IHC.. V V IHC = V DC+ V DC, I IN = ma, AC & AC open V ILC.76 V V ILC = V DC+ V DC, I IN = ma Input I IN ACPL-K7..9. ma V DC+ V DC = V, AC and AC open 8 Input I IN..9. ma V DC+ V DC = V, AC and AC open 8 Bridge Diode V D, ACPL-K7.9 V I IN = ma Forward Voltage.7 V I IN =. ma V D, ACPL-K7.78 V I IN = ma.7 V I IN =. ma Logic Low Output V OL.. V V CC =. V, I OL =. ma; Note 8 Voltage Logic High Output I OH A V OH = V CC = 8 V; Note Logic Low Supply I CCL ACPL-K7.9 ma V DC+ V DC = V, V O open 9. ma Logic High Supply I CCH. A V CC = 8 V, V O open 7 Input Capacitance C IN pf f = MHz, V IN = V Notes:. All typical values are at T A = C unless otherwise stated.. AC voltage is instantaneous voltage.. A logic Low output level at pin 6 occurs under the conditions of V IN V TH+ as well as the range of V IN > V TH once V IN has exceeded V TH+.. A logic High output level at pin 6 occurs under the conditions of V IN V TH as well as the range of V IN < V TH+ once V IN has decreased below V TH., 6, 6, 6 6

7 Table 7. Switching Specifications Unless otherwise noted, T A = C to + C. Parameter Sym Device Min Typ [] Max Units Test Conditions/Notes Fig. V CC =. V Propagation Delay Time to Logic Low at Output Propagation Delay Time to Logic High at Output Output Rise Time (-9%) Output Fall Time (9-%) V CC =. V Propagation Delay Time to Logic Low at Output Propagation Delay Time to Logic High at Output Output Rise Time (-9%) Output Fall Time (9-%) V CC = V to. V Common Mode Transient Immunity at Logic High Output Common Mode Transient Immunity at Logic Low Output t PHL ACPL-K s R L =.7 k, C L = pf; Note 6.. s ACPL-K s R L =.8 k, C L = pf; Note 6.. s t PLH ACPL-K7.8 7 s R L =.7 k, C L = pf; Note. 7 s ACPL-K7 8. s R L =.8 k, C L = pf; Note 6. s t R ACPL-K7 s R L =.7 k, C L = pf s t F ACPL-K7. s R L =.7 k, C L = pf. s t PHL ACPL-K7 7. s R L =.7 k, C L = pf; Note 6.8. s ACPL-K7 7. s R L =.8 k, C L = pf; Note 6.9. s t PLH ACPL-K7 9 9 s R L =.7 k, C L = pf; Note 8. 9 s ACPL-K7.8 7 s R L =.8 k, C L = pf; Note. 7 s t R ACPL-K7 7 s R L =.7 k, C L = pf 6 s t F ACPL-K7. s R L =.7 k, C L = pf. s CM H kv/ s I IN = ma, R L =.7 k, V O,MIN = V, V CM = V; Notes, CM L ACPL-K7 kv/ s I IN =. ma, R L =.7 k, V O,MAX =.8 V, V CM = V; Notes, kv/ s I IN =.6 ma, R L =.7 k, V O,MAX =.8 V, V CM = V; Notes, Notes:. All typical values are at T A = C unless otherwise stated.. The t PHL propagation delay is measured from the. V level of the leading edge of a. V input pulse ( s rise time) to the. V level on the leading edge of the output pulse. C L includes probe and stray wiring capacitance.. The t PLH propagation delay is measured from the. V level of the trailing edge of a. V input pulse ( s fall time) to the. V level on the trailing edge of the output pulse. C L includes probe and stray wiring capacitance.. Common mode transient immunity with a logic High level is the maximum tolerable (positive) dv CM /dt on the leading edge of the common mode pulse, V CM, to insure that the output will remain in a logic High state (i.e., V O >. V). Common mode transient immunity in logic Low level is the maximum tolerable (negative) dv CM /dt on the trailing edge of the common mode pulse signal, V CM, to insure that the output will remain in a logic Low state (i.e., V O <.8 V).. In applications where dv CM /dt may exceed kv / μs (such as when a static discharge occurs), a series resistor, R CC, should be included to protect the detector IC from destructive high surge currents. The recommended value for R CC is per volt of allowable drop in V CC (between pin 8 and V CC ) with a minimum value of. 7

8 Table 8. Package Characteristics Over recommended temperature range of T A = C to C unless otherwise specified. Parameter Symbol Min Typ Max Units Test Conditions Input-Output Momentary Withstand Voltage V ISO Vrms RH %, t = min; T A = C; Notes to Input-Output Resistance R I-O V I-O = Vdc; Note Input-Output Capacitance C I-O.6 pf f = MHz, V I-O = Vdc; Note Notes:. The input-output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN Insulation Characteristics Table (if applicable), your equipment level safety specification, or Avago Application Note 7, Optocoupler Input-Output Endurance Voltage.. Device considered a two terminal device: pins,,, connected together, and pins, 6, 7, 8 connected together.. In accordance with UL 77, each optocoupler is proof tested by applying an insulation test voltage 6 Vrms for second (leakage detection current limit, I I-O A). 8

9 Typical Performance Plots Unless otherwise noted, T A = C. IIN - INPUT CURRENT - ma DC INPUT, SHORT PINS &, SHORT PINS & V IN - INPUT VOLTAGE - V Figure. Typical input characteristics I IN vs. V IN (AC voltage is an instantaneous value). AC INPUT, PINS, OPEN DC INPUT, PINS, OPEN VO - OUTPUT VOLTAGE - V 6 V CC = V R L =.7 kω Input Signal Device TH+ TH I TH ACPL-K7.77mA.mA.mA.68mA Input Connection PINS, OR, V TH(DC) ALL.8V.9V PINS, TH- INPUT SIGNAL (a) TH+ V TH(AC) ALL V.8V PINS, (b) Figure. (a) Typical transfer characteristics, and (b) Input threshold levels. VTH - THRESHOLD VOLTAGE - V V TH+ V TH I TH I TH+ ACPL-K ITH - THRESHOLD CURRENT -ma VTH - THRESHOLD VOLTAGE - V V TH+ I TH I TH+ V TH ITH - THRESHOLD CURRENT -ma Figure 6. Typical DC threshold levels vs. temperature for (a) ACPL-K7, and (b). 9

10 ICCH - HIGH LEVEL SUPPLY CURRENT - A E+ E- E- E- E- E Figure 7. Typical high level supply current, I CCH vs. temperature. IIN - INPUT CURRENT - ma ACPL-K7 I IN V DC+ V DC = V, AC AND AC OPEN V OL V CC =.V, I OL =.ma (a) VOL - LOW OUTPUT VOLTAGE - mv IIN - INPUT CURRENT - ma V OL V CC =.V, I OL =.ma (b) VOL - LOW OUTPUT VOLTAGE - mv Figure 8. Typical input current, I IN, and low level output voltage, V OL vs. temperature for (a) ACPL-K7 and (b). ICCL - LOGIC LOW SUPPLY CURRENT - ma ACPL-K V CC - SUPPLY VOLTAGE - V (a) ICCL - LOGIC LOW SUPPLY CURRENT - ma V CC - SUPPLY VOLTAGE - V (b) Figure 9. Typical logic low supply current vs. supply voltage for (a) ACPL-K7 and (b).

11 tp - PROPAGATION DELAY - s R L =.7k, C L = pf, V CC =.V ACPL-K TA - TEMPERATURE - C (a) Figure. Typical propagation delay vs. temperature for (a) ACPL-K7 and (b). t PLH t PHL tp - PROPAGATION DELAY - s R L =.7k, C L = pf, V CC =.V t PLH t PHL (b) tr - RISE TIME - s R L =.7k, C L = pf, V CC =.V ACPL-K (a) Figure. Typical rise, fall times vs. temperature for (a) ACPL-K7,and (b). t R t F tf - Fall Time - ns tr - RISE TIME - s R L =.7k, C L = pf, V CC =.V (b) t R t F tf - Fall Time - ns V± - EXTERNAL THRESHOLD VOLTAGE - V V + (AC) ACPL-K7 V +(DC) V (AC) V (DC) DC: V TH+ =.8V, V TH =.9V; AC: V TH+ = V, V TH =.8V; I TH+ =.77mA, I TH =.ma (AC VOLTAGE IS INSTANTANEOUS VALUE) 8 6 R X - EXTERNAL SERIES RESISTOR - k (a) Figure. Typical external threshold characteristics, V ± vs. R X for (a) ACPL-K7 and (b). V± - EXTERNAL THRESHOLD VOLTAGE - V V + (AC) V + (DC) V (AC) V (DC) DC: V TH+ =.8V, V TH =.9V; AC: V TH+ = V, V TH =.8V; I TH+ =.ma, I TH =.68mA (AC VOLTAGE IS INSTANTANEOUS VALUE) R X - EXTERNAL SERIES RESISTOR - k (b)

12 Electrical Considerations The ACPL-K7/K76 optocouplers have internally temperature compensated, predictable voltage and current threshold points. This allows a single external resistor, R X, to determine larger external threshold voltage levels. For a desired external threshold voltage, V ±, the approximate R x value is shown in Figure. Equation can be used to calculate Rx. V + and V voltage threshold levels can be simultaneously set with two resistors, R X and R P, as shown in Figure and determined by Equations and. R X can provide over-current transient protection by limiting input current during a transient condition. For monitoring contacts of a relay or switch, the ACPL-K7/ K76 in combination with R X and R P can be used to allow a specific current to be conducted through the contacts for cleaning purposes (wetting current). The choice of which input voltage clamp level to choose depends upon the application of this device (see Figure ). It is recommended that the low clamp condition be used when possible. The low clamp condition in conjunction with the low input current feature will ensure extremely low input power dissipation. In applications where dv CM /dt may be extremely large (such as with a static discharge), a series resistor, R CC, should be connected in series with V CC and pin 8 to protect the detector IC from destructive high surge currents. The recommended value for R CC is per volt of allowable drop in V CC (between Pin 8 and V CC ) with a minimum value of. In addition, it is recommended that a ceramic disc bypass capacitor of. F be placed between pins and 8 to reduce the effect of power supply noise. For interfacing ac signals to TTL systems, output low pass filtering can be performed with a pull-up resistor of. k and F capacitor. This application requires a Schmitt trigger gate to avoid slow rise time chatter problems. For AC input applications, a filter capacitor can be placed across the DC input terminals for either signal or transient filtering. V ± R I TH± X AC V TH± R P DC+ DC AC ISOLATION BARRIER V CC NC V O GND R L C L V CC V O Either AC (pins and ) or DC (pins and ) input can be used to determine external threshold levels. For single specifically selected external threshold voltage level V + or V, R X can be determined without use of R P via: V +( ) V TH+( ) R X = Equation I TH+( ) For dual specifically selected external threshold voltage levels, V + and V, the use of R X and R P will permit this selection. Two equations can be written: V TH+ V + = R x ( I TH+ + ) + V TH+ Equation R P V TH V = R x ( I TH + ) + V TH Equation R P Solving these equations for R X and R P yields the following two expressions: V TH (V + ) V TH+ (V ) R X = Equation I TH+ (V TH ) I TH (V TH+ ) V TH (V + ) V TH+ (V ) R P = Equation I TH+ (V V TH ) + I TH (V TH+ V + ) where V + and V are the desired external voltage threshold levels, and values for V TH± and I TH± are found from the data sheet. Equations and are valid only if the conditions of Equations 6 or 7 are met. With the V TH± and I TH± values, the denominator of Equation is checked to see if it is positive or negative. If it is positive, then the following ratios must be met: V + V TH+ V + V TH+ I TH+ and < Equation 6 V V TH V V TH I TH Conversely, if the denominator of Equation is negative, then the following ratios must hold: V + V TH+ V + V TH+ I TH+ and > Equation 7 V V TH V V TH I TH Refer to Application Note for more application information and worked out examples. Figure. External threshold voltage level selection. GND

13 For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, the A logo and R Coupler are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright - Avago Technologies. All rights reserved. AV-EN - January 9,