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1 carrousel CMP is a service organization in ICs and MEMS for prototyping and low volume production. Design A Design B Your design Alimentée par CMS Le carrousel est alimenté par la base de données avec photos et texte en légende des photos A prévoir uniquement >>>>>>>>>> Flash info >>>>>>>>>> Articles Cooperative Liens agreements sur les tutelles

2 ! La base de données avec photos, textes, news, dates d évènements etc. sera alimentée par CMS. Articles Cooperative agreements

3 From layouts to chips carrousel Your Design CMP Your Chip Articles Cooperative agreements

4 carrousel CMP will exhibit at the following Conferences / Symposiums. Articles Cooperative agreements

5 carrousel Articles Cooperative agreements

6 carrousel First 3D IC MPW run from the partnership CMC/CMP/MOSIS Tezzaron Articles Cooperative agreements

7 carrousel CMP offers a complete assembly service based on a wide range of ceramic and plastic packages for prototypes and low volume production. Articles Cooperative agreements

8 carrousel A 55 million transistor many core chip made on ST's 65nm CMOS Courtesy of B. Baas et al., University of California, Davis Articles Cooperative agreements

9 carrousel CMP provides two types of MEMS technologies for prototyping : Integrated bulk micromachining technologies and specific surface micromachining technologies. Articles Cooperative agreements

10 A 55 million transistor many core chip made on Carrousel plus petit avec liens sur les ST's 65nm CMOS photos.pdf CMP is a service organization in ICs and MEMS for prototyping and low volume production. Circuits are fabricated for Universities, Research Laboratories and Industrial companies. Advanced industrial technologies are available in CMOS, SiGe BiCMOS, HV CMOS, SOI, P HEMT GaAs, MEMS, 3D IC, etc. CMP distributes and supports several CAD software tools for both Industrial Companies and Universities (statistiques). Since 1981 (history), more than 1000 Institutions from 70 countries have been served, more than 7100 projects have been prototyped through 920runs, and 69 different technologies have been interfaced. Check the annual report and the shown presentations during the annual user meeting for more information. Flyers: CMP General flyer (May 14) CMP MEMS flyer (May 14) CMP PV & Storage flyer (Oct 12) Base de données Alimentée par CMS Articles Cooperative agreements

11 carrousel A 55 million transistor many core chip made on ST's 65nm CMOS Latest news All the news Latest annual meeting (23 Jan 14) Khalifa University Signs Agreement with CMP Annual Report (2013) Alimenté par la base de données Alimentée par CMS Next events All the events DATE 9 13 Mar 2015 DAC 7 11 Jun 201 Articles Cooperative agreements

12 Alimenté par la base de données Annual Report (PDF) Previous reports Logiciel gt défilement des pages à installer idem par ex. le périodique «Le Monde» Articles Cooperative agreements

13 Shown presentations during the last users meeting Page agenda en html Alimenté par la base de données.pdf carrousel Registration De Nov à Janv. Formulaire d inscriptions en ligne sans moyen de paiement Articles Cooperative agreements

14 Since 1981 Technical developments offered by CMP A few key dates in local history Full page scrolling sur les titres Alimenté par la base de données Grenoble s environment Grenoble offers a very good environment in terms of Education, Research, High Tech Activities, Industry. Articles Cooperative agreements 24 Oct. 14

15 Technical developments offered Scrolling sur les dates 1981 > > > >2014 Articles Cooperative agreements 24 Oct. 14

16 Contribution to industry development Over 110 industries prototyping IC through CMP Among them many European companies Telstra Research Laboratories Victoria AUSTRALIA Micred Ltd Budapest HUNGARY Thomas NEUROTH Vienna AUSTRIA Aurelia Microelettronica S.p.a. Pisa ITALY PERASO Montréal CANADA INTERLAB S.r.l. Roma ITALY Jydsk Telefon Tranbjerg DENMARK Optoellettronica Italia S.r.l. Tergalo ITALY AOI Electronics, VLSI Design Center Cairo EGYPT Toyota R&D Labs Aichi JAPAN Si-Ware Systems Cairo EGYPT Technology Research Laboratory of Clarion Co Ltd Fukusima JAPAN VTT INFORMATION TECHNOLOGY Espoo FINLAND Matsushita Electric Industrial Co. Ltd Kaw asaki JAPAN Ylinen Electronics Kauniainen FINLAND ASTEM RI Kyoto JAPAN Centre Technique des Moyens d Essais (CTME ex. ETCA) Arcueil FRANCE Micro Signal Co. Lte Kyoto JAPAN SAGEM SA Argenteuil FRANCE HSD co Ltd Saitama JAPAN R.E.M.F Radio Communications et Avionique S.A Beauzelle FRANCE OKI Electric Industry Co, Ltd Tokyo JAPAN NIPSON SAS Belfort FRANCE Maruw a Sokki Co LTd Tokyo JAPAN Aérospatiale Division Missiles Chatillon FRANCE Korea Telecom Seoul KOREA SYSOPTIC Clichy FRANCE TM Research & Development Sdn Bhd Serlangor MALAYSIA BOSCH Drancy FRANCE ISSIS b.v. Budelshoot NETHERLANDS THALES Systèmes Aéroportés Elancourt FRANCE Catena Holding B.V. Delft NETHERLANDS ID3 Semiconductors Fontanil FRANCE Philips Research Eindhoven NETHERLANDS SILWAY Gradignan FRANCE ALMA Electronic System Design Enschede NETHERLANDS ID-MOS Gradignan FRANCE AEMICS Enschede NETHERLANDS Thomson-CSF Semiconducteurs Spécifiques Grenoble FRANCE Buro Van der Valk (XIC) Rotterdam NETHERLANDS iroc Grenoble FRANCE TNO - Physics and Electronics Laboratory The Hague NETHERLANDS Schneider Electric L Isle d Espagnac FRANCE Industrial Research Ltd Low er Hutt NEW ZEALAND Midi Ingenierie Labège FRANCE Novelda AS Kviteseid NORWAY Philips Microw ave Limeil (PML) Limeil Brevannes FRANCE SINTEF DELAB Trondheim NORWAY SODERN Limeil Brevannes FRANCE IRIMEL Moscou RUSSIA SAPHYMO Massy FRANCE Samsung Electronics Moscou RUSSIA INVIA Meyreuil FRANCE SIBELL Research Center Novosibirsk RUSSIA TIEMPO Montbonnot FRANCE Granch Ltd Novosibirsk RUSSIA CORTUS SA Montpellier FRANCE Agilis Communication Pte Ltd Singapore SINGAPORE MENTA Montpellier FRANCE Centre Wireless Communication Singapore SINGAPORE SCHNEIDER Electric Nanterre FRANCE St Jude Medical AB Jarfalla SWEDEN Thomson LCR Orsay FRANCE SP Devices AB Linköping SWEDEN WEEROC Orsay FRANCE ACREO AB Norkoping SWEDEN Biospace Instruments Paris FRANCE Ericsson AB Stockholm SWEDEN Secure IC SAS Rennes FRANCE IBA Scandronix Medical AB Uppsala SWEDEN CSEE Transport Riom FRANCE D.i.a.c.v. SA Grand-Lancy SWITZERLAND Mixed Silicon Structures (MS2) Roubaix FRANCE Smart Silicon Systems Lausanne SWITZERLAND PHS MEMS St Egrève FRANCE Airw ave Technology Inc. Hsinchu TAIWAN Leroy Automatique Industrielle St Orens FRANCE Midas Green Ltd Cambridge UNITED KINGDOM SIEMENS Automotive Toulouse FRANCE Microcosm Communications Ltd Chichester UNITED KINGDOM Centre d Etude Spatiale des Rayonnements (CESR) Toulouse FRANCE KJ Analogue Consulting Malmesbury UNITED KINGDOM Centre National d Etudes Spatiales (CNES) Toulouse FRANCE Zetex plc. Oldham UNITED KINGDOM ALCATEL SPACE Toulouse FRANCE Al Rezw an Electronics Trading Est. Dubai UAE MXM Vallauris FRANCE New lans Incs. Acton USA NEURELEC Vallauris FRANCE Obsidian Technology Dana Point USA MATRA Défense Vélizy Villacoublay FRANCE Cedars Semiconductor Corp. Dublin USA SOFRADIR Veurey Voroize FRANCE Achronix Semiconductor LLC Ithaca USA CEGELY Villeurbanne FRANCE Systemchip Los Gatos USA NAOMI TECHNOLOGIES AG Mainz GERMANY SUN Microsystems Menlo Park USA SCANDITRONIX WELLHOFER Scw arzenbruck GERMANY Honeyw ell Inc. Minneapolis USA Hahn-Schickard-Gessellschaft - IMIT Villingen-Schw enningen GERMANY SiBEAM, Inc Sunnyvale USA AMBIT Ltd Athens GREECE Radiation Monitoring devices Watertow n USA Articles Cooperative agreements 11

17 Technical developments offered 1981 >1994 Scrolling sur les dates illustration Alimenté par la base de données : launching CMP with NMOS : development of NMOS, launching CMOS : development of CMOS : abandon NMOS, increase the frequency of CMOS runs : launching Bipolar, BiCMOS, MESFET GaAs, HEMT GaAs, advanced CMOS (.5 µ TLM) Articles Cooperative agreements 24 Oct. 14

18 Technical developments offered 1995 >2005 Scrolling sur les dates illustration : launching CMOS, BiCMOS and GaAs compatible MEMS, DOEs, deep submicron CMOS (.25 µ 6LM) 1998: launching surface micromachined MEMS, abandon Alimenté MESFET par la GaAs base de données 1999: launching SiGe,.18 µ CMOS 2001:.35 µ HBT SiGe BiCMOS 2003: 130 nm CMOS 2003: PolyMUMPS, MetalMUMPS, SOIMUMPS 2004: 90 nm CMOS 2005: ASIMPS, SUMMIT/SANDIA Articles Cooperative agreements 24 Oct. 14

19 Technical developments offered 2006 >2011 Scrolling sur les dates 2006: 65 nm CMOS 2008: 45 nm CMOS, 65 nm SOI 2009: 40 nm CMOS 2010: 130 nm 3D IC, TEZZARON / GLOBALFOUNDRIES 2010: 20 nm FDSOI, LETI CEA 2011: 150 nm GaAs phemt, TRIQUINT 2011: 180nm CMOS CIS, TOWERJAZZ illustration Alimenté par la base de données Articles Cooperative agreements 24 Oct. 14

20 Technical developments offered 2011 >2014 Scrolling sur les dates illustration 2011: 28 nm CMOS, STMicroelectronics 2012: 28 nm FD SOI, STMicroelectronics, 0.18µ CMOS/HV CMOS, Alimenté par la ams base de données 2013: Analog 130nm H9A CMOS, THELMA MEMS, STMicroelectronics 2014: 130nm SOI FEM ST / Bulk micromachining ams / DALSA MEMS / PiezoMUMPS Articles Cooperative agreements 24 Oct. 14

21 Grenoble s environment Grenoble'senvironment.pdf Scrolling sur les titres Higher Education High tech Activities Industry Electronics A few key dates in local history Alimenté par la base de données Articles Cooperative agreements 24 Oct. 14

22 A few key dates in local history Scrolling sur les dates carrousel Alimenté par la base de données Articles Cooperative agreements 24 Oct. 14

23 Main data: Evolution of circuits per technology from 2010 to 2013 Distribution of circuits Alimenté par la base de données per technology in 2013 Articles Cooperative agreements

24 Feature Size 1/1000 x gate delay (from ns to ps) 1/1000 x power consumption (from µw/mhz to nw/mhz) ST 90nm 400k gates/mm 2 ST 40nm 1600k gates/mm 2 ST 130nm ST 0.18µ ST 0.25µ 180k AMS 0.35µ 80k gates/mm 2 gates/mm 2 35k gates/mm 18k gates/mm 2 2 ST 65nm 800k gates/mm 2 ST 28nm 3M gates/mm 2 AMS 0.6µ 3k gates/mm AMS 0.8µ 2 1.2k gates/mm x density integration 1994 at CMP 2014 at CMP in 20 Years CMP annual users meeting, 23 January Articles Cooperative agreements 24

25 Alimenté par la base de données Google search CMP IC's Manufacturing Summary of services: one stop shop CMP proposes a lot of technologies in CMOS, BiCMOS, SiGe BiCMOS, P HEMT GaAs for ICs manufacturing in prototyping and low volume and has signed agreements with several leading foundries to offer low cost prototyping (MPW). The offering includes IC technologies from the following foundries. Download our flyer. Scrolling Distribution of circuits per foundry in 2013 ams product range includes sensors, sensor interfaces, power management ICs and wireless ICs for customers in the consumer, industrial, medical, mobile communications Alimenté andpar la automotive base de données markets. Offering one of the industry s broadest product portfolios, STMicroelectronics serves customers across the spectrum of electronics applications with innovative semiconductor solutions by leveraging its vast array of technologies, design expertise and combination of intellectual property portfolio, strategic partnerships and manufacturing strength. In 2004 Tezzaron demonstrated the world's first successful wafer stacked 3D ICs with TSV, including microprocessors, sensors, and SRAM devices. Since that time the company has worked with dozens of customers to create custom 3D ICs for prototyping and commercialization. Articles Cooperative agreements

26 IC's Manufacturing ams products are aimed at applications which require extreme precision, accuracy, dynamic range, sensitivity, and ultra low power consumption. Lien sur la page de la techno Scrolling à définir ensemble Lien sur la schedule Lien sur la page price Technology Frequence des runs N 1 Price 0.35 µ CMOS / CMOS Opto 20 Oct. XXXXXXXXXXX Galerie Alimenté par la base 1200 de Euro/mm données correspondante 2 aux 0.35 µ SiGe 23 Dec. XXXXXXXXXXX 2200 Euro/mm 2 ICs ams 0.35 µ HV CMOS 02 Feb. XXXXXXXXXXX 600 Euro/mm µ HV CMOS EEPROM 10 Jan. XXXXXXXXXXX 500 Euro/mm 2 Caroussel 0.35 µ Thick Metal CMOS 02 Mar. XXXXXXXXXXX 2000 Euro/mm µ CMOS 06 May. XXXXXXXXXXX 5200 Euro/mm µ HV CMOS 20 Oct. XXXXXXXXXXX 1500 Euro/mm 2 Dates à venir Articles Cooperative agreements

27 Lien sur la page de la techno IC's Manufacturing STMicroelectronics is one of the world s largest semiconductor companies. Offering one of the industry s broadest product portfolios, ST serves customers across the spectrum of electronics applications with innovative semiconductor solutions by leveraging its vast array of technologies, design expertise and combination of intellectual property Lien sur la schedule portfolio, strategic partnerships and manufacturing strength Scrolling Lien sur la page price Technology Frequence des runs N 1 Price 28nm CMOS 8LM 5 Jan. xxxxxx. Galerie Alimenté par la base 1200 de Euro/mm données correspondante aux 65nm CMOS 7LM 8 Mar. xxxxxx Euro/mm 2 ICs ST 130nm CMOS 6LM 20 Mar. xxxxxx Euro/mm 2 130nm HV CMOS 4LM 8 Mar. xxxxxx Euro/mm 2 Caroussel 28nm FDSOI 15 June. xxxxxx Euro/mm 2 130nm SOI 8 Mar. xxxxxx Euro/mm 2 130nm SiGe BiCMOS 8 Mar. xxxxxx Euro/mm 2 Dates à venir Articles Cooperative agreements

28 IC's Manufacturing design and build bleeding edge systems in the very latest 3D IC and 2.5D technologies. Lien sur la page de la techno Scrolling Lien sur la page price Technology Frequence des runs N 1 Price Galerie Alimenté par la base de données correspondante aux 130 nm CMOS FaStack, 2 Tiers 3 DIC 8 Mar. XXXXXXXXXXXX 1200 Euro/mm 2 ICs Tezzaron Dates à venir Lien sur la schedule Caroussel Source IBM ocker.html Articles Cooperative agreements

29 Micro Electro Mechanical Systems (MEMS) Summary of services: one stop shop In addition to ICs, CMP is providing MEMS technologies for prototyping. CMP provides several types of MEMS technologies for prototyping : Integrated bulk micromachining technologies and specific surface micromachining technologies. Download our MEMS flyer. Scrolling Galerie Teledyne DALSA MIDIS TM/ MEMS Integrated Design for Inertial Sensors correspondante aux MEMS Alimenté par la base de données Caroussel Bulk Micromachining CAD Tools, IPs, Design MUMPs from MEMSCAP Articles Cooperative agreements

30 Micro Electro Mechanical Systems (MEMS) The MEMS Integrated Design for Inertial Sensors (MIDIS ) platform is designed to provide a standard process for manufacturing accelerometers and gyroscopes and integrating them into an Inertial Measurement Unit (IMU) for application areas such as consumer (mobile), automotive, aerospace and sports/health markets. Lien sur la page de la techno Scrolling Lien sur la schedule Lien sur la page price Technology Frequence des runs N 1 Price Alimenté par la base de données Dates à venir MIDIS 4mm x 4mm (fixed size) 20 Mar. XXXXXXXXXXXX 600 Euro/mm 2 Galerie correspondante aux MEMS MIDIS Caroussel Articles Cooperative agreements

31 Micro Electro Mechanical Systems (MEMS) Bulk micromachining on CMOS Lien sur la page de la techno Scrolling? Lien sur la schedule Lien sur la page price Technology Frequence des runs N 1 Price Alimenté par la base de données Bulk Micromachining Frontside Bulk micromachining 20 Mar. XXXXXXXXXXXXXXXXX 650 /mm² Backside Bulk micromachining Dates à venir (prospect) Galerie correspondante aux Bulk Micromachining Caroussel Articles Cooperative agreements

32 Micro Electro Mechanical Systems (MEMS) Lien sur la page de la techno Scrolling Lien sur la schedule Lien sur la page price Technology Frequence des runs N 1 Price Alimenté par la base de données Dates à venir Specific MEMS: Galerie PiezoMUMPS 20 Mar. XXXXXXXXXXXXXX 1600 Euro/mm correspondante 2 aux PolyMUMPS 20 Mar. XXXXXXXXXXXXXXXXXX 1990 Euro/m MetalMUMPS 20 Mar. XXXXXXXXXXXX Euro/mm 2 Specific MEMS SOIMUMPS 20 Mar. XXXXXXXXXX 600 Euro/mm 2 Caroussel Articles Cooperative agreements

33 CAD Tools, IPs, Design CMP has signed agreements with several CAD tools vendors in order to distribute the tools to Universities, Research Laboratories or Industry. Obsidian Technology.pdf SoftMEMS More Products: Alliance Tools ( soc.lip6.fr) Magic (plus de lien) Microwind and DSCH ( CST: 3D Electromagnetic Simulation ( 2WCL: WorldWide Components Library ( CEA Leti: Custom advanced single step processes to high end process modules ( tocollaborate/collaborating with Leti/Leti 3S) Dolphin Integration : SoC Design, Test & Fabrication portal ( Articles Cooperative agreements

34 Liens sur les pages correspondantes Google search CMP ams 0.18µ CMOS 1P/6LM/MIM Met. layer(s): 6 metal layers / Thick Metal6 INTERFACE FORMAT: GDSII Capacitors: Single MiM / Dual MiM / High density MiM Maximum die size: 2cm x 2cm SPICE parameters: SPECTRE, HSPICE Standard cells: digital standard cells and IO pads analog standard cells and IO pads DRC, ERC rule set: Assura, Calibre Available I/O: I/O cell library with available for 1.8V/5V. Temp. range: 40 C. / +180 C. DESIGN SUPPORT: Only DRC checking (free for submitted designs) Supply voltage: 1.8V, 5.0V SPECIAL FEATURES: High performance mixed analog/digital applications PRICES APPLICATION AREA: Mixed signal analog digital, system on chip Cell libraries: Available for free LIBRARIES: Design kits: Available for free Digital cells: Standard digital cells and IO pads. Prototyping: See the general CMP price list for prototyping Megacells: RAM, ROM, FIFO can be generated by the foundry on request with additional fees. Low volume production: Depends on each specific case; contact CMP RAM/DP RAM: Available on request DESIGN KITS: Workstation based: CADENCE, SYNOPSYS, MENTOR TURNAROUND TIME: Typical: PC based: None PACKAGING: All standard packages (DIL, LCC, PGA,...). TEST: CMP Alimenté par la base de données Galerie correspondante à cette techno là Caroussel 13 weeks (from GDS2 tape to packaged parts)ėmail(s) des personnes CMP en charge de cette technologie Estimate request: Start the approval process? Send your request through the mycmp Customer. Some questions: Articles Cooperative agreements

35 Scrolling, Libraries & ed CAD tools overview Digital, Analog and RF Libraries IPs Alimenté par la base de données ed CAD tools overview Standard Cell Libraries IPs Articles Cooperative agreements

36 Software Cadence Schematic & Design Entry Composer Electrical Simulation Spectre Hspice Ultrasim Mentor Eldo Synopsys ed CAD Tools Desgin Compiler Digital Simulation NC Sim ams Designer ModelSim QuestaSim Hspice Logic Synthesis RTL Compiler Layout & Verification Virtuoso Assura QRC P&R Encounter Digital Implementatio n (EDI) Calibre Design Compiler Tanner S Edit Tspice Tspice ADS (Agilent) Alimenté par la base de données L Edit DRC SPR Articles Cooperative agreements

37 Design Kit overview Current distributions: Technology\software Cadence Mentor Tanner (SUN / Linux) (SUN / Linux) (MS Windows) CDB OA 0.35µm CMOS Alimenté par la base de données 0.35µm SiGe µm HV CMOS µm CMOS µm HV CMOS Articles Cooperative agreements

38 Digital, Analog and RF Libraries LV Digital standard cells and IO Libraries: HV Digital standard cells and IO Libraries: Analog standard cells Libraries: RF standard IO cells Libraries: CORELIB: General purpose digital library CORELIB_3B: Same as CORELIB with 3 busses (VDD, VSS, GND) IOLIB: IO pads (input, output, bidir). 3.3V and 5V available IOLIBC_3B: Core limited digital IO Libraries Core and IO cells are characterized for 1.8V, Alimenté 2.2V, 2.7V, par 3.3V. la base de données CORELIB_HV : CORELIB for high voltage. IOLIB_HV : High Voltage digital IO pads library IOLIB_ANA: Analog IO pads library IOLIBC_ANA_3B: Core limited Analog IO pads library IOLIB_ANA_HV: High Voltage Analog IO pads library A_CELLS: Analog Library SPIRAL : Library with characterized Inductors RF_PADS : RF IO pads library Articles Cooperative agreements

39 IPs IP blocks available from CMP free of charge to Univ. & Research (0.35µ CMOS) Single & Dual Port RAMS Configurations : Bits Words Single Port RAM Dual Port RAM Alimenté Diffusion par la ROM base de données 128 SP SP SP SP SP 256 DP SP / DP SP 512 SP SP 600 SP 1024 SP / DP SP / DP 2048 SP SP / DP SP 4098 DP Articles Cooperative agreements

40 ed CAD Tools IC Electrical Simulation Verification Parasitics Extraction P&R CD B OA Spectre (CDS) Eldo (MGC) Hspice (SNPS) ADS (Agilent) Calibre (MGC) PVS (CDS) StarRCXT (SNPS) Calibre (MGC) QRC (CDS) Encounter( CDS) ICC (SNPS) Alimenté par la base de données HCMOS9GP x x x x x x x x BiCMOS9 MW x x x x x x x x x x x x HCMOS9A x x x x x x x x x x H9SOI FEM x x x x x x x x x CMOS065 x x x x x x x x x x x CMOS028 FDSOI x x x x x x x x x x x Automatic price quote request Submit a circuit to MPW run CMP staff Address Articles Cooperative agreements

41 Design Kit overview Current distributions: Cadence (SUN / HP / Linux) Tanner (MS Windows) HCMOS9GP 9.2 BICMOS9 MW 2.5c Alimenté par la base de données HCMOS9A 9.9.8a H9SOI FEM 11.3 CMOS V3 CMOS28FDSOI 2.3 RF option available for HCMOS9GP & CMOS065 design kits. Articles Cooperative agreements

42 Standard Cell Libraries CORE cells Libraries: CORE: General purpose core libraries CORX: Complementary core libraries (complex gates) CLOCK: Buffer cells and the same for clock tree synthesis PR: Place and route filler cells and the same. DP: Datapath leaf cells libraries on request HD: High density core libraries Alimenté par la base de données IO cells Libraries: 1.8V, 2.5V, 3.3V IO pads: 80µ, 65µ, 60µ, 50µ 40µ and 30µ IO pads : Digital and Analog Staggered IO pads Flip Chip pads Level Shifters, and compensation cells On request: LVDS Pads DLL, PLL Memories SPRAM / DPRAM / ROM available on request, free of charge (1 2 weeks delay) Articles Cooperative agreements

43 MEMS Manufacturer Technology Design Kit Software Version Fields of applica tion COVENTOR Catapult (Designer) from CoventorWareTM MIDIS MK15S1 Cadence Virtuoso Layout Suite ver.ic6.1.5 from Cadence Physical layout, design entry and multi physics analysis Bulk Micromachining HIT Kit_ams_4.10 ANSYS Multi physics analysis Alimenté par la base de données Cadence Cadence IC / Physical layout and DRC Tanner L Edit Physical layout and DRC Tanner L Edit Physical layout and DRC MUMPs SoftMEMS MEMS Pro v7.0 Physical layout, DRC and multi physics analysis Cadence Cadence IC / Physical layout and DRC Articles Cooperative agreements

44 IPs IP blocks available from CMP free of charge to Univ. & Research (0.35µ CMOS) Single & Dual Port RAMS Configurations : Bits Words Single Port RAM Dual Port RAM Alimenté Diffusion par la ROM base de données 128 SP SP SP SP SP 256 DP SP / DP SP 512 SP SP 600 SP 1024 SP / DP SP / DP 2048 SP SP / DP SP 4098 DP Articles Cooperative agreements

45 Advance packaging Overview Package Guidelines Ceramic or Plastic? Prototyping: CMP recommends to use ceramic packaging Advantage: Price for small quantities Flexible constraint for the packaging Thermal, High Reliability (Space qualification) Prototyping & Low volume: CMP recommends to choose the plastic package and then ceramic package Advantage: Low cost from packaging (open tool only) Access to density solutions for low price Articles Cooperative agreements CMP

46 Packaging Process Flow Bare dies grinding 200mm or 300mm Wafer Dicing Bare dies on sticking film Loading in waffle pack or in gel pack Packaging Visual inspection Ceramic* Plastic** Wafer Grinding *Standard quantity from 5 to 25 pieces **Recommanded for > 30 pieces. Flip Chip Turnaround: 3 to 5 weeks Articles Cooperative agreements

47 Lien sur la page du boîtier Advantages Flaw and cons Package(s) Relevant features Additional fees Small Outline (SOI) Easy To Test Max 28 I/Os Plastic/Ceramic C leaded Chip Carriers (LCC) Small Cavities Need a support for test Ceramic J leaded Chip Carriers (JLCC) Small Cavities Need a support for test Ceramic/Plastic Dual in line (DIL) Easy To Set Large Size Ceramic Cerquad Flat Pack (CQFP) Until 256 I/Os Cost Ceramic Default option is pins bent in gull wing. J leaded pins on request Pin Grid Arrays (PGA) Until 352pins Need a support for test Ceramic Thin Quad Flat Pad (TQFP) Price For Low Volume,easy To Find A Socket Poor heat dissipation Plastic 25 Min, theses packages need backlapped dies, lids must be sealed, subcontractor Set up fees : 370 Per Lot Quad Flat Non Leaded (QFNL) Thermal performance, low Inductance,high Frequency Max 80 I/Os Plastic 25, theses packages need backlapped dies,lids must be sealed, subcontractor Set up Fees : 370 Per Lot Plastic Open Cavity Packages Allows a smooth transfer between ceramic and plastic pakage(qfn,qfp,plcc,pga,bga) Cost Plastic Articles Cooperative agreements

48 Small Outline (SOI) Prices Dimension SOIC 08 62,50 Euro xxxxxxxxxxx SOIC 16 64,50 Euro xxxxxxxxxx SOIC 20 74,50 Euro xxxxxxxxxx SOIC 24 77,50 Euro xxxxxxxxxx SOIC 28 80,50 Euro xxxxxxxxxx To get the leadframe diagram and to order Articles Cooperative agreements

49 C leaded Chip Carriers (LCC) Prices Dimension To get the leadframe diagram and to order Articles Cooperative agreements

50 J leaded Chip Carriers (JLCC) Prices Dimension To get the leadframe diagram and to order Articles Cooperative agreements

51 Dual in line (DIL) Prices Dimension To get the leadframe diagram and to order Articles Cooperative agreements

52 Cerquad Flat Pack (CQFP) Prices Dimension To get the leadframe diagram and to order Articles Cooperative agreements

53 Pin Grid Arrays (PGA) Prices Dimension To get the leadframe diagram and to order Articles Cooperative agreements

54 Thin Quad Flat Pad (TQFP) Prices Dimension To get the leadframe diagram and to order Articles Cooperative agreements

55 Quad Flat Non Leaded (QFNL) Prices Dimension To get the leadframe diagram and to order Articles Cooperative agreements

56 Plastic Open Cavity Packages Prices Dimension To get the leadframe diagram and to order Articles Cooperative agreements

57 Pb de date en début d année (2 années à Google search CMP afficher) Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec C18A µm CMOS H18A µm HV CMOS C35B4C µm CMOS C35B4O µm CMOS Opto C35B4M µm CMOS Thick M H35B4D µm HV CMOS S35D4M µm SiGe CMOS28FDSOI 28 nm SOI CMOS nm CMOS HCMOS9GP 130 nm CMOS HCMOS9A 130 nm HV CMOS BiCMOS9MW 130 nm SiGe H9SOI FEM 130 nm SOI MUMPS 2.0 µm polymumps PiezoMUMPS 3.0 µm PiezoMUMPS MUMPS 3.0 µm SOIMUMPS MUMPS 8.0 µm metalmumps MIDIS 1.5 µm MIDIS 12 Articles Cooperative agreements

58 Price List Generalities Price per mm2 of the current price list is for 25 bare dies except for MEMSCAP. Additional dies are charged. DRC Price includes DRC checking made by CMP before fabrication. In case of DRC errors CMP will contact you for corrections. Send your circuit layout before the deadline to have time for corrections. Charged area There is a minimum charge for each circuit depending on the technology process. This charge is defined as a minimum area. Excepted for MEMSCAP the charged area includes a seal ring of 120µm added by CMP around the circuit (240µm added in X and in Y axis). The seal ring is not charged when the circuit area is smaller or equal to the minimum. Packaging Packaging must be ordered in the CMP Order Form before the deadline of the run. The bonding diagram must be sent with the CMP Order Form. Please check technical constraints on pad ring and the price list. Additional circuits Additional circuits must be ordered before the deadline. Price is determined on a case per case basis. Colour plots Colour plots must be ordered before the deadline. Default format is around A0 (115cm x 76cm). Price: 35 Euro for the first sample and 20 Euro per copy. Shipment fees Depending on destination shipment fees for circuits and for plots are charged with an amount of 60 Euro to 150 Euro. Articles Cooperative agreements

59 Price List Lien sur la page techno 0.18u CMOS C18A Euro/mm2 (18) 0.18u HV CMOS H18A Euro/mm2 (18) 0.35u CMOS C35B4C3 650 Euro/mm2 (3) 0.35u CMOS Bulk Micromachining 650 Euro/mm2 (4) Euro for 10 dies 0.35u CMOS C35B4M3 890 Euro/mm2 (4) 0.35u CMOS Opto C35B4O1 810 Euro/mm2 (3) 0.35u CMOS Flash C35B4E3 800 Euro/mm2 (6) 0.35u SiGe BiCMOS S35D4M5 890 Euro/mm2 (4) 0.35u HV CMOS H35B4D Euro/mm2 (6) *Prices are exclusive of taxes and duties and can be changed at any time without prior notice. Prices in US$ will be converted from Euro at the time of the delivery for invoicing. 28nm FDSOI CMOS28FDSOI Euro/mm2 (1) (if Area less or equal to 3mm2 ) Euro + [ (Area 3) Euro ] (if 3mm2 < Area < 15mm2 )(12) 65nm CMOS CMOS Euro/mm2 (1) (if Area less or equal to 5mm2 ) Euro + [ (Area 5) 6000 Euro ] (if 5mm2 < Area < 15mm2 )(12) 130nm CMOS HCMOS9GP 2200 Euro/mm2 (1) (12) (if Area less or equal to 20mm2 ) 130nm SiGe BiCMOS9MW 3500 Euro/mm2 (1) (12) (13)(if Area less or equal to 10mm2 ) 4500 Euro/mm2 (1) (12) (14) (if Area less or equal to 10mm2 ) 130nm SOI H9SOI FEM 3000 Euro + (Area * 3000 Euro/mm2) (1) (if Area less or equal to 10mm2 ) Euro + [ (Area 10) * 2000 Euro ] (if 10mm2 < Area < 25mm2 )(12) Articles Cooperative agreements

60 Information European Union : No document is necessary for shipping. You just need to indicate your shipment information and name and surname of the receiver. Don't forget to indicate your phone number, in order for UPS to be able to join you. If an export licence is necessary: Non European country: Export licence request procedure Beginning when we receive the Confidentiality Licence Agreement or the CMP Order Form, fully completed and signed. Then it is transmitted to SETICE (Direction des Douanes) (Customs Control) in Paris, that validate the Licence Request (about 2 weeks). Exception for non European country: The EU001 Licence is easier. The request has been made to the Ministry in charge of Customs once for all, (validity: 1 year, renewal by tacit agreement), but it only concerns a few country: Australia Canada Japan Norway New Zealand Switzerland Territoire d'outre Mer, Mayotte and St Pierre et Miquelon United States of America Restrictions Some restrictions are effective for deliveries in country not supported by UPS, and for those unauthorized by our government. Articles Cooperative agreements

61 Terms and Conditions Preamble CMP is open to every university, institution, public research laboratory or industrial company. The Terms and Conditions contained herein apply to all deliveries made and services rendered by CMP and related to fabrication of integrated circuits and systems. These deliveries and services are described in the CMP Web site. The use of CMP services implies the acceptation of the Terms and Conditions contained herein. Definitions "CMP Manual" hereinafter refers to the documentation contained into the Web page " and the subsequent pages. "Products" hereinafter refers to the integrated circuits and systems fabricated through CMP. "Vendor" hereinafter refers to the manufacturers of Products. "Customer" hereinafter refers to every university, institution, public research laboratory or industrial company using CMP services. "Prototypes" hereinafter refers to Products fabricated in the standard quantities for prototypes indicated in the CMP Manual. "Low Volume Production" hereinafter refers to Products fabricated in other quantities than Prototypes. Prices etc Articles Cooperative agreements

62 List of testing : CMP may provide contacts with different test houses. FACET provides on Engineering and Production Test GGB Industries is a world leader in RF and microwave test probes (up to 325 GHz) Remote testing provided by The National Networked TeleTest Facility for Integrated Systems (NNTTF) Failure Analysis, Quality and Reliability, Information Security, Circuits Repair by FIB: Serma Test services at TERADYNE Generic and custom test fixtures and services for your packaged products are available from DMT Microsystems (s) des personnes CMP en charge de cette technologie Some questions: Articles Cooperative agreements

63 HPGL Viewer and Raster available ( Free GDSII Viewer. (s) des personnes CMP en charge de cette technologie Some questions: Articles Cooperative agreements

64 / idem page Articles Cooperative agreements

65 CAD tools List of Products: CAD Tools, IPs, Design Products: Obsidian Technology SoftMEMS Tools More products (s) des personnes CMP en charge de cette technologie Some questions: Articles Cooperative agreements

66 Automatic price quote request The Automated Price Quote Request or the standard prices can be used when a customer needs one lot, but for a larger number of parts, contact CMP (s) des personnes CMP en charge de cette technologie Some questions: Articles Cooperative agreements

67 Lien sur My CMP Procedure to submit a circuit to a CMP run: Some information: Guide to complete "Order Forms for ICs Manufacturing" (Version 5 February 2008) You can transfer your circuit for checking at any time before the deadline of a run. Circuits must be free of DRC error and without antenna errors for fabrication. Please follow the workflow: Reservation form (s) des personnes CMP en charge de cette technologie Some questions: Articles Cooperative agreements

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72 CMP Staff Organigramme? Alimenté par la base de données Lien AMIELH Isabelle Executive Secretariat BENIS MOREL Chantal Communication / Conference Management CHASSAT Patricia Secretariat / CREBIER Jean Christophe Director EYRAUD Sylvaine Design kit and MPW runs management MANAA Azedine MPW runs AMS and MEMS PAILLOTIN Jean Francois MPW runs manager : STMicroelectronics PARRAU Joelle Accountant PLA Simon MPW runs and support for MEMS TORKI Kholdoun Technical Director VERLY Romain MPW runs assistant Articles Cooperative agreements

73 Acces map Satellite view click to enlarge Access to CMP Grenoble CMP is located: 46 Avenue Félix Villet in the Grenoble INP Building Bât T 1st floor Tel. : Fax. : Access in heart of the Alps By car : A 41 Chambéry (60 km), Annecy (110 km), Genève/SUISSE (145 km) / Exits : GRENOBLE GARE A 48 Lyon (105 km), Paris (566 km) / Exit : GRENOBLE GARE A480/A51 Sisteron (150 km) A 49 Valence (99 km) Rocade Sud By plane Aeroport Lyon St Exupery (100km) (Shutlle from Lyon ST Exupery airport) Aeroport de Grenoble (45km) Aeroprt de Genève (150km) by train (SNCF railway station of Grenoble) Grenoble Lyon : 1 h Grenoble Paris : 3 h Grenoble Lille : 4 h Articles Cooperative agreements

74 Grenoble and its setting Grenoble is in heart of the French Alps, an ideal setting for summer and winter sports lovers and those who enjoy the outdoor life. The scientific environment is also amongst the most attractive in France and throughout the world. The Grenoble region 3 national parks within easy striking distance ( tourisme.com) 3 mountain ranges( isere.info) Sports and open air activities w(ww.grenoble montagne.com) Exceptional scientific community Grenoble has an exceptional scientific and technological environment and Grenoble IT is a founding player. The town has become a leading centre for European science, with electronics and IT, physics and nuclear studies, materials and hydraulics, chemistry and papermaking engineering. Several thousand researchers and engineers work in the town. Grenoble IT offers first class research opportunities in all these areas, with laboratories, focusing on six main sectors: information and communication materials energy environment production systems Articles Cooperative agreements

75 Kit Announcement Alimenté par la base de données STMicroelectronics Makes Leading Edge MEMS Technology Available for Prototyping through CMP STMicroelectronics Makes Analog 130nm H9A CMOS Process Available through CMP STMicroelectronics in cooperation with SOITEC makes 28nm FD SOI CMOS process available through CMP STMicroelectronics makes 28nm CMOS process available through CMP Release STMicroelectronics Makes 28nm CMOS Process Available Through CMP Release: CMC, CMP and MOSIS to increase for delivery of better technology Internet press coverage Protocol issued from the 2 3 October 1986 meeting Examples of ICs and MEMS for BioMed applications Electronics for energy management Articles Cooperative agreements

76 Impossible d afficher l image. Alimenté par la base de données Google search CMP Gallery: Examples of circuits manufactured in 2013 Title: A High Speed Low Noise 16 Channel Current Amplifier IC for Positon Emission Tomography Organization: CEA LETI, MINATEC, 17 rue des Martyrs, Grenoble Cedex 9, France Run: A35C8_3 Topcell: Aligapet A 16 channels front end IC dedicated to PET applications has been developed for CdTe detectors. It includes, for each channel, a low noise density (2nV/Hz 1/2 ), high bandwidth (100MHz@Cin=0pF) current amplifier with a gain of 100, i.e a gain bandwidth product of 10GHz, with a consumption lower than 5mW. Each channel is designed to accept up to 20pF detector capacitance. It is buffered by a transconductance amplifier with a common mode voltage output and two differential outputs that are able to drive 50Ohm terminations. Each detector input is dc coupled and accepts positive or negative currents, up to +/ 1uA (511keV). The input common polarity is externally selectable. name: Jean Pierre Rostaing jean pierre.rostaing@cea.fr Title: Measurement of magnetic field in 0.35µm Organization: Master Micro Nano Electronique Université de Strasbourg Run: A35C8_4 Topcell: Full_Chip It is an instrumental chain able to measure the magnetic field from a Hall sensor. The chip is a teaching circuit which is used during the first and second years of the Master MNE. A lot of inputoutput pins allow to test different parts of the circuit alone from each other. name: Anthony Bozier bozier@iness.c strasbourg.fr Title: Embedded DRAM and All in One Silicon Odometer Organization: University of Minnesota, USA Run: S65C8_2 Topcell: TORO_FULLCHIP A sub 0.9V logic compatible 64kb embedded DRAM with a boosted 3T gain cell, a regulated bit line write scheme and a PVT tracking read reference bias was designed and tested in ST s 65nm CMOS process. Implemented on the same chip was an «all in one silicon odometer» for separately monitoring Hot Carrier Injection (HCI), Bias Temperature Instability (BTI), and Time Dependent Dielectric Breakdown (TDDB) with sub picosecond resolution. Both designs will be published in the 2009 VLSI circuits symposium in Kyoto, Japan. name: Chris H. Kim chriskim@umn.edu Articles Cooperative agreements

77 : Flyers General flyer (May 14) MEMS flyer (May 14) PV & Storage flyer (Oct 12) Order forms Alimenté par la base de données Order form for ICs manufacturing (Version 20 July 2012) Order form for MUMPs manufacturing (Version 11 February 2011) Order form for ICs manufacturing for laboratories which are STMicroelectronics partners (Version 10 October 2013) order form Guides Guide to complete "Order Forms for ICs Manufacturing" (Version 5 February 2008) Annual & correspondant price list (Janv 14) Shown presentations during the last annual user meeting Various statistics Articles Cooperative agreements

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