End-to-End Testing Chris Werstiuk, Manta Test Systems

Transcription

1 Chris Werstiuk, Manta Test Systems Cpyright 2010: Valence Electrical Training Services

2 Chapter 1 Intrductin t End-t-End Testing End-t-end testing is cnsidered t be the ultimate test fr prtective relay prtectin schemes with tw r mre relays wh cmmunicate trip and blcking infrmatin with each ther. These schemes are designed t prvide mre accurate fault detectin t mre quickly islate faults frm the rest f the electrical system. End-t-end testing can prvide the mst realistic fault simulatins t prve relay prtectin schemes befre placing them int service and this test technique is becming mre and mre ppular, especially as the Natinal Electrical Reliability Cuncil (NERC) and ther regulatry agency standards are becming mre stringent. One excerpt frm the NERC requirements includes the fllwing text that almst requires end-t-end testing t be perfrmed n every new installatin At installatin, the acceptance test shuld be perfrmed n the cmplete relay scheme in additin t each individual cmpnent s that the adequacy f the scheme is verified. This seminar will intrduce the thery and practice f end-t-end relay testing frm the relay tester s perspective. The fllwing descriptins in this sectin will prvide an verview f end-t-end testing fllwed by detailed infrmatin fr the mst cmmnly applied prtective schemes. 1. What is End-t-End Testing? End-t-End Testing uses tw r mre test-sets at multiple lcatins t simulate a fault at every end f a transmissin line simultaneusly t evaluate the entire prtective relay scheme as a whle. This test technique used t require specialized knwledge and equipment t perfrm, but the mdern test-sets f tday make it a relatively simple task. Review figure 1 fr an verview f the equipment and persnnel required fr a typical end-t-end test using a simple transmissin line with tw ends r, as they re smetimes called, ndes. It is pssible t have a system with three r mre ndes which simply adds anther lcatin t the test plan. 2 Chris Werstiuk, Manta Test Systems

3 GPS ANTENNA GPS ANTENNA TIME = 0:0:0 TIME = 0:0:0 COMM Z1 Z2 Z3 TX1 RX1 TX1 RX1 Z1 Z2 Z3 RLY-1 RLY-2 Figure 1: End-t-End Testing Summary The fllwing cmpnents are necessary fr the relay tester t perfrm a successful end-t-end test fr an in-service applicatin: 1. A relay test-set fr each lcatin with a minimum f: three vltage channels three current channels at least ne prgrammable utput t simulate breaker status r ther external signals at least ne prgrammable input t detect trip r breaker status signals An internal GPS clck (Sme test-sets allw fr ther time signal synchrnizatins such as IRIG) r an external GPS clck with utput signal and an additinal test-set start input. Wavefrm playback r fault state/state simulatr with at least 3 states available. 2. Sme test-sets require a cmputer t cntrl the test-set playback r state functins 3. A cmputer and sftware t dwnlad and display event recrds btained frm the relay after each test. 4. At least ne relay tester at each lcatin with sme frm f cmmunicatin between the tw lcatins such as telephne r ver-netwrk cmmunicatin. It is pssible, but nt recmmended, fr ne persn t perfrm all tests if the relay, relay test-sets, and cmmunicatin systems have all been cnfigured prperly. 5. A setting file, wavefrm, r detailed descriptin f the specific test scenaris. 6. An understanding f the relay prtectin scheme and what the expected result fr each test shuld be. Chris Werstiuk, Manta Test Systems 3

4 The relay testers at each end f the line perfrm the fllwing steps when perfrming an end-tend test: 1. Obtain test cases frm the engineer and review them t find bvius errrs and determine what the expected results shuld be. 2. Islate the equipment under test 3. Cnnect apprpriate input and utput cnnectins. 4. Cnnect test equipment t replace Current Transfrmer (CT)/Ptential Transfrmer (PT) cnnectins. 5. Setup GPS antenna and apply GPS time as test-set reference. (Or use ther reference such as IRIG, if required) 6. Cmmunicate with remte testers and apply meter test n all sides and verify crrect results. 7. Cmmunicate with remte sides and determine which test plan will be used fr test 8. Lad test case int all test-sets 9. Place all circuit breakers in the crrect psitins r ensure circuit breaker cntacts are prperly simulated by the test-set. 10. Cmmunicate start time with all sides and initiate test. 11. Review targets fr crrect peratin and dwnlad all event recrds. Review event recrds fr crrect peratin, if required. 12. Repeat frm step 7-11 fr all test cases. 2. Why D We Perfrm End-t-End Testing? The mst effective transmissin line prtectin using tday s technlgies is achieved by installing prtective relays at each end f the line that cnstantly trade infrmatin abut the pwer system thrugh a cmmunicatin channel. Any disturbance is cmmunicated t the ther relays which will cause the prtectin t perate mre quickly depending n the prtectin scheme used and the apparent lcatin f the fault. These prtectin schemes, when applied crrectly, can make the transmissin line prtectin mre reliable and mre selective than is pssible with a single relay r a series f relays that cannt cmmunicate. While it is pssible t test each f the individual cmpnents separately, many prblems can nly be detected when the entire scheme is tested as a whle. It is pssible t test ne side at a time which can give the tester a reasnable sense that the scheme will perate successfully n a prven relay settings, but many prblems with cmmunicatin-assisted prtectin ccur when the fault changes directins r by incrrectly defined cmmunicatin delays which are inherent in the system. These prblems can nly be detected by prperly applied end-t-end testing r a review f an incrrect relay peratin after a fault. End-t-end testing culd be cnsidered daunting a decade ag; but advances in relay testing technlgy and persnal cmputers have reduced the cmplexity t a cuple f extra steps fr a reasnably experienced relay tester. 4 Chris Werstiuk, Manta Test Systems

5 3. Hw des it wrk? Mst system disturbances ccur within 1 millisecnd and mdern prtective relays must be able t detect faults within this time frame t be effective. Practical experience has shwn that tw test-sets must start within 10 micrsecnds f each ther t prvide reliable results. This causes a prblem fr multiple relay testers at multiple lcatins because it is nearly impssible fr tw relay testers at tw different lcatins t press start within 10 µs. One way t synchrnize the start time f tw test-sets wuld be t cnnect sme srt f dedicated cmmunicatin means such as a pilt wire (shrt distances nly) r dedicated fiber-ptic cnnectin between the tw remte test-sets but this methd requires frethught and additinal csts t the installer. These dedicated circuits culd als becme bslete if the system cnfiguratin changes in the future s this methd is rarely available. The remte relay testers culd use the pwer system itself t synchrnize the tw test-sets but this methd culd add up t 1 ms r 22 errr t the test which is nt within the 10 µs tlerance required fr cnsistent results. It wuld be difficult t determine whether the prtective system perated because f a prblem, r the difference between start times. End-t-end testing became a viable test technique fr everyne when the U.S. Armed Frces allwed nn-military access t the time signals sent by a system f satellites which cmprise the Glbal Psitining System (GPS). This system perates by btaining the time signal and general lcatin f at least fur satellites and cmparing the differences between time and distance t determine the antenna s lcatin within a few meters. Time can be synchrnized within 1 µs anywhere that 4 satellites are available. Mst mdern test equipment can specify synchrnizatin within 2 µs which is within the maximum allwable time delay by a factr f 5. Once tw test-sets have synchrnized time surces, at least tw fault states are applied with infrmatin frm a fault simulatr prgram. The first fault state prvides a pre-fault cnditin which wuld be the nrmal current, vltage, and phase angle fr the transmissin line under test. After a pre-determined time, bth test-sets wuld switch t the secnd state simultaneusly which simulates a fault. It is imprtant t nte that every side f the transmissin line will have different values depending n the lcatin f the fault and the pwer surces arund the transmissin line. It is vital that the crrect fault simulatins be applied t the crrect relays. These fault states culd be cmbined int ne file, typically COMTRADE (I.E.E.E. standard IEEE C fr wavefrm files), and played back int the relay r created using fault infrmatin and manually entered int fault simulatins. If the fault has been prperly simulated at all lcatins simultaneusly, the prtective relays shuld perate as if a fault ccurred n the system. The results are evaluated t ensure the prtective relays and cmmunicatin equipment is functining crrectly as a unit. It is als imprtant t nte that different test-set manufacturers and test-set mdels may be synchrnized t the same time surce but may nt start utputting the test at the same mment due t internal time delays and/r external I/O time delays, if used. Always cnsult with the relay test-set manufacturers if tw different mdels f test-sets will be used fr end-t-end testing n ne line t determine if a crrectin factr must be applied. Different mdels frm the same manufacturer can prduce different starting times and the crrectin factrs shuld be verified at the same lcatin, if pssible, befre perfrming any remte testing. Chris Werstiuk, Manta Test Systems 5

6 4. Where shuld I perfrm End-t-End Testing? End-t-end testing shuld be perfrmed whenever it wuld be beneficial t test an entire prtectin scheme in real-time t make sure the all equipment will perate crrectly when required. This test technique need nt be limited t transmissin lines but culd be applied t all f the feeders in a substatin by installing a test-set at each feeder s prtective relay and starting a fault simulatin t be played int all relays simultaneusly t ensure that the scheme wrks as intended. 5. When Shuld I Perfrm End-t-End Testing? End-t-end testing appears t be mandated by the NERC requirement quted earlier and all new installatins with remte cmmunicatin between relays shuld be tested via end-t-end testing. This test technique can als be a useful and effective maintenance test if end-t-end testing was perfrmed during the relays cmmissining. There can be n mre effective way f ensuring the entire prtectin scheme than re-playing the same number f tests int the prtectin system and bserving the same results. Perfrmed crrectly, using this test technique fr maintenance tests can be mre efficient as well. Chapter 2 Detailed End-t-End Testing Prcedures This sectin will prvide mre detailed infrmatin abut each step f the end-t-end testing prcedure described as: 1. Obtain and Review Test Cases 2. Islate Equipment Under Test 3. Cnnect Apprpriate Input and Output Cnnectins. 4. Cnnect Test Equipment T Replace CTs/PTs 5. Setup GPS Antenna 6. Apply Meter Test 7. Apply Test Plan 8. Evaluate Results 9. Repeat Steps 7-8 fr All Tests 6 Chris Werstiuk, Manta Test Systems

7 1. Obtain and Review Test Cases End-t-end testing usually perfrms many different test cases simulating faults at varius lcatins alng and arund the transmissin line using a mix f the mst cmmn fault types (Phase t Neutral, Phase t phase, and three-phase). Sme additinal test cases are perfrmed utside the prtected zne als t ensure that the relay will nt trip. The traditinal distance prtectin settings fr a distance relay are as fllws and displayed in figure 2 assuming a 10Ω transmissin line: Zne-1 = 80% f the transmissin line with n intentinal delay. zne-2 = 125% f the transmissin line with apprximately a 20 cycle delay Zne-3 = Site specific percentage in the reverse directin. TX1 RX1 Z1 Z2 Z3 Z1 Z2 Z3 TX1 RX1 TX1 RX1 Z1 Z2 Z3 Z1 Z2 Z3 TX1 RX1 RLY-3 RLY-1 RLY-2 RLY-4 RLY-1 ZONE 1 RLY-4 ZONE 1 RLY-3 ZONE 1 RLY-2 ZONE 1 RLY-1 ZONE 2 RLY-2 ZONE 2 RLY-1 ZONE 3 RLY-2 ZONE 3 RLY-3 ZONE 2 RLY-4 ZONE 2 RLY-3 ZONE 3 RLY-4 ZONE 3 Figure 2: Typical Distance Prtectin Settings A typical series f tests verifies the relays peratin at key lcatins alng the transmissin line slightly abve and belw the pickup settings fr each zne. Fr example, the first tw tests wuld be perfrmed at 75% (7.5Ω) and 85% (8.5Ω) frm RLY-1 t test the zne #1 prtectin f RLY-1. The secnd tw tests wuld be perfrmed at 75% and 85% frm RLY-2 r 1.5Ω and 2.5Ω frm RLY-1 t test zne-1 prtectin f RLY-2. Anther 4 tests wuld be perfrmed t test the zne-2 prtectin f bth relays at 120% and 130% frm relays RLY-1 and RLY-2. Anther tw t fur tests are perfrmed t test zne-3 if zne-3 is enabled. A final test can be perfrmed t ensure that the relays will nt perate due t a sudden phase reversal when a fault ccurs n ne f tw parallel lines RLY RLY -2 RLY-1 ZONE 1 RLY-1 ZONE 2 RLY-1 ZONE 3 RLY-2 ZONE 3 Figure 3: Typical End-t-End Tests RLY-2 ZONE 1 RLY-2 ZONE 2 Chris Werstiuk, Manta Test Systems 7

8 While it is pssible t manually calculate all f these pints n a radial (nly ne surce) transmissin line knwing the line length and settings, these manual calculatins d nt include the surce impedance which will affect the pre-fault, fault values, and relay peratin. The calculatins becme very cmplicated when the transmissin line has mre than ne surce available. These cmplicatins make test-case creatin beynd the average relay tester and test cases shuld be supplied by the design engineer. The design engineer shuld have the electrical system mdeled by a pwer system simulatr and it shuld be relatively easy fr them t chse the test case parameters and exprt the results as a wavefrm r fault-state data. The test cases shuld be submitted t the testing team with a descriptin f the expected results fr each test, anther reasn why this infrmatin shuld be supplied by the design engineer. Each test case can be supplied t the relay tester as a single file cntaining wavefrm data fr bth relays r as separate files fr each relay under test. It is very imprtant that the channels r files are labeled crrectly t ensure the crrect parameters are applied at each lcatin during the test. Cntact the relay test-set manufacturer t learn hw t play wavefrm files and chse the apprpriate channels. Wavefrm data can be the simplest way t perfrm end-t-end testing when everything is wrking prperly. There are additinal benefits t wavefrm testing such as simulating system distrtins that typically ccur during a real fault such as transients, DC ffset, r CVT distrtins. The design engineer exprts the data int COMTRADE frmat fr each test case and sends the files t the relay tester. The relay testers pen the file in their respective test-sets, check t ensure the crrect channels are used, and run the tests. If the relays respnd crrectly, the relay testers save the data and mve n t the next test. Hwever, it can be difficult fr tw relay testers at tw different lcatins t trublesht prblems in the test plan itself because they cannt cmpare the tw wavefrms side-by-side t find any grss errrs. Supplying test cases as data can be tedius fr the design engineer and the relay tester depending n the system mdeling sftware used and the intended test-set. Ideally, the design engineer exprts the data as a file like the wavefrm methd described previusly and that file is imprted int the test-set withut difficulty. This ideal situatin is ften nt the case and sme intermediary sftware may be required fr the cnversin prcess. The infrmatin culd als be manually entered int the test-set sftware. This methd prvides better dcumentatin f the tests and allws the relay testers at different lcatins t quickly cmpare the test cases t find grss errrs; but it can be mre time cnsuming and prne t simple cnversin errrs. 8 Chris Werstiuk, Manta Test Systems

9 An example test case with identical parameters is shwn belw using bth methds. RLY-1 RLY-2 Pre Fault Values Angle Values Angle Values Angle Values Angle VA VB VC IA IB IC Pre Fault Fault 1 Fault 1 Lad frm Bus t Line (SOURCE BUS fr Prefault) Fault 2 Pst Fault Lad frm Line t Bus (LOAD BUS fr Prefault) Fault 2 Pst Fault Values Angle Values Angle Values Angle Values Angle PRE FAULT Secndary Test Set FAULT 1 Secndary Test Set Pst Fault Secndary Test Set PRE FAULT FAULT 1 Pst Fault Secndary Secndary Secndary Test Test Set Test Set Set VA VB VC IA IB IC Figure 4: Example Test Plan using Raw Data Figure 5: RLY-1 Test Case as Wavefrm Figure 6: RLY-2 Test Case as Wavefrm Chris Werstiuk, Manta Test Systems 9

10 Always perfrm a quick check f the test vltage and current angle when reviewing the test cases. Pre-fault and un-faulted vltages in fault states shuld have similar phase angles n bth ends. Pre-fault current and ut-f-zne current phase angles shuld be ppsite r apprximately 180º frm each ther. Faults n the transmissin line shuld have similar phase angles. The fllwing pre-fault vectrs and wavefrms are typical fr a prperly cnfigured pre-fault cnditin. Figure 7: RLY-1 Pre-Fault Vectrs Figure 8: RLY-2 Pre-Fault Vectrs Figure 9: RLY-1 Internal Fault Vectrs Figure 10: RLY-2 Internal Fault Vectrs Figure 11: RLY-1 External Fault Vectrs Figure 12: RLY-2 External Fault Vectrs 10 Chris Werstiuk, Manta Test Systems

11 RLY-1 degrees RLY-1 degrees RLY degrees RLY degrees RLY-1 0 degrees RLY-1 -1 degrees RLY-2 0 degrees RLY-2 -1 degrees Figure 13: Pre-Fault Wavefrm Figure 14: Internal Fault Wavefrm RLY-1 degrees RLY-2 98 degrees RLY-1 -4 degrees RLY-2 -5 degrees Figure 15: External Fault Wavefrm 2. Islate Equipment Under Test An ideal end-t-end test requires the transmissin line t be cmpletely islated by discnnect switches utside the zne f prtectin. This allws the circuit breakers t perate in rder t prve the entire prtective scheme as shwn in the fllwing figure. TX1 RX1 Z1 Z2 Z3 Z1 Z2 Z3 TX1 RX1 TX1 RX1 Z1 Z2 Z3 Z1 Z2 Z3 TX1 RX1 RLY-3 RLY-1 RLY-2 Figure 16: High Vltage Islatin RLY-4 Chris Werstiuk, Manta Test Systems 11

12 RELAY FAIL ALARM SCADA PT# 1 DWG: SCADA-1 RELAY TRIPPED SCADA PT# 122 DWG: SCADA-1 TRIP 86-5 DWG: 52-5 DC1 End-t-End Testing It is pssible t perfrm end-t-end tests withut islating the line but special care must be taken t ensure that the circuit breakers remain clsed thrughut the test and that backup prtectin systems are available. Online end-t-end testing is perfrmed by islating the primary prtectin via test switches while the backup prtectin remains nline, prviding prtectin fr the transmissin line while the tests are perfrmed. Simulating breaker status cntacts is required and ften difficult as test switches may nt be available fr breaker status inputs t the relay depending n the lcatin and lcal utility standards. After the primary prtectin is tested, it is carefully placed back int service and the prcess is repeated fr testing the backup prtectin. 3. Relay Input / Output Cnnectins Carefully review the drawing t make sure all utput cntacts are accunted fr and pen any test switches, panel circuit breakers, fuses, etc. necessary t prevent unintended equipment peratin. The circuit breaker psitin, relay peratin, r metering values applied during testing culd have unfreseen cnsequences in an external plant-wide lgic cntrller causing embarrassing and expensive utages if apprpriate measures are nt taken. There are several ways t cnnect relay utput cntacts t the test-set depending n the test-set and the field cnnectins. The simplest cnnectin applies the test-set input cntacts directly acrss the relay s utput cntacts. With test switches, this is a simple task as shwn in figure DC1 switches A and B are pened and the test-set input is cnnected at the test switches r n the relay itself. Test switches are nice but nt always available, and a test-set input can be cnnected acrss the cntact withut test switches as shwn n the right side f Figure 17. Check with the test-set manufacturer befre attempting this cnnectin. Sme relay manufacturer inputs are plarity sensitive and may need t be reversed if the test-set senses the cntact is clsed when it is actually pen. If the circuit breakers will perate during the test, the test switches shuld be clsed t allw the trip signal t perate the circuit breaker s trip cil. Open the test switches if the breaker is nt intended t perate during the test. TB DC V+ TB1-3 E2 RELAY TEST SET E11 RELAY TEST SET R1 TRIP Timer Input R7 AUX E12 R8 SELF TEST + Timer Input F2 F10 F DC1 4 TB1-7 TB1-4 TB1-5 Figure 17: Simple Test-set Input Cnnectins If test switches are nt prvided r are clsed, anther part f the circuit culd be shrted in parallel with the utput cntact under test and cause a false peratin. The relay R2 Clse 12 Chris Werstiuk, Manta Test Systems

13 cntact in the fllwing figures is cnnected in parallel with the DCS clse cntact. If the DCS cntact clses when the test switches are clsed, the relay input will sense cntact clsure. This prblem is easily slved by pening either f the test switches. One wire must be remved when n test switches are prvided. Figure 18 displays the different ptins when cntacts are cnnected in parallel. TB1-8 TB1-8 DCS1 DCS CLOSE DCS2 6 5 E3 R2 CLOSE PB F DC1 RELAY TEST SET STATUS + Timer Input CLOSED DCS1 DCS CLOSE DCS2 6 5 E3 R2 CLOSE PB F DC1 RELAY TEST SET + Timer Input STATUS OPEN DC DC1 TB1-9 TB1-9 TB1-8 TB1-8 DCS1 E3 DCS R2 CLOSE CLOSE PB DCS2 F3 RELAY TEST SET STATUS + Timer Input OPEN DCS1 E3 DCS R2 CLOSE CLOSE PB DCS2 F3 RELAY TEST SET + Timer Input STATUS OPEN DC1 TB1-9 TB1-9 Figure 18: Test-set Input Cnnectins with Cntact in Parallel Mst test-set manufacturers als allw vltage-mnitring inputs t reduce wiring changes when testing. Instead f mnitring whether a cntact is clsed r pen, the vltage-mnitring ptin determines that the cntact is clsed when the measured vltage is abve the test-set s defined setpint. The test-set assumes the cntact is pen if the measured vltage is belw the setpint. Anther cnnectin is required when using vltage-detecting, test-set inputs when the crrect cntact state is necessary. Any f the test-set cnnectins in figure 19 can be used when vltage is required fr cntact sensing. Starting frm the left, The R2 timer is cnnected between TB1-9 and TB3-6 (negative circuit) with clsed utput cntact test switches. When R2 and DCS clse are pen, the vltage between the tw terminals shuld be negligible and the relay will detect an pen cntact. When R2 r DCS clse clses, the relay will detect 125VDC acrss the cntacts and the test-set will detect a clsed cntact. Be wary f this cnnectin because the circuit breaker will clse if the circuit is cmplete! The R3 timer is cnnected between terminal 11 f the pen test switch and circuit negative. This is a safe cnnectin as the test-set will detect the crrect cntact psitin and the circuit breaker will nt trip when the cntact is perated.. The simplest cnnectin is the R1 timer with the test-set input cnnected between terminal 3 f the test switch and grund. (The test-switch cver-screw as the grund that wrks in mst Chris Werstiuk, Manta Test Systems 13

14 applicatins) Obviusly this cnnectin will nly wrk when the DC system is grunded at the midpint, as mst DC systems are. This cnnectin is als safe as the cnnected 86-5 lckut will nt perate when the cntact is perated. DC+ TB1-10 TB1-6 RELAY TEST SET TB1-8 DCS1 DCS CLOSE DCS DC1 E3 R2 CLOSE PB F DC1 TB CS CLOSE 17 TB3-5 G E F TB DC1 9 E4 R3 AUX 27 F DC CS TRIP DC1 1 E2 R1 TRIP F DC1 4 TB1-7 R2 Timer Input + TB TB RELAY TEST SET RELAY TEST SET 43 AUTO MANUAL R3 Timer Input + R1 Timer Input Vdc CT#4 DC PANEL A TOC 52-5 TOC SR M TRIP Y LS b a Y LS G b 52-5 F 4 17 C 86-5 TB3-6 B DC- TB3-9 TB3-11 Figure 19: Test-set Input Cnnectins in DC Circuit NEVER apply the fllwing cnnectin in a trip circuit unless there will be n negative results if the circuit is cmpleted and perates. Sme test-set sensing cntacts have a lw impedance and will cmplete the circuit. 14 Chris Werstiuk, Manta Test Systems

15 DC DC1 1 R1 TRIP E2 F2 RELAY TEST SET DC1 4 + Timer Input R1 TB1-7 G F 3 C B DC- Figure 20: Dangerus Test-set Input Cnnectin in Trip Circuit Always review the manufacturer s literature when perfrming digital input testing because relays can be unfrgiving when nt crrectly cnnected and cause sme embarrassing and expensive smke t be released. These cnnectins shuld als be carefully cmpared t the applicatin t ensure they are cnnected prperly befre applying vltage t the circuit. Figures, 22 and 23 shw sme typical examples f input cnnectins frm different relay manufacturers. Figure frm the Beckwith Electric M-3310 manufacturer s bulletin displays the cnnectins fr relay input cnnectins. The field input cntact is dry and the sensing vltage is supplied by the relay itself. Any external vltage cnnected in this circuit culd damage the relay. The test-set dry utput cntact r jumper wuld be cnnected between terminals 10 and 11 t simulate an IN 1 input. Figure 22 frm the SEL 311C manufacturer s bulletin shws that this relay requires wet inputs. An external vltage must be cnnected befre the relay will detect input peratin. Always check the input vltage t make sure it matches the surce vltage. Chris Werstiuk, Manta Test Systems 15

16 SPARE 125Vdc CT#3 DC PANEL A End-t-End Testing Figure : M-3310 Relay Input Cnnectins Figure 22: SEL 311C Input Cnnectins The GE Multilin SR-750 relays can have wet r dry cntacts cnnected as shwn in Figure 23 frm the manufacturer s bulletin. Relays that can accept bth styles f input cntacts are mre prne t damaging cnnectin errrs and the site and manufacturer s drawings shuld be cmpared t ensure n errrs have been made. Figure 23: GE/Multilin SR-750 Input Cnnectins When testing, the test-set utput is cnnected acrss the actual cntact used in the circuit t prevent unintentinal damage when applying incrrect test vltages. If the in-service cntact is clsed, the cntact needs t be islated by pening test switches r temprarily remving wiring in rder t test bth input states. DC+ TB2-2 RELAY TEST SET A 52-5 TB2-3 TB2-4 + Test Output DC2 5 C1 C2 IN1 IN2 DC NEG D12 RLY-12 MULTILIN SR DC2 4 DC- Figure 24: Test-set Output Cnnectins in DC Circuit 16 Chris Werstiuk, Manta Test Systems

17 4. Cnnect Test Equipment t Replace CTs/PTs Cnnect the test-set t simulate the CT and PT inputs as shwn in figure 25. All CT test switches have been pened t shrt the CT inputs, and an islating device has been inserted between the CT clips t islate the tp frm the bttm. Always pay attentin t the PT cnnectins and triple check that the test-set is cnnected t the relay side f the test switch. Incrrect cnnectins culd back-feed the cnnected PTs and apply a dangerus vltage t the high-side f the PTs. CABLE FROM XFMR-2 OA OB OC VT8 4200:120V OA OB OC AC ISOLATING DEVICE CT's : MR SET 2000:5 C200 X2 X2 X2 1A1 1B1 1C1 1C0 A X5 This DWG X A2 1B2 1C2 G5 H5 G6 H6 1A3 G7 H7 1B3 G8 H8 1C3 G9 H9 RLY-12 MULTILIN SR C A This DWG X RELAY TEST SET Magnitude Phase Angle A Phase Vlts B Phase Vlts C Phase Vlts N Phase Vlts Test Vlts Test Vlts Test Vlts (240 ) 120 OA OB OC TO 4160V BUS + A Phase Amps + B Phase Amps + C Phase Amps AØ Test Amps 0 BØ Test Amps -120 (240 ) CØ Test Amps Timer Input Alternate Timer Cnnectin DC Supply - Element - Timer Output + Input + Figure 25: Example AC Test-set Cnnectins If test switches are nt available, the wiring will have t be remved t test the relay. Label each wire and dcument all cnnectins befre remving any wiring. Replace the wiring after testing, and check the terminatins against the dcumentatin. It is always preferable t have the CT/PT lp tests cmpleted after relay testing t ensure the cnnectins are crrect. Always check the nline metering after energizatin t ensure the wiring has been replaced crrectly. It is a gd idea t carry a checklist f each wire remved t ensure every wire is returned t service. Chris Werstiuk, Manta Test Systems 17

18 5. Setup GPS Antenna Mst test-sets require at least 4 GPS satellite signals t guarantee accuracy. The antenna must be munted in a fairly pen area with a clear view f the pen sky, especially the suthern hrizn. Munting the antenna n tp f a truck in the parking lt usually wrks well. Change the test-set settings t use the GPS clck as its reference signal and wait fr the GPS status t indicate that the test-set has been synchrnized t the GPS signals. This can take up t 30 minutes the first time it is applied at a lcatin depending n the test-set. Subsequent synchrnizatins shuldn t require such a lng delay. Becme familiar with a GPS errr message by discnnecting the testset frm the antenna after GPS synchrnizatin in rder t recgnize a lss-f-synchrnizatin prblem if it ccurs during the test. If pen sky is nt available, sme test-sets will allw synchrnizatin t the substatin s IRIG signal. A substatin s IRIG signal is anther timing standard that uses a GPS clck cnnected t a large antenna that cnverts the GPS time t an IRIG signal. The IRIG signal is cnnected t all f the prtective relays, fault recrders, and ther devices inside the substatin t ensure all devices will recrd the same time if an event ccurs t help with pst-fault analysis. 6. Apply Meter Test A meter test shuld be the first test perfrmed whenever a digital relay is tested. Meter tests prve that the analg-t-digital cnverters are wrking inside the relay, the CT and PT ratis have been setup crrectly, and that the test-set t relay cnnectins are crrect. It is imprtant t ntify all ndes befre starting a meter test t prevent trip signals frm all cnnected relays. Perfrm tw single-phase tests t prve that each phase f the test-set is cnnected t the crrect phase f the relay. Apply single-phase, nminal current and vltage t the relay. Mnitr the relay s metering functin frm the frnt panel r relay sftware and ensure that the vltage and current are measured n the crrect phase. Apply current and vltage t anther phase and ensure that the crrect phases are displayed. If the relay mnitrs zer-sequence vltage and/r current, recrd the zer-sequence values n the test sheet. When single-phase current/vltage is applied, the zer-sequence value shuld match the applied value. Zer sequence cmpnents cannt ccur in delta cnnected systems and there will be n zer-sequence measurements fr delta cnnected PTs. This test culd be repeated fr the third phase, but nce tw phases have been verified, the fllwing three-phase tests can be used fr all ther measurements. 18 Chris Werstiuk, Manta Test Systems

19 Apply three-phase, nminal current and vltage t the relay, recrd the metering results n the test sheet, and cmpare them t the CT and PT ratis. If the relay als displays phase angles, recrd these values and ensure that they are in the crrect phase relatinship. D nt assume that a three-phase, phase-angle measurement can be used in place f the single-phase tests abve. The relay uses its wn reference fr phase angles which can be misleading. Fr example, if all three-phases were rlled t the next psitin (AØ t BØ, BØ t CØ, CØ t AØ) the test-set and the relay wuld bth indicate the crrect phase angles fr each phase (AØ=0º, BØ=-120º, CØ=120º) but AØ current/vltage frm the test-set wuld be injected int BØ f the relay. Als, the test-set and the relay culd use different references when displaying phase angles that can be cnfusing as shwn in Figure 26. Fr example, the phase relatinships displayed by a GE/Multilin SR-750 wuld be 0º, 120º, 240º LAG. A SEL relay with the same settings and cnnectin wuld display 0º, -120º, 120º. If the relay mnitrs psitive sequence cmpnents, recrd the current and vltage values n the test sheet. The psitive sequence value shuld match the applied current and vltage and the negative sequence and zer-sequence vltages shuld be almst zer. LEADING PHASE ANGLES LAGGING PHASE ANGLES 120 Vbn Vbn Van Van Vbn Vbn Figure 26: Phase Angle Relatinships Watt and VAR measurements can als help determine if the crrect cnnectins have been made. When three-phase, balanced current and vltage is applied; maximum Watts and almst zer VARs shuld be measured. Rtate all three currents by 90º and maximum VARs and almst zer Watts shuld be measured. Any cnnectin prblems will skew the Watt and VAR values and shuld be crrected. If the relay mnitrs negative sequence, reverse any tw phases and recrd the negative sequence values. The negative sequence value shuld be equal t the applied value and the psitive sequence and zer-sequence values shuld be nearly zer. Sme relays display 3x the negative sequence values. In this case, the negative sequence value will be three times the applied value. If the relay has a neutral input fr vltage and/r current, apply a nminal value and cmpare metering values t the CT/PT ratis. A cmpleted test sheet can lk like the fllwing: Chris Werstiuk, Manta Test Systems 19

20 Figure 27: Example Metering Test Sheet 20 Chris Werstiuk, Manta Test Systems

21 7. Apply Test Plan The end-t-end tests begin after all ndes have reprted that their meter tests have been cmpleted successfully. All ndes agree n a test case t run and lad their respective test cases int the test-sets. An example test case fr tw ndes is shwn in the fllwing figures. RLY-1 RLY-2 Pre Fault Values Angle Values Angle Values Angle Values Angle VA VB VC IA IB IC Pre Fault Fault 1 Fault 1 Lad frm Bus t Line (SOURCE BUS fr Prefault) Fault 2 Pst Fault Lad frm Line t Bus (LOAD BUS fr Prefault) Fault 2 Pst Fault PRE FAULT FAULT 1 Pst Fault Secndary Secndary Secndary Test Test Set Test Set Set PRE FAULT FAULT 1 Pst Fault Secndary Secndary Secndary Test Test Set Test Set Set Values Angle Values Angle Values Angle Values Angle VA VB VC IA IB IC Figure 28: Example Test Plan 2 with raw Data Figure 29: Example RLY-1 Wavefrm Test Plan 2 Figure 30: Example RLY-2 Wavefrm Test Plan 2 Chris Werstiuk, Manta Test Systems

22 After the test cases are laded int the test-sets, a start time is decided upn. Different test-sets have different methds t initiate a test. The test-set manufacturer shuld be cntacted t determine the crrect methd t initiate a test and whether sme lead time shuld be added t ensure crrect test case simulatins when tw different test-set mdels are used. The test cuntdwn shuld be initiated after all ndes reprt that they are ready and the start signals are synchrnized fr the same start time. Watch the test-set and relay metering, if pssible, during the test t ensure the test-set started crrectly and injected the crrect values. If any ndes reprt a malfunctin, the prblem shuld be crrected and the test shuld be run again. (Hint: It s ften a gd idea t reset all fault recrder and sequence f event recrds inside the relay between tests t make sure that nly the test in questin is available t prevent cnfusin after several tests have been perfrmed) 8. Evaluate Results After the test case has been injected int all ndes simultaneusly, the relay targets at each nde shuld be recrded and cmpared t the test case descriptin t ensure the relays have respnded crrectly. All event and sequence-f-event recrds shuld als be dwnladed. Sme engineers will review the event recrds frm all relays t review the relays reactin t the fault, and thers will assume crrect peratin based n crrect targeting and time delays fr trips. If everything wrks crrectly, all ndes can mve n t the next test case and inject it int the relay. A perfectly executed series f end-t-end tests is rare and there is ften sme trubleshting invlved. Here are sme cmmn prblems which culd cause an incrrect test result: Wavefrm Playback Was the crrect wavefrm laded at all ndes? State Simulatr Playback Check the hard cpy reprt f simulatin t data in test-set Is the same pre-fault duratin applied at all ndes? Are the same phases faulted at all ndes? Are the phase angle references crrect at all ndes? Did the playback start at the crrect time at all ndes? (Lk at relay event recrds) Were all AC channels recrded in the relay event recrds? (Test lead fell ff, etc) Are cmmunicatin channels active during test? Were the circuit breakers r circuit breaker simulatrs clsed befre the test? 9. Return Prtectin System t Service The prtectin system shuld be returned r placed int service after all test cases have been executed. Make sure that all event recrder, event recrds, and as-left relay settings have been dwnladed and are available fr ff-site review befre beginning the prcedure t return the relays int service. All event recrder, event recrds, min/max, and ther histry related data inside the relay shuld be erased t prevent cnfusin when trubleshting faults after the relays have been placed in-service. All test equipment shuld be discnnected frm the relays and any wiring remved during the test shuld be replaced. The CT, PT, and input test switches shuld be clsed first and the relay utputs shuld be verified t be in their nrmal state befre clsing the trip test switches. Release the equipment t the switching authrity after all test equipment is clear and the panels will be free frm interference. 10. Prepare Reprt The final reprt shuld dcument all f the test results, cmments, and a final cpy f the relay settings t allw the prject manager t review the results and final settings. The fllwing items shuld be included in every test reprt: 22 Chris Werstiuk, Manta Test Systems

23 A) Cver Letter The cver letter shuld describe the prject, prvide a brief histry, and (mst imprtantly) list f all cmments during the test. This letter summarizes all f the test sheets and shuld be written with nn-electrical persnnel in mind. Ideally, this dcument culd be reviewed years frm the testing date with a clear understanding f what tests were perfrmed and their results. Any cmments shuld be clearly explained with a brief histry f any actins perfrmed and the status at the time f the letter. Organize cmments in rder f imprtance and by relay r relay type if the same cmment applies t multiple relays. An example cmment is The current transfrmer rati n drawing A and the supplied relay settings did nt match. The design engineer was cntacted and the crrect rati f 600:5 was applied t the relay settings and cnfirmed in the field. N further actin is required. B) Test Sheet The test sheet shuld clearly shw all the test results, including a printut f event and sequence-f-event recrds fr each test t shw what tests were perfrmed and the relays respnses. A digital cpy f all test cases shuld als be included in the reprt t allw maintenance persnnel in the future t replay the same tests int the relay and evaluate their respnse during maintenance intervals. C) Final Settings The final, as-left settings shuld be dcumented at the end f the test sheet. A digital cpy shuld als be saved, and all relay settings fr a prject shuld be made available t the client r design engineer fr review and their final dcumentatin. Setting files shuld be in the relay s native sftware and in a universal frmat such as wrd prcessr r pdf file t allw the design engineer t make changes, if required, and allw anyne else t review the settings withut special sftware. Chris Werstiuk, Manta Test Systems 23

24

25 Chapter 3 Cmmn Prtectin Schemes The fllwing sectins are intended t prvide a basic understanding f the mst cmmn prtectin schemes tested via end-t-end testing. Distance prtectin settings can be generalized in percentage f the line they are prtecting fr the mst part and it is imprtant t understand the lgic behind basic distance prtectin befre reviewing the prtectin schemes. TX1 RX1 Z1 Z2 Z3 Z1 Z2 Z3 TX1 RX1 TX1 RX1 Z1 Z2 Z3 Z1 Z2 Z3 TX1 RX1 RLY-3 RLY-1 RLY-2 RLY-4 RLY-1 ZONE 1 RLY-4 ZONE 1 RLY-3 ZONE 1 RLY-2 ZONE 1 RLY-1 ZONE 2 RLY-2 ZONE 2 RLY-1 ZONE 3 RLY-2 ZONE 3 RLY-3 ZONE 2 RLY-4 ZONE 2 RLY-3 ZONE 3 RLY-4 ZONE 3 Figure 31: Typical Distance Prtectin Settings Zne-1 prtectin is typically set at 80% f the transmissin line with n intentinal time delay. It is nt set at 100% f the transmissin line because the line impedance used fr prtective relaying is a calculatin based n the size f wire and distance f the transmissin line. There are many ther factrs that can affect the actual line impedance such as simple manufacturer s tlerances, inexact distance measurements, splices, distance between cnductrs, etc that make an exact calculatin impssible. Als, the actual fault will have unknwn prperties such as freign material impedances, arc length, humidity, temperature, etc that make actual fault distance calculatins difficult. 80% is cnsidered t be a safe number fr an instantaneus trip that will nly detect faults n the transmissin line r cnsidered t be in the zne f prtectin. Chris Werstiuk, Manta Test Systems 25

26 An average persn might think that tw prtective relays with zne-1 elements set at 80% f the line twards each ther prvides 100% prtectin f the transmissin line with redundant prtectin n the inner 60% by the verlapping znes f prtectin wuld be enugh. The utility industry is always cncerned with reliability and stability which requires 100% redundancy n all transmissin lines. Zne-2 prtectin is set beynd (apprximately 120%) the transmissin line. It is pssible that the relay will trip if a fault ccurs n anther line which wuld cause a larger system disruptin than necessary and culd impact the system stability fr the entire regin s a 20 cycle time delay is usually added t delay a zne-2 trip. This time delay is intended t give the remte equipment a chance t perate befre the zne-2 element trips fr a fault utside the intended zne f prtectin. Zne-2 has a twfld benefit, redundant prtectin fr the transmissin line and backup prtectin fr external equipment. Zne-3 prtectin in nn-cmmunicatin schemes is usually applied t prvide backup prtectin fr external equipment. It can be applied with very large resistances in the frward directin with a lng time delay (60 cycles) t minimize system disturbances in case f equipment failure. It can als be applied in the reverse directin with a similar time delay as backup prtectin fr relays in the reverse directin. 1. Direct Transfer Trip (DTT) Scheme The direct transfer trip scheme is the simplest f the cmmunicatins schemes and allws a trip signal t be sent t all relays. If the crrect trip signal is detected n ne relay, a trip signal is sent t all the ther relays. A very secure cmmunicatin channel is required fr a DTT scheme t prevent nise n the cmmunicatin channel frm causing an unintended trip. End-t-end testing is nt required fr this cmmunicatin scheme. 2. Direct Under-reaching Transfer Trip (DUTT) The direct under-reaching transfer trip scheme is very similar t the DTT scheme described abve and uses the zne-1 prtective element in each relay t send a DTT signal. Any relay that detects a Zne-1 fault will send a trip signal t all the ther relays in the scheme. A very secure cmmunicatin channel is required fr a DTT scheme t prevent nise n the cmmunicatin channel frm causing an unintended trip. End-t-end testing is nt required fr this cmmunicatin scheme. 3. Permissive Over-Reaching Transfer Trip (POTT) The permissive ver-reaching transfer trip scheme uses zne-2 elements frm up t three relays t determine if a fault has ccurred n a transmissin line. This scheme has distance zne-1 prtectin set at 80% f the line in bth relays RLY-1 and RLY-2. Zne-2 prtectin is set at 120% f the line with a time delay f 20 cycles t prvide backup prtectin fr ther relays. If a zne-2 fault pickup is detected by bth relays (test cases 1 and 2), the fault must be lcated inside the scheme s zne f prtectin because the tw zne-2 settings nly verlap acrss the transmissin line itself. Bth relays will trip almst instantaneusly after a small time delay is applied t prevent cmmunicatin errrs that can cause nuisance peratins. 26 Chris Werstiuk, Manta Test Systems

27 10 If the cmmunicatin scheme is nt enabled, the fllwing figures indicate the utcmes f a standard battery f end-t-end tests assuming that the utside prtective relays fail t perate fr ut-f-zne faults. 9 6 RLY RLY -2 RLY-1 ZONE 1 RLY-1 ZONE 2 RLY-1 ZONE 3 RLY-2 ZONE 3 Figure 32: End-t-End Test Simulatins RLY-2 ZONE 1 RLY-2 ZONE 2 Test RLY-1 RLY-2 1 Trip Zne-1 in 0 cycles Trip Zne-2 in 20 cycles 2 Trip Zne-2 in 20 cycles Trip Zne-1 in 0 cycles 3 Trip Zne-1 in 0 cycles Trip Zne-1 in 0 cycles 4 Trip Zne-1 in 0 cycles Trip Zne-1 in 0 cycles 5 Trip Zne-1 in 0 cycles Trip Zne-1 in 0 cycles 6 Trip Zne-3 in 60 cycles Trip Zne-2 in 20 cycles 7 Trip Zne-2 in 20 cycles Trip Zne-3 in 60 cycles 8 N trip Trip Zne-3 in 60 cycles 9 Trip Zne-3 in 60 cycles N trip 10 N trip N trip 11 N trip N trip Figure 33: End-t-End Test Results with n Cmmunicatin Scheme Applied The fllwing figure indicates the results f a POTT cmmunicatin scheme perating crrectly assuming that the utside equipment des nt perate fr ut-f-zne faults. Test RLY-1 RLY-2 1 Trip Zne-1 in 0 cycles Trip Zne-2 in <3 cycles 2 Trip Zne-2 in <3 cycles Trip Zne-1 in 0 cycles 3 Trip Zne-1 in 0 cycles Trip Zne-1 in 0 cycles 4 Trip Zne-1 in 0 cycles Trip Zne-1 in 0 cycles 5 Trip Zne-1 in 0 cycles Trip Zne-1 in 0 cycles 6 Trip Zne-3 in 60 cycles Trip Zne-2 in 20 cycles 7 Trip Zne-2 in 20 cycles Trip Zne-3 in 60 cycles 8 N trip Trip Zne-3 in 60 cycles 9 Trip Zne-3 in 60 cycles N trip 10 N trip N trip 11 N trip N trip Figure 34: End-t-End Test Results with POTT Cmmunicatin Scheme Applied Chris Werstiuk, Manta Test Systems 27

28 Zne-3 prtectin is set in the reverse directin and is reaches beynd the zne-2 prtectin at - 30% f the line with a time delay f 60 cycles t prvide backup prtectin fr ther relays. Zne-3 is nt necessary fr the POTT scheme t wrk fr faults n the transmissin line but is used t prevent nuisance trips during sudden current reversals n parallel lines by blcking the cmmunicatin-assisted trip scheme if a sudden current reversal is detected. Sudden currentreversal can ccur n sme installatins such as parallel lines as shwn in figure 35. All fur breakers are clsed and a fault ccurs in zne-1 f RLY-1. The current flws thrugh each breaker as shwn by the arrws. RLY-4 zne-2 is picked-up and sends a permissive signal t RLY-3. When breaker-1 pens, the current suddenly reverses thrugh RLY-3 and RLY-4 which starts a race. Will RLY-4 detect the sudden reversal first and stp sending the permissive trip t RLY-3 befre RLY-3 detects a zne-2 pickup? If nt, RLY-3 will have a permissive signal frm RLY-4 and detect a zne-2 fault which will cause a cmmunicatin-assisted trip and de-energize the healthy feeder. RLY-1 - Zne 1 RLY-2 - Zne 2 RLY -1 1 RLY -2 RLY-3 - Zne 3 RLY-4 - Zne 2 RLY -3 RLY -4 RLY -1 1 RLY-2 - Zne 2 RLY -2 RLY-3 - Zne 2 RLY-4 - Zne 3 RLY -3 RLY -4 Figure 35: Current Reversal Example The current-reversal prtectin is tested by simulating a current-reversal as shwn in the fllwing figures. 28 Chris Werstiuk, Manta Test Systems

29 RLY-1 RLY-2 Pre Fault Fault 1 Lad frm Bus t Line (SOURCE BUS fr Prefault) Fault 2 Pst Fault PRE FAULT FAULT 1 FAULT 2 Pst Fault Values Angle Values Angle Values Angle Values Angle VA VB VC IA IB IC Pre Fault Fault 1 Fault 2 Lad frm Line t Bus (LOAD BUS fr Prefault) Pst Fault Secndary Test Set Secndary Test Set Secndary Test Set Secndary Test Set PRE FAULT FAULT 1 FAULT 2 Pst Fault Secndary Secndary Secndary Test Secndary Test Test Set Test Set Set Set Values Angle Values Angle Values Angle Values Angle VA VB VC IA IB IC Figure 36: Current Reversal Test Plan The POTT cmmunicatin scheme speeds the tripping time fr faults n the transmissin line and still prvides backup prtectin fr faults utside f the zne. This scheme is very similar t the DCB scheme (described later in this chapter), especially when the zne-3 lgic is applied t prevent current reversal peratin. Chris Werstiuk, Manta Test Systems 29