FEATURES APPLICATIO S TYPICAL APPLICATIO. LTC1061 High Performance Triple Universal Filter Building Block DESCRIPTIO

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1 FEATRES Three Filters in a Single Package p to th Order Filter Functions Center Frequency Range up to khz f O Q Product up to MHz Guaranteed Center Frequency and Q Accuracy Over Temperature Guaranteed Low Offset Voltages Over Temperature db Signal-to-Noise Ratio Operation from Single.7V Supply, p to ±8V Guaranteed Filter Specifications with ±V Supply and ±2.7V Supply Low Power Consumption with Single V Supply Clock Inputs T 2 L and CMOS Compatible Available in 2-Pin DIP and 2-Pin SO Wide Package APPLICATIO S High Order, Wide Frequency Range Bandpass, Lowpass, Notch Filters Low Power Consumption, Single V Supply, Clock-Tunable Filters Tracking Filters Antialiasing Filters LTC High Performance Triple niversal Filter Building Block DESCRIPTIO The LTC consists of three high performance, universal filter building blocks. Each filter building block together with an external clock and 2 to resistors can produce various second order functions which are available at its three output pins. Two out of three always provide lowpass and bandpass functions while the third output pin can produce highpass or notch or allpass. The center frequency of these functions can be tuned with an external clock or an external clock and a resistor ratio. For Q <, the center frequency ranges from.hz to khz. For Qs of or above, the center frequency ranges from.hz to 28kHz. The LTC can be used with single or dual supplies ranging from ±2.7V to ±8V (or.7v to V). When the filter operates with supplies of ±V and above, it can handle input frequencies up to khz. The LTC is compatible with the LTC single universal filter and the LTC dual. Higher than th order functions can be obtained by cascading the LTC with the LTC or LTC. Any classical filter realization can be obtained., LTC and LT are registered trademarks of Linear Technology Corporation. LTCMOS TM is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATIO th Order, Clock-Tunable,.dB Ripple Chebyshev BP Filter.k k 2 k.k k.k < khz k 7 2.7k LTC.k V = 7.V 7.V T 2 CLK IN <.2MHz V = 7.V 7 8.k k.k V OT TA FILTER GAIN (db) 2 8 Amplitude Response f CLK = MHz 2kHz 2 INPT FREQENCY GAIN (khz) TA2 fe

2 LTC ABSOLTE AXI RATI GS (Note ) W W W Supply Voltage... 8V Power Dissipation... mw Operating Temperature Range LTCAC, LTCC... C T A 8 C LTCAM, LTCM... C T A C Storage Temperature Range... C to C Lead Temperature (Soldering, sec.)... C PACKAGE/ORDER I FOR LP A BP A 2 N A INV A S A AGND //HOLD 7 CLK 8 LS h V TOP VIEW LP B BP B N B INV B S B V LP C BP C HP C INV C W ATIO ORDER PART NMBER LTCACN LTCCN LTCCSW N PACKAGE 2-LEAD PLASTIC DIP SW PACKAGE 2-LEAD PLASTIC SO WIDE T JMAX = C, θ JA = C/W (N) T JMAX = C, θ JA = 8 C/W (SW) J PACKAGE 2-LEAD CERAMIC DIP T JMAX = C, θ JA = C/W (J) OBSOLETE PACKAGE Consider the N2 Package for Alternate Source LTCAMJ LTCMJ LTCACJ LTCCJ Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS (Complete Filter) The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at V S = ±V,, T 2 L clock input level, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX NITS Center Frequency Range, f O f O Q 7kHz, Mode, V S = ±7.V.k Hz f O Q.MHz, Mode, V S = ±7.V.k Hz f O Q 7kHz, Mode, V S = ±7.V.k Hz f O Q MHz, Mode, V S = ±7.V.7k Hz Input Frequency Range 2k Hz Clock-to-Center Frequency Ratio, f CLK /f O Sides A, B: Mode, R = = k LTCA = k, Q =, f CLK = 2kHz ±.% LTC Pin 7 High. ±.2% Side C: Mode, R = = k = R = k, f CLK = 2kHz LTCA Same as Above, Pin 7 at ±.% LTC Mid-Supplies, f CLK = khz ±.2% Clock-to-Center Frequency Ratio, Side-to-Side Matching LTC.2% Q Accuracy Sides A, B, Mode LTCA Side C, Mode ± 2 % LTC f O Q khz, f O khz ± % 2 fe

3 LTC ELECTRICAL CHARACTERISTICS (Complete Filter) The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at V S = ±V,, T 2 L clock input level, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX NITS f O Temperature Coefficient Mode, :, f CLK < khz ± ppm/ C Q Temperature Coefficient Mode, :, f CLK < khz ± ppm/ C Mode, f CLK < khz ± ppm/ C DC Offset Voltage V OS, Figure 2 2 mv V OS2 f CLK = 2kHz, : mv V OS2 f CLK = khz, : mv V OS, LTCCN, ACN/LTCCS f CLK = 2kHz, : 2/2 mv V OS, LTCCN, ACN/LTCCS f CLK = khz, : / mv Clock Feedthrough f CLK < MHz. mv RMS Maximum Clock Frequency Mode, Q <, V S ± 2. MHz Power Supply Current 8 ma ma (Complete Filter) The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at V S = ±2.7V,, unless otherwise specified. Center Frequency Range, f O f O Q khz, Mode, :.2k Hz f O Q khz, Mode, :.k Hz Input Frequency Range 2k Hz Clock-to-Center Frequency Ratio :, f CLK = 2kHz, Q = LTCA Sides A, B: Mode ±.% LTC Side C, Mode, 2kHz ±.% LTCA :, f CLK = khz, Q = ±.% LTC Sides A, B: Mode ±.% Side C: Mode Q Accuracy LTCA Same as Above ±2 % LTC ± % Maximum Clock Frequency 7 khz Power Supply Current. ma (Internal Op Amps) The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at, unless otherwise specified. Supply Voltage Range ±2.7 ± V Voltage Swings LTCA V S = ±V, R L = k (Pins,2,,,,2) ±. ±.2 V LTC V S = ±V, R L =.k (Pins,,8) ±.8 ±.2 V LTC, LTCA ±. V Output Short-Circuit Current Source/Sink V S = ±V / ma DC Open-Loop Gain V S = ±V, R L = k 8 db GBW Product V S = ±V MHz Slew Rate V S = ±V 7 V/µs Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. fe

4 .. LTC TYPICAL PERFOR Mode, Mode (f CLK /f O ) Deviation vs Q A W CE CHARACTERISTICS Mode, Mode (f CLK /f O ) Deviation vs Q Mode : Deviation of (f CLK /f O ) with Respect to Q = Measurement % DEVIATION (f CLK /f O ) V S = ±V f CLK = 2kHz f CLK /f O = (TEST POINT) % DEVIATION (f CLK /f O ) V S = ±V f CLK = khz f CLK /f O = (TEST POINT) DEVIATION OF fclk/fo WITH RESPECT TO Q = MEASREMENT (%) V S = ±V PIN 7 AT : (A) (B) f CLK /f O = : /R = / /R = /2 f CLK /f O = 2:. IDEAL Q. IDEAL Q. IDEAL Q G G2 G Mode : (f CLK /f O ) = : Mode : (f CLK /f O ) = : Mode : (f CLK /f O ) = : DEVIATION FROM IDEAL Q (%) 2 2 f CLK /f O = / V S = ±2.V 2 Q< CENTER FREQENCY (khz) V S = ±7.V 2 Q< f CLK /f O = / V S = ±V 2 Q< DEVIATION FROM IDEAL Q (%) 2 2 V S = ±2.V V S = ±7.V Q=2 Q< Q=2 Q= V S = ±V Q=2 Q= CENTER FREQENCY (khz) DEVIATION FROM IDEAL Q (%) 2 2 f CLK /f O = / V S = ±2.V 2 f CLK /f O = : Q= 2 V S = ±7.V CENTER FREQENCY (khz) V S = ±V Q= Q= G G G DEVIATION FROM IDEAL Q (%) 2 2 Mode : (f CLK /f O ) = : f CLK /f O vs f O Supply Voltage Power Supply Current vs V S = ±2.V Q=2 2 Q= Q=2 V S = ±V V S = ±7.V Q= Q= Q= Q= CENTER FREQENCY (khz) 2 ERROR FROM IDEAL fclk /fo (%) Q = f CLK /f O = / V S = ±2.V MODE, MODE V S = ±2.V MODE, CENTER FREQENCY (khz) V S = ±7.V V S = ±V MODE MODE MODE V S = ±V MODE, V S = ±7.V MODE, MODE Q = f CLK /f O = / ISPPLY (ma) T A = C POWER SPPLY VOLTAGE (±V) T A = C G7 G8 G fe

5 LTC BLOCK DIAGRA W CLK (8) LEVEL SHIFT CLOCK GENERATOR TO FILTER A INV A () NA () Σ BP A (2) LP A () S A () LEVEL SHIFT CLOCK GENERATOR TO FILTER B INV B (7) NB (8) Σ BP B () LP B (2) S B () LEVEL SHIFT CLOCK GENERATOR TO FILTER C INV C () HP C () BP C () LP C () LEVEL SHIFT () // HOLD (7) AGND () V () V () BD PI DESCRIPTIO A D APPLICATIO HI TS Power Supplies (Pins, ) They should be bypassed with.µf disc ceramic. Low noise, nonswitching, power supplies are recommended. The device operates with a single V supply, Figure, and with dual supplies. The absolute maximum operating power supply voltage is ±V. Clock and Level shift (Pins 8, ) When the LTC operates with symmetrical dual supplies the level shift Pin should be tied to analog ground. For single V supply operation, the level shift pin should be tied to Pin which will be the system ground. The typical logic threshold levels of the clock pin are as follows:.v above the level shift pin for ±V supply operation,.7v for ±7.V and above, and.v for single V supply operation. The logic threshold levels vary ±mv over the full military temperature range. The recommended duty cycle of the input clock is % although for clock frequencies below khz the clock on time can be as low as ns. The maximum clock frequency for ±V supplies and above is 2.MHz. S A, S B (Pins, ) These are voltage input pins. If used, they should be driven with a source impedance below kω. when they are not used, they should be tied to the analog ground Pin. AGND (Pin ) When the LTC operates with dual supplies, Pin should be tied to system ground. When the LTC operates with a single positive supply, the analog ground pin should be tied to /2 supply, Figure. The positive input of all the internal op amps, as well as the common reference of all the internal switches, are internally tied to the analog ground pin. Because of this, a clean ground is recommended. fe

6 LTC PI µf V T 2 L CLOCK IN f CLK < MHz DESCRIPTIO 2.k 2.k.µF R A D LTC APPLICATIO HI TS V OT F R R C IN R Clock Feedthrough This is defined as the amplitude of the clock frequency appearing at the output pins of the device, Figure 2. Clock feedthrough is measured with all three sides of the LTC connected as filters. The clock feedthrough mainly depends on the magnitude of the power supplies and it is independent from the input clock levels, clock frequency and modes of operation. The Table 2 illustrates the typical clock feedthrough numbers for various power supplies. Figure. The th Order LP Butterworth Filter of Figure Operating with a Single V Supply A = 2V/DIV //Hold (Pin 7) By tying Pin 7 to V, the filter operates with a clock-tocenter frequency internally set at :. When Pin 7 is at mid-supplies, the filter operates with a : clock-tocenter frequency ratio. Table shows the allowable variation of the potential at Pin 7 when the : mode is sought. When Pin 7 is shorted to the negative supply pin, the filter operation is stopped and the bandpass and lowpass output act as a sample-and-hold circuit holding the last sample of the input voltage. The hold step is around 2mV and the droop rate is µv/sec. Table TOTAL POWER SPPLY VOLTAGE RANGE OF PIN 7 (V) FOR : OPERATION (V) 2. ±. ± 7. ±. B = mv/div HORIZONTAL = µs/div Figure 2. Typical Clock Feedthrogh of the LTC Operating with ±V Supplies. Top Trace is the Input Clock Swinging V to V and Bottom Trace is One of the Lowpass Outputs with Zero or DC Input Signals. Table 2 POWER SPPLY (V) CLOCK FEEDTHROGH (V RMS ) ±2..2 ±. ±8.8 Definition of Filter Functions Refer to LTC data sheet. F2 fe

7 W ODES OF OPERATIO Description and Applications. Primary Modes: There are two basic modes of operation, Mode and Mode. In Mode, the ratio of the external clock frequency to the center frequency of each 2nd order section is internally fixed at : or :. In Mode, this ratio can be adjusted above or below : or :. The side C of the LTC can be connected only in Mode. Figure illustrates Mode providing 2nd order notch, lowpass, and bandpass outputs (for definition of filter functions, refer to the LTC data sheet). Mode can be used to make high order Butterworth lowpass filters; it can also be used to make low Q notches and for cascading 2nd order bandpass functions tuned at the same center frequency and with unity-gain. Mode, R AGND N S BP LP Σ / LTC f f O = CLK ; f n = f () O H OLP = ; H OBP = ; H ON = R R R Q = F Figure. Mode : 2nd Order Filter Providing Notch, Bandpass, Lowpass R LTC Figure, is the classical state variable configuration providing highpass, bandpass and lowpass 2nd order filter functions. Since the input amplifier is within the resonant loop, its phase shift affects the high frequency operation of the filter and therefore, Mode is slower than Mode. Mode can be used to make high order all-pole bandpass, lowpass, highpass and notch filters. Mode as well as Mode is a straightforward mode to use and the filter s dynamics can easily be optimized. Figure illustrates a th order lowpass Butterworth filter operating with up to khz cutoff frequency and with up to 2kHz input frequency. Sides A, B are connected in Mode while side C is connected in Mode. The lower Q section was placed in side C, Mode, to eliminate any early Q enhancement. This could happen when the clock approaches 2MHz. The measured frequency response is shown in Figure. The attenuation floor is limited by the crosstalk between the three different sections operating with a clock frequency above MHz. The measured wideband noise was µv RMS. For limited temperature range the filter of Figure works up to 2.MHz clock frequency thus yielding a khz cutoff. V OT C C 7 R AGND R HP S BP LP Σ / LTC f f O = CLK ; Q = () R R H OHP = R ; H OBP = ; H OLP = R R R NOTE: ADD C C FOR Q > AND f CLK > MHz, SCH AS C C F. R.2MHz T 2 L CLOCK < 2.MHz V 7 8 LTC HARMONIC DISTORTION WITH f CLK = 2MHz f IN khz, V RMS 2kHz, V RMS khz, V RMS khz, V RMS 2ND HARMONIC 7dB 2dB 2dB 2dB V R R R STANDARD % RESISTOR VALES R = 2k = k R = 2k 2 = k R = k = 2k R = 2k 2 = 2k = k = 7.8k LTC F Figure. Mode : 2nd Order Filter Providing Highpass, Bandpass, Lowpass Figure. th Order Butterworth Lowpass Filter with Cutoff Frequency up to khz fe 7

8 LTC W ODES OF OPERATIO GAIN (db) 2 7 k f CLK = MHz f C = 2kHz f CLK = 2MHz f C = khz 2k k k 2k f IN (Hz) V S ±V = V RMS F Figure. Measures Frequency Response of the Lowpass Butterworth Filter of Figure 2. Secondary Modes: Mode b It is derived from Mode. In Mode b, Figure 7, two additional resistors, R and R, are added to attenuate the amount of voltage fed back from the lowpass output into the input of the S A (S B ) switched capacitor summer. This allows the filter clockto-center frequency ratio to be adjusted beyond : (or :). Mode b still maintains the speed advantages of Mode. Figure 8 shows the lowpass sections of the LTC in cascade resulting in a Chebyshev lowpass filter. The side A of the IC is connected in Mode b to provide the first resonant frequency below the cutoff frequency of the filter. The practical ripple, obtained by using a non-a version of the LTC and % standard resistor values, was.db. For this th order lowpass, M the textbook Qs and center frequencies normalized to the ripple bandwidth are: Q =., f O =.7, Q2 =., F O2 =., Q =., F O =.7. The design was done with speed in mind. The higher (Q, F O ) section was in Mode and placed in the side B of the LTC. The remaining two center frequencies were then normalized with respect to the center frequency of side B; this changes the ratio of clock-to-cutoff frequency from : to.7 = 8.:. As shown in Figure, the maximum cutoff frequency is about khz. The total wideband output noise is 22µV RMS and the measured output DC offset voltage is mv. R R R f CLK < 2MHz V LTC STANDARD % RESISTOR VALES R =.7k =.k R =.k R = k 2 =.k R =.8k = k =.k 2 2 R V R R = 2.87k 2 = k =. R =.8k R V OT F8 Figure 8. th Order Chebyshev, Lowpass Filter sing Different Modes of Operation for Speed Optimization R R N S BP LP V S > ±V = V RMS f CLK =.MHz R Σ F7 VOT/VIN (db) 2 AGND f f O = CLK R ; f n = f O ; Q = () R R R R R f H ON (f ) = H ON2 = ( f CLK 2 ) R H OLP = /R ; H OBP = ; (R//R) <k R/(R R) R 7 k k k f IN (Hz) M F 8 Figure 7. Mode b: 2nd Order Filter Providing Notch, Bandpass, Lowpass Figure. Amplitude Response of the th Order Chebyshev Lowpass Filter of Figure 8 fe

9 LTC W ODES OF OPERATIO Another example of Mode b is illustrated on the front page of the data sheet. The cascading sequence of this th order bandpass filter is shown in block diagram form, Figure a. the filter is geometrically centered around the side B of the LTC connected in Mode. This dictates a clock-to-center frequency ratio of : or :. The side A of the IC operates in Mode b to provide the lower center frequency of. and still share the same clock with the rest of the filter. With this approach the bandpass filter can SIDE A SIDE B SIDE C MODE b MODE MODE f O =. Q =. SIDE A SIDE B SIDE C MODE b MODE MODE f O =. Q =. f O2 = Q2 =. f O2 =. Q2 =. f O =. Q =. f O = Q =. V OT Fa Figure a. Cascading Sequence of the Bandpass Filter Shown on the Front Page, with (f CLK /f O ) = : or : V OT Fb Figure b. Cascading Sequence of the Same Filter for Speed Optimization, and with (f CLK /f O ) = 2.: operate with center frequencies up to 2kHz. The speed of the filter could be further improved by using Mode to lock the higher resonant frequency of. and higher Q or. to the clock, Figure b, thus changing the clock to center frequency ratio to 2.:. Mode a This is an extension of Mode where the highpass and lowpass outputs are summed through two external resistors R h and R l to create a notch, Figure. Mode a is very versatile because the notch frequency can be higher or lower than the center frequency of the 2nd order section. The external op amp of Figure is not always required. When cascading the sections of the LTC, the highpass and lowpass outputs can be summed directly into the inverting input of the next section. Figure shows an LTC providing a th order elliptic bandpass or notch response. Sides C and B are connected in Mode a while side A is connected in Mode and uses only two resistors. The resulting filter response is then geometrically symmetrical around either the center frequency of side A (for bandpass responses) or the notch frequency of side A (for notch responses). C C R HP S BP LP R Σ R l R g AGND R h NOTCH f R f O = CLK ; f n = ; H OHP = ; H OBP = ; H OLP = () f R () CLK R h R l R R R R g R f H ON (f ) = ; H CLK R R ON2 ( f = ; H ON (f = f R O ) = Q H OLP H 2 ) g R g R g R OHP l R l R h Q = R R h ( ) NOTE: FOR Q > AND f CLK > MHz, ADD C C SCH AS C C. R.2MHz EXTERNAL OP AMP OR INPT OP AMP OF THE LTC, SIDES A, B, C F Figure. Mode a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass, Notch fe

10 LTC W ODES OF OPERATIO T 2 L, CMOS CLOCK INPT V LTC R h V NOTES: FOR NOTCH RESPONSES, PIN 7 SHOLD BE PREFERABLY CONNECTED TO GROND AND THE FILTER OTPT IS PIN. FOR BANDPASS OR LOWPASS RESPONSES, PIN 7 CAN BE EITHER AT GROND OR POSITIVE SPPLY, AND THE FILTER OTPT IS PIN 2 OR PIN. R Figure. th Order Elliptic Bandpass, Lowpass or Notch Topology F Figure shows the measured frequency response of the circuit Figure configured to provide a notch function. The filter output is taken out of pin. The resistor values are standard %. The ratio of the db width, BW, to the notch width BW2, is : and matches the theoretical design value. The measured notch depth was db versus db theoretical and the clock-to-center notch frequency ratio is :. Figure shows the measured frequency response of the circuit topology, Figure, but with pole/zero locations configured to provide a high Q, th order elliptic bandpass filter operating with a clock-to-center frequency ratio of : or :. The theoretical passband ripple, stopband attenuation and stopband to ripple bandwidth ratio are.db, db, : respectively. The obtained results with % standard resistor values closely match the theoretical frequency response. For this application, the normalized R l 2 R l R h R center frequencies, Qs, and notch frequencies are (f O =., Q =., f n =.8, f O2 =., Q2 =., f n2 =.87, f O =, Q = 2.2). The output of the filter is the BP output of Side A, Pin 2. Lowpass filters with stopband notches can also be realized by using Figure provided that th order lowpass filter approximations with 2 stopband notches can be synthesized. Literature describing elliptic double terminated (RLC) V OT / (db) V OT / (db) BW. V S = ±V f CLK = 2kHz f IN (khz) V S = ±V f CLK = khz BW f IN (khz) 2.kHz STANDARD % RESISTOR VALES R = k = k R h = k 2 = 2k =.k R l 2 = k = k STANDARD % RESISTOR VALES R = 7k = 2k R h = 28.7k 2 =.7k = k R l 2 = k = 7k = k R = k R l =.k 2 = 22k R h 2 =.k = 8.k NOTES: SE A pf CAPACITOR BETWEEN PINS 7 AND 8. PIN 7 IS GRONDED. Figure. Resistor Values and Amplitude Response of Figure Topology. The Notch is Centered at 2Hz. F = k R =.7k R l =.2k 2 = 2k R h 2 = k = 2.k NOTE: FOR CLOCK FREQENCIES ABOVE khz, CONNECT A pf IN PARALLEL WITH R AND. F Figure. Resistor Values and Amplitude Response of Figure Topology. The Bandpass Filter is Centered Around 2Hz when Operating with a khz Clock. fe

11 LTC W ODES OF OPERATIO V OT /VIN (db) f IN (khz) R =.2k =.7k R h = 2.k 2 = k = k R l 2 =.8k = k STANDARD % RESISTOR VALES = k R =.2k R l =.k 2 = 2.7k R h 2 = 2.k = k NOTES: SE A pf ACROSS FOR f CLK > MHz. THE ELLIPTIC LOWPASS FILTER HAS ONLY TWO NOTCHES IN THE STOPBAND, AND IT OPERATES WITH A CLOCK TO CTOFF FREQENCY RATIO OF :. F R h R R l 2 R g LT V OT R l R h 2 Figure. Resistor Values and Amplitude Response of the Topology of Figure passive ladder filters provide enough data to synthesize the above filters. The measured amplitude response of such a lowpass is shown in Figure where the filter output is taken out of side A s Pin, Figure. The clockto-center frequency ratio can be either : or : because the last stage of the LTC operates in Mode with a center frequency very close to the overall cutoff frequency of the lowpass filter. In Figure, all three sides of the LTC are connected in Mode a. This topology is useful for elliptic highpass and notch filters with clock-to-cutoff (or notch) frequency ratio higher than :. This is often required to extend the allowed input signal frequency range and to avoid premature aliasing. Figure is also a versatile, general purpose architecture providing notches and pole pairs, and there is no restriction on the location of the poles with respect to the notch frequencies. The drawbacks, when compared to Figure, are the use of an external op amp and the increased number of the required external resistors. Figure 7 shows the measured frequency of a th order highpass elliptic filter operating with 2: clock-to-cutoff frequency ratio. With a MHz clock, for instance, the filter yields a khz cutoff frequency, thus allowing an input frequency range beyond khz. Band limiting can be easily added by placing a capacitor across the feedback resistor of the external op amp of Figure. V OT / (db) T 2 L l, CMOS CLOCK INPT V f CLK = 2kHz f IN (khz) LTC V R l R = k = 7.k R h = k 2 = 2.k = 2.k R l 2 = 7k = 2k R h = k R g = k R R h R Figure. sing an External Op Amp to Connect all Sides of the LTC in Mode a F STANDARD % RESISTOR VALES = k R =.k R l =.7M 2 = 28.7k R h 2 = 2.2k = k R =.k R l = k NOTE: FOR CLOCK FREQENCIES BELOW khz, SE A CAPACI- TOR IN PARALLEL WITH SCH AS (/2πC) f CLK /. F7 Figure 7. Measured Amplitude Response of the Topology of Figure, Configured to Provide a th Order Elliptic Highpass Filter Operating with a Clock-to-Cutoff Frequency Ratio of 2: fe

12 LTC W ODES OF OPERATIO Figure 8 shows the plotted amplitude responses of a th order notch filter operating again with a clock-to-center notch frequency ratio of 2:. The theoretical notch depth is 7dB and when the notch is centered at khz its width is Hz. Two small, noncritical capacitors were used across the and 2 resistors of Figure, to bandlimit the first two highpass outputs such that the practical notch depth will approach the theoretical value. With these two fixed capacitors, the notch frequency can be swept within a : range. When the circuit of Figure is used to realize lowpass elliptic filters, a capacitor across R g raises the order of the filter and at the same time eliminates any small clock feedthrough. This is shown in Figure where the amplitude response of the filter is plotted for different cutoff frequencies. When the clock frequency equals or exceeds MHz, the stopband notches lose their depth due to the finite bandwidth of the internal op amps and to the small crosstalk between the different sides of the LTC. The lowpass filter, however, does not lose its passband accuracy and it maintains nearly all of its attenuation slope. The theoretical performance of the 7th order lowpass filter of Figure is.2db passband ripple,.: stopband-tocutoff frequency ratio, and 7dB stopband attenuation. Without any tuning, the obtained results closely approximate the textbook response. VOT/VIN (db) f CLK 2kHz f CLK khz f CLK MHz f IN (khz) R =.k =.2k R h =.k 2 =.k = k R l 2 =.8k = 28.7k R h =.k R g = 28k NOTE: ADD A CAPACITOR C ACROSS R g TO CREATE A 7TH ORDER LOWPASS SCH AS (/2πR g C) = (CTOFF FREQENCY).8 STANDARD % RESISTOR VALES = k R = 2.7k R l =.k 2 = k R h 2 = 2.k = k R =.7k R l = k F Figure. Frequency Responses of a 7th Order Lowpass Elliptic Filter Realized with Figure Topology Mode 2 This is a combination of Mode and Mode, Figure 2. With Mode 2, the clock-to-center frequency ratio, f CLK /f O, is always less than : or :. When compared to Mode and for applications requiring 2nd order section with f CLK /f O slightly less than or :, Mode 2 provides less sensitivity to resistor tolerances. As in Mode, Mode 2 has a notch output which directly depends on the clock frequency and therefore the notch frequency is always less than the center frequency, f O, of the 2nd order section. V OT / (db) 2 7 f CLK = 2kHz f IN (khz) R = 8.k =.k R h = 8.7k 2 = k = 7.k R l 2 =.k = k R h =.2k R g = 2k STANDARD % RESISTOR VALES =.2k R =.k R l = 287k 2 = 22k R h 2 =.2k = 2k R = 8.k R l =.k NOTE: CONNECT pf AND pf ACROSS AND 2 RESPECTIVELY. F8 R AGND R N S BP LP Σ F2 f f O = CLK ; f n = ; Q = () f CLK R () R H OLP = /R ; H OBP = (/R) R f H ON (f ) = /R ; H CLK ON2 ( f = (/R) 2 ) R Figure 8. th Order Band Reject Filter Operating with a Clockto-Center Notch Frequency Ratio of 2:. The Ratio of db to the db Notch Width is 8:. Figure 2. Mode 2: 2nd Order Filter Providing Notch, Bandpass, Lowpass fe

13 LTC W ODES OF OPERATIO Figure 2 shows the side A of the LTC connected in Mode 2 while sides B and C are in Mode a. This topology can be used to synthesize elliptic bandpass, highpass and notch filters. The elliptic highpass of Figure 7 is synthesized again, Figure 22, but the clock is now locked onto the V OT / (db) T 2 L, CMOS CLOCK INPT V R LTC R h 2 R l f IN (khz) V 2 2 R l R R h R STANDARD % RESISTOR VALES R =.k =.8k R h = 28.7k 2 = 8.k = k R l 2 =.2k = 7k V OT F2 Figure 2. LTC with Side A is Connected in Mode 2 While Side B, C are in Mode a. Topology is seful for Elliptic Highpass, Notch and Bandpass Filters. = 2.k R = k R l = 28k 2 = 8.2k R h 2 =.2k = k R = k NOTE: FOR CLOCK FREQEN- CIES ABOVE khz, ADD A CAPACITOR C ACROSS AND 2 SCH AS (/2πC) = f CLK F22 Figure 22. th Order Elliptic Highpass Filter Operating with a Clock-to-Cutoff Frequency Ratio of 7: and sing the Topology of Figure 2 higher frequency notch provided by the side A of the LTC. As shown in Figure 22, the highpass corner frequency is.khz and the higher notch frequency is khz while the filter operates with a khz clock. The center frequencies, Qs, and notches of Figure 22, when normalized to the highpass cutoff frequency, are (f O =.7, Q = 2.2, f n =.22, f O2 =., Q2 =.7, f n2 =., f O =.87, f n =.7, Q = ). When compared with the topology of Figure, this approach uses lower and more restricted clock frequencies. The obtained notch in Mode 2 is shallower although the topology is more efficient. Output Noise The wideband RMS noise of the LTC outputs is nearly independent from the clock frequency. The LTC noise when operating with ±2.V supply is lower, as Table indicates. The noise at the bandpass and lowpass outputs increases rough as the Q. Also the noise increases when the clock-to-center frequency ratio is altered with external resistors to exceed the internally set : or : ratios. nder this condition, the noise increases square root-wise. Output Offsets The equivalent input offsets of the LTC are shown in Figure 2. The DC offset at the filter bandpass output is always equal to V OS. The DC offsets at the remaining two outputs (Notch and LP) depend on the mode of operation and external resistor ratios. Table illustrates this. It is important to know the value of the DC output offsets, especially when the filter handles input signals with large dynamic range. As a rule of thumb, the output DC offsets increase when:. The Qs decrease 2. The ratio (f CLK /f O ) increases beyond :. This is done by decreasing either the (/R) or the R/(R R) resistor ratios. fe

14 LTC W ODES OF OPERATIO Table. Wideband RMS Noise NOTCH/HP BP LP V S (±V) f CLK/ f O (µv RMS ) (µv RMS ) (µv RMS ) CONDITIONS. : 7 Mode, R = =. : 8 Q = 2. : 2. :. : 8 Mode, Q =. : R = for BP Out 2. : R = for LP Out 2. : 7. : Mode, R = = = R. : Q = 2. : 2 2. :. : Mode, = R, Q =. : 7 8 = R for BP Out 2. : 88 R = R for LP and HP Out 2. : (,7) V OS (,8) Σ V OS2 2 (,) (,2) V OS F2 Figure 2. Equivalent Input Offsets of / LTC Filter Building Block Table V OSN V OSBP V OSLP MODE PIN (8) PIN 2 () PIN (2) V OS [(/Q) H OLP ] V OS /Q V OS V OSN V OS2 b V OS [(/Q) /R] V OS /Q V OS ~(V OSN V OS2 )( R/R) 2 [V OS ( /R / /R) V OS (/)] V OS V OSN V OS2 [R/( R)] V OS2 [/( R)] V OS2 V OS V OS ( R/R R/ R/) V OS2 (R/) V OS (R/) fe

15 LTC PACKAGE DESCRIPTIO J Package 2-Lead CERDIP (Narrow. Inch, Hermetic) (Reference LTC DWG # -8-) CORNER LEADS OPTION ( PLCS). (2.2) MAX (..) FLL LEAD OPTION. BSC (7.2 BSC).2. (.8.) HALF LEAD OPTION.22. ( ).2 (.) RAD TYP (.7) MIN.2 (.8) MAX.. (.8.2).8.8 (.2.7) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS. (.7) MIN.. (..)..2 (..). (2.) BSC J2 8 OBSOLETE PACKAGE N Package 2-Lead PDIP (Narrow. Inch) (Reference LTC DWG # -8-) 2.* (2.2) MAX ±.* (.77 ±.8) ( ).. (.7.8).. (..).8. (.2.8).2 (.8) MIN (.7) (.8) ( 8.2.8) MIN MIN NOTE: INCHES. DIMENSIONS ARE MILLIMETERS *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED. INCH (.2mm). (2.) BSC.8 ±. (.7 ±.7) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.. (.) TYP N2 fe

16 LTC PACKAGE DESCRIPTIO SW Package 2-Lead Plastic Small Outline (Wide. Inch) (Reference LTC DWG # -8-2). ±. TYP N. BSC. ±. 2.. (.8.) NOTE MIN.2 ±. N NOTE.. (.7.) 2 N/2 N/2 RECOMMENDED SOLDER PAD LAYOT. (.7) RAD MIN.2.2 (7. 7.) NOTE..2 (.2.77) 8 TYP.. ( ) (..)... (.22.) NOTE (.27) BSC.. (..27).. (..82) NOTE: TYP INCHES. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE. PIN IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANFACTRING OPTIONS. THE PART MAY BE SPPLIED WITH OR WITHOT ANY OF THE OPTIONS. THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED." (.mm).. (..) S2 (WIDE) 2 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC8 Quad, niversal, Filter Building Block 2:, :, :, 2: F C :F CLK Ratios Available LTC2 Quad, niversal, Filter Building Block Continuous Time, Active RC, F C < khz LTC2-2 Quad, niversal, Filter Building Block Continuous Time, Active RC, F C < khz Linear Technology Corporation McCarthy Blvd., Milpitas, CA -77 (8) 2- FAX: (8) -7 fe LT/LT REV E PRINTED IN SA LINEAR TECHNOLOGY CORPORATION