dvanced Process Technoogy Dynamic dv/dt Rating 75 C Operating Temperature Fast Switching PChanne Fuy vaanche Rated Description Fifth Generation HEXFETs from Internationa Rectifier utiize advanced processing techniques to achieve extremey ow onresistance per siicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are we known for, provides the designer with an extremey efficient and reiabe device for use in a wide variety of appications. G PD 9482C IRF9530N HEXFET Power MOSFET D S V DSS = 0V R DS(on) = 0.20Ω I D = 4 The TO220 package is universay preferred for a commerciaindustria appications at power dissipation eves to approximatey 50 watts. The ow therma TO220B resistance and ow package cost of the TO220 contribute to its wide acceptance throughout the industry. bsoute Maximum Ratings Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, @ V 4 I D @ T C = 0 C Continuous Drain Current, @ V I DM Pused Drain Current 56 P D @T C = 25 C Power Dissipation 79 W Linear Derating Factor 0.53 W/ C GatetoSource Votage ± 20 V E S Singe Puse vaanche Energy 250 mj I R vaanche Current 8.4 E R Repetitive vaanche Energy 7.9 mj dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns T J Operating Junction and 55 to 75 T STG Storage Temperature Range C Sodering Temperature, for seconds 300 (.6mm from case ) Mounting torque, 632 or M3 screw bf in (.N m) Therma Resistance Parameter Typ. Max. Units R θjc JunctiontoCase.9 R θcs CasetoSink, Fat, Greased Surface 0.50 C/W R θj Junctiontombient 62 5/3/98
Eectrica Characteristics @ T J = 25 C (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Votage 0 V = 0V, I D = 250µ V (BR)DSS/ T J Breakdown Votage Temp. Coefficient 0. V/ C Reference to 25 C, I D = m R DS(on) Static DraintoSource OnResistance 0.20 Ω = V, I D = 8.4 (th) Gate Threshod Votage 2.0 4.0 V V DS =, I D = 250µ g fs Forward Transconductance 3.2 S V DS = 50V, I D = 8.4 I DSS DraintoSource Leakage Current 25 V µ DS = 0V, = 0V 250 V DS = 80V, = 0V, T J = 50 C I GSS GatetoSource Forward Leakage 0 = 20V n GatetoSource Reverse Leakage 0 = 20V Q g Tota Gate Charge 58 I D = 8.4 Q gs GatetoSource Charge 8.3 nc V DS = 80V Q gd GatetoDrain ("Mier") Charge 32 = V, See Fig. 6 and 3 t d(on) TurnOn Deay Time 5 V DD = 50V t r Rise Time 58 I D = 8.4 ns t d(off) TurnOff Deay Time 45 R G = 9.Ω t f Fa Time 46 R D = 6.2Ω, See Fig. Between ead, L D Interna Drain Inductance 4.5 6mm (0.25in.) nh G from package L S Interna Source Inductance 7.5 and center of die contact C iss Input Capacitance 760 = 0V C oss Output Capacitance 260 pf V DS = 25V C rss Reverse Transfer Capacitance 70 ƒ =.0MHz, See Fig. 5 D S SourceDrain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbo 4 (Body Diode) showing the I SM Pused Source Current integra reverse G 56 (Body Diode) pn junction diode. S V SD Diode Forward Votage.6 V T J = 25 C, I S = 8.4, = 0V t rr Reverse Recovery Time 30 90 ns T J = 25 C, I F = 8.4 Q rr Reverse RecoveryCharge 650 970 nc di/dt = 0/µs t on Forward TurnOn Time Intrinsic turnon time is negigibe (turnon is dominated by L S L D ) Notes: Repetitive rating; puse width imited by max. junction temperature. ( See fig. ) Starting T J = 25 C, L = 7.0mH R G = 25Ω, I S = 8.4. (See Figure 2) ƒ I SD 8.4, di/dt 490/µs, V DD V (BR)DSS, T J 75 C Puse width 300µs; duty cyce 2%.
I D, DraintoSource Current () 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V I D, DraintoSource Current () 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WIDTH T c = 25 C 0. 0. 0 V DS, DraintoSource Votage (V) 20µs PULSE W IDTH 0. T C = 75 C 0. 0 V DS, DraintoSource Votage (V) Fig. Typica Output Characteristics Fig 2. Typica Output Characteristics 0 2.5 I D = 4 I D, DraintoSource Current () T = 25 C J V DS = 50V 20µs PULSE WIDTH 0. 4 5 6 7 8 9 V, GatetoSource Votage (V) GS T J = 75 C R DS(on), DraintoSource On Resistance (Normaized) 2.0.5.0 0.5 = V 0.0 60 40 20 0 20 40 60 80 0 20 40 60 80 T J, Junction Temperature ( C) Fig 3. Typica Transfer Characteristics Fig 4. Normaized OnResistance Vs. Temperature
C, Capacitance (pf) 2000 600 200 800 400 = 0V, f = MHz C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C iss C oss C rss 0 0 V DS, DraintoSource Votage (V), GatetoSource Votage (V) 20 5 5 I = D 8.4 V DS =80V V DS =50V V DS =20V FOR TEST CIRCUIT SEE FIGURE 3 0 0 20 30 40 50 60 Q G, Tota Gate Charge (nc) Fig 5. Typica Capacitance Vs. DraintoSource Votage Fig 6. Typica Gate Charge Vs. GatetoSource Votage I SD, Reverse Drain Current () 0 T J = 50 C T J = 25 C 0. = 0V 0.4 0.6 0.8.0.2.4.6 V SD, SourcetoDrain Votage (V) I I D, Drain Current () 00 0 OPERTION IN THIS RE LIMITED BY R DS(on) us 0us ms TC = 25 C TJ = 75 C Singe Puse ms 0 00 V DS, DraintoSource Votage (V) Fig 7. Typica SourceDrain Diode Forward Votage Fig 8. Maximum Safe Operating rea
I D, Drain Current () 4 2 8 6 4 R G V DS V Puse Width µs Duty Factor 0. % R D D.U.T. Fig a. Switching Time Test Circuit V DD 2 0 25 50 75 0 25 50 75 T, Case Temperature ( C C) t d(on) t r t d(off) t f % Fig 9. Maximum Drain Current Vs. Case Temperature 90% V DS Fig b. Switching Time Waveforms Therma Response (Z thjc ) 0. D = 0.50 0.20 0. 0.05 0.02 0.0 SINGLE PULSE (THERML RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J = P DM x Z thjc TC 0.0 0.0000 0.000 0.00 0.0 0. t, Rectanguar Puse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Therma Impedance, JunctiontoCase
Fig 2a. Uncamped Inductive Test Circuit I S V DS L R G D.U.T V DD IS 20V DRIVER tp 0.0Ω 5V E S, Singe Puse vaanche Energy (mj) 700 600 500 400 300 200 0 I D TOP 3.4 5.9 BOTTOM 8.4 0 25 50 75 0 25 50 75 Starting T, Junction Temperature ( J C) Fig 2c. Maximum vaanche Energy Vs. Drain Current tp V (BR)DSS Fig 2b. Uncamped Inductive Waveforms Current Reguator Same Type as D.U.T. V Q G 2V.2µF 50KΩ.3µF Q GS Q GD D.U.T. V DS V G 3m Charge I G I D Current Samping Resistors Fig 3a. Basic Gate Charge Waveform Fig 3b. Gate Charge Test Circuit
Peak Diode Recovery dv/dt Test Circuit IRF9530N D.U.T* ƒ Circuit Layout Considerations Low Stray Inductance Ground Pane Low Leakage Inductance Current Transformer R G dv/dt controed by R G I SD controed by Duty Factor "D" D.U.T. Device Under Test V DD * Reverse Poarity of D.U.T for PChanne Driver Gate Drive Period P.W. D = P.W. Period [ =V ] *** D.U.T. I SD Waveform Reverse Recovery Current Reppied Votage Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Rippe 5% Forward Drop [ V DD ] [ ] I SD *** = 5.0V for Logic Leve and 3V Drive Devices Fig 4. For PChanne HEXFETS
Package Outine TO220B Outine Dimensions are shown in miimeters (inches) 2.87 (.3) 2.62 (.3).54 (.45).29 (.405) 3.78 (.49) 3.54 (.39) 4.69 (.85) 4.20 (.65) B.32 (.052).22 (.048) 5.24 (.600) 4.84 (.584) 4 6.47 (.255) 6. (.240) 2 3.5 (.045) M IN LED SSIGNMENTS GTE 2 DRIN 3 SOU RC E 4 DRIN 4.09 (.555) 3.47 (.530) 4.06 (.60) 3.55 (.40) 3X.40 (.055).5 (.045) 2.54 (.0) 2X NOTES: 3X 0.93 (.037) 0.69 (.027) 0.36 (.04) M B M 0.55 (.022) 3X 0.46 (.08) 2.92 (.5) 2.64 (.4) D IM E N S IO N IN G & TO L E R N C ING P E R N S I Y 4.5M, 9 82. 3 O U T LIN E C O N F O R M S TO JE D E C O U T LIN E TO 2 20 B. 2 CONTROLLING DIMENSION : INCH 4 HETSINK & LED MESUREMENTS DO NOT INCLUDE BURRS. Part Marking Information TO220B EXMPLE EXMPLE : THIS : THIS N IS N IRF IRF W ITH W ITH SSEMBLY LOT LOT CODE CODE 9BM 9BM INTERNTIONL RECTIFIER RECTIFIER IRF IRF LOGO LOGO 9246 9246 9B 9B M M SSEMBLY SSEMBLY LOT LOT CO DE CO DE PRT PRT NUMBER NUMBER DTE DTE CODE CODE (YYWW) (YYWW) YY YY = YER = YER WW WW = WEEK = WEEK WORLD HEDQURTERS: 233 Kansas St., E Segundo, Caifornia 90245, Te: (3) 322 333 EUROPEN HEDQURTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Te: 44 883 732020 IR CND: 732 Victoria Park ve., Suite 20, Markham, Ontario L3R 2Z8, Te: (905) 475 897 IR GERMNY: Saaburgstrasse 57, 6350 Bad Homburg Te: 49 672 96590 IR ITLY: Via Liguria 49, 07 Borgaro, Torino Te: 39 45 0 IR FR EST: K&H Bdg., 2F, 304 NishiIkebukuro 3Chome, Toshimaku, Tokyo Japan 7 Te: 8 3 3983 0086 IR SOUTHEST SI: 35 Outram Road, #02 Tan Boon Liat Buiding, Singapore 036 Te: 65 22 837 http://www.irf.com/ Data and specifications subject to change without notice. 5/98
Note: For the most current drawings pease refer to the IR website at: http://www.irf.com/package/