2N3055AG (NPN), MJ15015G (NPN), MJ15016G (PNP) Complementary Silicon High-Power Transistors

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(NPN), MJG (NPN), MJ6G (PNP) Complementary Silicon High-Power Transistors These PowerBase complementary transistors are designed for high power audio, stepping motor and other linear applications. These devices can also be used in power switching circuits such as relay or solenoid drivers, dctodc converters, inverters, or for inductive loads requiring higher safe operating area than the N. Features High CurrentGain Bandwidth Safe Operating Area These Devices are PbFree and are RoHS Compliant* MAXIMUM RATINGS (Note ) Rating Symbol Value Unit CollectorEmitter Voltage MJG, MJ6G CollectorBase Voltage MJG, MJ6G CollectorEmitter Voltage Base Reversed Biased MJG, MJ6G V CEO 6 V CBO V CEV EmitterBase Voltage V EBO 7. Collector Current Continuous I C Adc Base Current I B 7. Adc Total Device Dissipation @ T C = C MJG, MJ6G Derate above C MJG, MJ6G Operating and Storage Junction Temperature Range P D 8.6. W W W/ C W/ C T J, T stg 6 to + C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Indicates JEDEC Registered Data. (NA) THERMAL CHARACTERISTICS Characteristics Symbol Max Max Unit Thermal Resistance, JunctiontoCase R JC..98 C/W *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. AMPERE COMPLEMENTARY SILICON POWER TRANSISTORS 6, VOLTS, 8 WATTS BASE PNP CASE EMITTER MARKING DIAGRAMS AYWW MEX BASE TO4 (TO) CASE 7 STYLE NPN EMITTER MJxG AYWW MEX NA = Device Code MJx = Device Code x = or 6 G = PbFree Package A = Assembly Location Y = Year WW = Work Week MEX = Country of Origin CASE CASE ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor Components Industries, LLC, September, Rev. 7 Publication Order Number: NA/D

(NPN), MJG (NPN), MJ6G (PNP) ELECTRICAL CHARACTERISTICS (T C = C unless otherwise noted) OFF CHARACTERISTICS (Note ) Characteristic Symbol Min Max Unit CollectorEmitter Sustaining Voltage (Note ) (I C =, I B = ) MJG, MJ6G V CEO(sus) 6 Collector Cutoff Current (V CE =, V BE(off) = ) (V CE = 6, V BE(off) = ) MJG, MJ6G I CEO.7 Collector Cutoff Current (Note ) (V CEV = Rated Value, V BE(off) =. ) MJG, MJ6G I CEV. Collector Cutoff Current (V CEV = Rated Value, V BE(off) =., T C = C) MJG, MJ6G I CEV 6. Emitter Cutoff Current (V EB = 7., I C = ) MJG, MJ6G I EBO. SECOND BREAKDOWN (Note ) Second Breakdown Collector Current with Base Forward Biased (t =. s nonrepetitive) (V CE = 6 ) MJG, MJ6G I S/b.9. Adc ON CHARACTERISTICS (Note and ) DC Current Gain (I C = 4. Adc, V CE =. ) (I C = 4. Adc, V CE = 4. ) (I C = Adc, V CE = 4. ) h FE 7 7 CollectorEmitter Saturation Voltage (I C = 4. Adc, I B = 4 ) (I C = Adc, I B =. Adc) (I C = Adc, I B = 7. Adc) V CE(sat).. BaseEmitter On Voltage (I C = 4. Adc, V CE = 4. ) DYNAMIC CHARACTERISTICS (Note ) V BE(on).7.8 CurrentGain Bandwidth Product, MJG (I C =. Adc, V CE = 4., f =. MHz) MJ6G f T.8. 6. 8 MHz Output Capacitance (V CB =, I E =, f =. MHz) SWITCHING CHARACTERISTICS ( only) (Note ) RESISTIVE LOAD C ob 6 6 pf Delay Time t d. s Rise Time (V CC =, I C = 4. Adc, t r 4. s I B = I B =.4 Adc, Storage Time t p = s Duty Cycle % t s. s Fall Time t f 6. s. Pulse Test: Pulse Width = s, Duty Cycle %.. Indicates JEDEC Registered Data. (NA)

(NPN), MJG (NPN), MJ6G (PNP) P D(AV), AVERAGE POWER DISSIPATION (W) NA MJ MJ6 7 7 T C, CASE TEMPERATURE ( C) Figure. Power Derating hfe, DC CURRENT GAIN 7 7. T J = C - C V CE = 4. V C...7 7 I C, COLLECTOR CURRENT (AMP) VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS).8.4.6..8.4. T J = C I C = A 4 A 8 A..... I B, BASE CURRENT (AMP) Figure. DC Current Gain Figure. Collector Saturation Region V, VOLTAGE (VOLTS)..... T C = C V BE(sat) @ I C /I B = V BE(on) @ V CE = 4 V V CE(sat) @ I C /I B =...7 7 f, T CURRENT-GAIN BANDWIDTH PRODUCT (MHz).. MJ6 NA MJ..... I C, COLLECTOR CURRENT (AMP) I C, COLLECTOR CURRENT (AMPS) Figure 4. On Voltages Figure. CurrentGain Bandwidth Product

(NPN), MJG (NPN), MJ6G (PNP) + V s V CC + V 7. SCOPE t, TIME ( s) μ 7.7. V CC = V I C /I B = T J = C t r - V t r, t f ns DUTY CYCLE =.% - V N67... t d...7 7 I C, COLLECTOR CURRENT (AMP) Figure 6. Switching Times Test Circuit (Circuit shown is for NPN) Figure 7. TurnOn Time t, TIME ( s) μ 7.7.... t f V CC = I C /I B = I B = I B T J = C t s...7 7 I C, COLLECTOR CURRENT (AMPS) C, CAPACITANCE (pf) 4. C ib. C ob V R, REVERSE VOLTAGE (VOLTS) T J = C NA MJ MJ6 Figure 8. TurnOff Times Figure 9. Capacitances 4

, COLLECTOR CURRENT ( A) μ I C IC, COLLECTOR CURRENT (AMPS),.. +. NPN V CE = V T J = C C REVERSE C (NPN), MJG (NPN), MJ6G (PNP) I C = I CES FORWARD + - -. -. -.4 -. V BE, BASE-EMITTER VOLTAGE (VOLTS) Figure. NA, MJ BONDING WIRE LIMIT THERMAL LIMIT @ T C = C (SINGLE PULSE) SECOND BREAKDOWN LIMIT COLLECTOR CUTOFF REGION s s ms ms 6 V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure. Forward Bias Safe Operating Area NA dc, COLLECTOR CURRENT ( A) μ IC IC, COLLECTOR CURRENT (AMP)... -.. PNP V CE = V T J = C C REVERSE C I C = I CES FORWARD - + +. +. V BE, BASE-EMITTER VOLTAGE (VOLTS) Figure. MJ6 +.4 ms. ms Figure. Forward Bias Safe Operating Area MJ, MJ6 +.. ms BONDING WIRE LIMIT. THERMAL LIMIT @ T C = C (SINGLE PULSE) SECOND BREAKDOWN LIMIT dc. 6 V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe Operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figures and is based on T C = C; T J(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to % but must be derated for temperature according to Figure. ORDERING INFORMATION MJG MJ6G Device Package Shipping TO4 (PbFree) TO4 (PbFree) TO4 (PbFree) Units / Tray Units / Tray Units / Tray

(NPN), MJG (NPN), MJ6G (PNP) PACKAGE DIMENSIONS TO4 (TO) CASE 7 ISSUE Z V H E A N U C T SEATING PLANE D PL K (.) M T Q M Y M L G Y Q (.) M T B Y M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.M, 98.. CONTROLLING DIMENSION: INCH.. ALL RULES AND NOTES ASSOCIATED WITH REFERENCED TO-4AA OUTLINE SHALL APPLY. INCHES MILLIMETERS DIM MIN MAX MIN MAX A. REF 9.7 REF B ---. --- 6.67 C.. 6. 8. D.8.4.97.9 E..7.4.77 G.4 BSC.9 BSC H BSC.46 BSC K.44.48.8.9 L.66 BSC 6.89 BSC N ---.8 ---.8 Q 6.84 4.9 U.87 BSC BSC V 88. 4.77 STYLE : PIN. BASE. EMITTER CASE: COLLECTOR ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patentmarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Denver, Colorado 87 USA Phone: 677 or 84486 Toll Free USA/Canada Fax: 6776 or 844867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8898 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 4 79 9 Japan Customer Focus Center Phone: 887 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NA/D