Webinar ECT Best Practice: How to handle a PCB project with embedded components?
ECT Best Practice How to handle a PCB project with embedded components? Basic Motivation Brief overview of technologies to embed discrete components Possible components Conceptual phase and layer constructions Design & layout Summary Jürgen Wolf Würth Elektronik GmbH & Co. KG Product Manager Embedded Component Technology Page 2
ECT Best Practice How to handle a PCB project with embedded components? Basic Motivation Brief overview of technologies to embed discrete components Possible components Conceptual phase and layer constructions Design & layout Summary Page 3
Advantages of buried components? Miniaturization Performance/ Function Reliability Package replacement Space savings of assembly area on the outer layers Integrated shielding Short signal paths Protection against plagiarism Protected against influences Secure fixing Thermal management Page 4
ECT Best Practice How to handle a PCB project with embedded components? Basic Motivation Brief overview of technologies to embed discrete components Possible components Conceptual phase and layer constructions Design & layout Summary Page 5
ECT µvia: Embedded active and passive devices ECT µvia Manufacturing Assembly (Gluing/Sintering/ Soldering) Multilayer pressing Drilling of vias and microvias Page 6
ECT µvia: Embedded active and passive devices Non-plated microvia on embedded capacitor with Cu termination length: 58,97 µm length: 21,96 µm Page 7
ECT µvia: Embedded active and passive devices ECT µvia Manufacturing Assembly (Gluing/Sintering/ Soldering) Multilayer pressing Drilling of vias and microvias Plating and structuring Page 8
ECT µvia: Embedded active and passive devices Plated Microvia on embedded capacitor with Cu termination Page 9
ECT Flip Chip: Embedded active devices ECT-Flip Chip Production Core with footprint for Flip Chip Assembly (Flip Chip ACA) Multilayer pressing Remaining PCB processes Page 10
ECT Best Practice How to handle a PCB project with embedded components? Basic Motivation Brief overview of technologies to embed discrete components Possible components Conceptual phase and layer constructions Design & layout Summary Page 11
Availability of components Passive Components with Cu-Termination Resistors mounting form 0402 Capacitors 150 µm Thicknesses from 150 µm to 300 µm 150 µm Bare Die Silicon ICs with process compatible pads ECT µvia Pads Cu NiPd Generally a customer provision ECT Flip Chip Pads Wirebond Au Stud-Bumps Wafer-level Au-Bumps Page 12
ECT Best Practice How to handle a PCB project with embedded components? Basic Motivation Brief overview of technologies to embed discrete components Possible components Conceptual phase and layer constructions Design & layout Summary Page 13
Collaboration in the development Very close collaboration is needed at a very early stage in the concept and design phase to be successful Products using ECT product idea design concept development draft optimisation prototypes Serial production Page 14
Analysis of existing boards with regard to usability of embedded components BOM Analysis of an existing predecessor-layout (if available) Designator nhib, RST ANT PROG R1, R2, R3, R4, R6, R8, R9, R10, R11, R13, R14 R12, R15, R16, R18, R19 R17, R20 R5, R7 T1, T2 U2 L1, L3 L2 AUX J1, J2, J3 FL1 U1 C1, C6, C7, C9, C10, C15, C16, C21, C22, C23, C27 C12 C13, C14 C18, C19, C20 C2, C3 C24, C25 C4, C5, C26 C8, C11, C17 XT2 XT1 Value Quantity Manufacturer 100k N.C. 100 10k N.C. 2.2uH 1uH N.C. 100nF 1uF 22uF 4.7uF 6.2pF 100uF 10pF 10uF 2 C&K Components 1 Cinch Connectivity Solutions Johnson 1 SAMTEC 11 Yageo 5 2 Panasonic Electronic Components 2 Yageo 2 1 Micron Technology Inc 2 Murata Electronics North America 1 Murata Electronics North America 1 3 Hirose Electric Co Ltd 1 TDK Corporation 1 TEXAS INSTRUMENTS 11 Taiyo Yuden 1 Murata Electronics North America 2 Taiyo Yuden 3 Samsung Electro-Mechanics America, Inc 2 Murata Electronics North America 2 TDK Corporation 3 AVX Corporation 3 Murata Electronics North America 1 Abracon Corporation 1 AVX Corp/Kyocera Corp Manufacturer Part Number Supplier 1 Supplier Device Package Supplier Part Number 1 Supplier Unit Price 1 Comment Footprint KMR231G ULC LFS 128-0711-201 FTS-104-03-F-DV-TR RCJR-07100KL Farnell 0.71 0.99 311-100KJRCT-ND 0.10 ERJ-2GEJ101X RCJR-0710KL P100JCT-ND 311-10KJRCT-ND 0.10 0.10 M25PX80-VMN6TP LQM2HPN2R2MG0L LQM2HPN1R0MJ0L 8-SO 1008 (2520 Metric) 1008 (2520 Metric) M25PX80-VMN6TPCT-ND 0.90 490-5114-1-ND 0.36 490-6699-1-ND 0.42 DF40C-20DP-0.4V(51) DEA202450BT-1294C1-H CC3100R11MRGC LMK105BJ104KV-F GRM155R61A105ME15D AMK107BBJ226MAHT CL05A475MQ5NRNC GRM1555C1H6R2BA01D C3216X5R0J107M160AB 5U100CAT2A GRM188R60J106ME47D ABS07-32.768KHZ-T CX3225GB40000D0HEQCC Farnell Taster_Miniatur U.FL-R-SMT SAMTEC_FTS_104 Testpin_0.8 MICT-MN-8_N 1008_inductor 1008_inductor PIN2 _1.27 DF40C-20DP-0.4V DEA202450BT-1294C1-H PVQFN-64 J1-0603 C1206 J1-0603 ABS07 CMAC-XTAL_2.5x3.2 CKN10245CT-ND J983CT-ND 1928283 H11618CT-ND 445-172335-1-ND 0.83 0.54 2445381 587-1227-1-ND 490-5409-1-ND 587-3262-1-ND 1276-1056-1-ND 490-8224-1-ND 445-6008-1-ND 478-5991-1-ND 490-3896-2-ND 535-9542-1-ND 1253-1222-1-ND 0.034 0.66 0.22 0.10 0.14 0.75 Value U.FL-R-SMT Stecker_8Pin Res3 Res3 Res3 Res3 N.C. M25PX80-VMN6TP LQM2HPN2R2MG0L LQM2HPN1R0MJ0L Header 2 DF40C-20DP-0.4V DEA202450BT-1294C1-H Dez 21 CC3100 Cap Semi Cap Semi Cap Semi Cap Semi Cap Semi Jan 32 Cap Semi Cap Semi Cap Semi Jan 24 ABS07-32.768KHZ-T 40MHz Page 15
Analysis of existing boards with regard to usability of embedded components BOM Analysis of an existing predecessor-layout (if available) Embeddable Components identified in BOM Page 16
Collaboration in the concept phase Embedding of active and passive components: Initial meeting Final implementation Page 17
ECT Best Practice How to handle a PCB project with embedded components? Basic Motivation Brief overview of technologies to embed discrete components Possible components Conceptual phase and layer constructions Design & layout Summary Page 18
Design and layout? EDA-Tools for ECT: The latest versions of these tools: with limitations Allegro PCB Designer Miniaturization Option Further tools possible, but with limitations Page 19
Design and layout? EDA-Tools for ECT: Main differences between these tools ECT capable tools: ECT incapable tools: Central part libraries, footprints may be moved to any Layer of the layout Application specific part library, same layer stack for library and application board with footprint on dedicated layer 3D Design Rule Check Only 2D Design Rule Check, including mechanical checks no Z-axis-check Page 20
Design Rules ECT µvia and ECT Flip Chip pad 175 µm distance pad / pad 75 µm distance next component 300 µm distance chip / sidewall 500 µm end 70 µm dielectric thickness 20 25 µm component height 150 µm (<150 µm upon request) dielectric thickness 50 µm dielectric thickness 50 µm adhesive pad 125 µm pitch 250 µm pad metallization 6 µm Cu or 5 µm Ni + flash Pd pitch 100 µm embedded component 5 mm x 5 mm backside contact (microvia or ICA) available upon request pad distance 50 µm pad / pad 50 µm embedded flip chip 5 mm x 5 mm component height 150 µm adhesive ACA / NCA / ESC (Encapsulated Solder Connection) prepreg core Page 21
ECT Best Practice How to handle a PCB project with embedded components? Basic Motivation Brief overview of technologies to embed discrete components Possible components Conceptual phase and layer constructions Design & layout Summary Page 22
ECT Best Practice How to handle a PCB project with embedded components? Summary Different technologies possible Components must meet certain conditions Würth Elektronik already provides support during conceptual phase for layer constructions, design and layout Jürgen Wolf Würth Elektronik GmbH & Co. KG Product Manager Embedded Component Technology Page 23