Webinar: HDI 2 Perfection in HDI Optimal use of the HDI technology Würth Elektronik Circuit Board Technology

Transcription

1 Webinar: HDI 2 Perfection in HDI Optimal use of the HDI technology Würth Elektronik Circuit Board Technology Seite

2 Agenda Overview Webinar HDI 1 Route out a BGA Costs Roadmap HDI 2.0 Lasercavity Seite

3 Agenda Overview Webinar HDI 1 Route out a BGA Costs Roadmap HDI 2.0 Lasercavity Seite

4 Overview HDI High Density Interconnection Microvia Smallest, laser drilled holes Buried Via Buried drills on the inner layers Pitch Middle of a pad to the middle of a pad Seite

5 Expand Z-axis [µm] Overview - Why Microvia technology? TCT Aspect Ratio AR= h / IPC-2221/2122 Solder process i.d.r -45 / C Copper thickness t t Basic material CTE z h Expand! 0 h Standard-FR4 Z-Achse Cu T [ C] Seite

6 Overview - Technologys Standard Microvia Staggered Microvias Stacked Microvias Microvia on Buried Via Seite

7 Agenda Overview Webinar HDI 1 Route out a BGA Costs Roadmap HDI 2.0 Lasercavity Seite

8 Rout out BGA 0,650 mm Pitch Intel Atom Pitch diagonal Pad 325 µm / Trace 89 µm / Spacing 90 µm Seite

9 Route out BGA 0,500 mm Pitch Seite

10 Route out BGA 0,500 mm Pitch + No Large solderpads - routing on the outer layers No fine line structures on the outer layers Seite

11 Route out BGA 0,500 mm Pitch Seite

12 Route out BGA 0,500 mm Pitch + - Planar surface Small solderpads No routing on the outer layer Seite

13 Route out BGA 0,500 mm Pitch Seite

14 Route out BGA 0,500 mm Pitch + Fine Routing on the outer layers - line structures on the outer layer, small soldermask clearence Normally one µvia layer could be saved High production effort Seite

15 Route out BGA 0,400 mm Pitch BGA Pad: 275 µm µvia Pad inner layer: 300 µm Trace width / spacing Outer layer : 100 µm Inner layer: 100 µm Soldermask clearence: 35 µm NSMD!! - No trace between the pads - Each row in the BGA needs an extra µvia layer. Seite

16 Agenda Overview Webinar HDI 1 Route out a BGA Costs Roadmap HDI 2.0 Lasercavity Seite

17 Costs Pcb dimensions Amount of layers > could be essential if a product is succesful! Seite

18 We will have a Why no plated through hole vias should be used, if a complex HDI stackup is given? Page

19 Costs How many signal layers are needed? PTH Microvia Seite

20 Costs Costs 90 % ML08 ohne µ-vías 1 x pressed 2 x pressed 100 % Microvias 1 to 2 8 to 7 PTH 1 to 8 1 x pressed 1 x electroplated 1 x laserdrilled 1 x mech. drilled % Laser drilling 1 to Microvias 1 to to 3 8 to 6 8 to 7 PTH 1 to 8 2 x pressed 1 x electroplated 1 x laserdrilled 1 x mech. drilled Microvia Filling? % Staggered Microvias Microvias 1 to 2 2 to 3 7 to 6 8 to 7 PTH 1 to 8 2 x pressed 2 x electroplated 2 x laserdrilled 1 x mech. drilled % buried Vias 1 + 6b + 1 Microvias 1 to 2 8 to 7 PTH 1 to 8 Buried Via 2 to 7 2 x pressed 2 x electroplated 1 x laserdrilled 2 x mech. drilled % extra buried Microvias 2 + 4(6b) + 2 Microvias 1 to 2 2 to 3 7 to 6 8 to 7 PTH 1 to 8 Buried Via 2 to 7 2 x pressed 2 x electroplated 2 x laserdrilled 2 x mech. drilled x pressed 2 + 4b + 2 Microvias 1 to 2 2 to 3 7 to 6 8 to 7 PTH 1 to 8 Buried Via 3 to 6 3 x pressed 3 x electroplated 2 x laserdrilled 2 x mech. drilled 175 % Complexity Seite

21 Costs Kosten Microvias stacked Microvias 0,40 mm BGA Pitch staggered Filling? Complexity Seite

22 We will have a Why is it cheaper, to have Buried Vias from the first to the last Microvia layer? Page

23 Survey Page

24 Agenda Overview Webinar HDI 1 Route out a BGA Costs Roadmap HDI 2.0 Lasercavity Seite

25 Roadmap HDI 2.0 [µm] Forecast Trace width / spacing Padsize Microvia Dril ldiameter Microvia Drill diameter Buried Via (mech.) Forecast: BGA Pitch 0.30 mm ELIC HDI 5+x+5 High frequency High Speed Seite

26 Agenda Overview Webinar HDI 1 Route out a BGA Costs Roadmap HDI 2.0 Lasercavity Seite

27 Lasercavity? With a laser prudced cavity Exposing of layout on the inner layes Embedding of components Miniaturization Better thermal management Seite

28 Lasercavity LASERCAVITY with sidewall matalization HDI08_3+2(4b)+3 Querschnitt Seite

29 Lasercavity Two step Lasercavity with different electrical potentials Micorvias for the thermal connection to the aluminum Seite

30 Lasercavity LASERCAVITY - Two levels for wire bonding 65 µm step depth Seite

31 Lasercavity LASERCAVITY 1.4 mm deep Stackup: 1+6b+1 Lasercavity on layer 6 Lasercavity surface for AL wire bonding 250 µm LC 1400 µm Seite

32 Thank you for your attention! Dominic Büch WÜRTH ELEKTRONIK GmbH & Co. KG Product Management Lasercavity Circuit Board Technology P.: M.: E. W. Page