Lecture 9 - MOSFET (I) MOSFET I-V Characteristics. March 6, 2003



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6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-1 Lecture 9 - MOSFET (I) MOSFET I-V Characteristics March 6, 23 Contents: 1. MOSFET: cross-section, layout, symbols 2. Qualitative operation 3. I-V characteristics Reading assignment: Howe and Sodini, Ch. 4, 4.1-4.3 Announcements: Quiz #1, March 12, 7:3-9:3 PM, Walker Memorial; covers Lectures #1-9; open book; must have calculator.

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-2 Key questions How can carrier inversion be exploited to make a transistor? How does a MOSFET work? How does one construct a simple first-order model for the current-voltage characteristics of a MOSFET?

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-3 1. MOSFET: layout, cross-section, symbols body source polysilicon gate drain gate n + p + n + n + p n inversion layer channel gate oxide n p + p n + n + n + n + Key elements: inversion layer under gate (depending on gate voltage) heavily-doped regions reach underneath gate inversion layer electrically connects source and drain 4-terminal device: body voltage important

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-4 Circuit symbols Two complementary devices: n-channel device (n-mosfet) on p-si substrate (uses electron inversion layer) p-channel device (p-mosfet) on n-si substrate (uses hole inversion layer) G + I Dn V GS _ D + V DS > B + _ V BS S G I Dn D S B _ G V SG I Dp + S + V _ SB B V SD > D G I Dp S D B (a) n-channel MOSFET (b) p-channel MOSFET Drain n + Source p + Gate p Bulk or Body Gate n Bulk or Body Source n + Drain p +

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-5 2. Qualitative operation Water analogy of MOSFET: Source: water reservoir Drain: water reservoir Gate: gate between source and drain reservoirs VDS VGS ID n+ S G D n+ VGS VDS water depletion region inversion layer p B source gate drain Want to understand MOSFET operation as a function of: gate-to-source voltage (gate height over source water level) drain-to-source voltage (water level difference between reservoirs) Initially consider source tied up to body (substrate or back).

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-6 Three regimes of operation: Cut-off regime: MOSFET: V GS <V T, V GD <V T with V DS >. Water analogy: gate closed; no water can flow regardless of relative height of source and drain reservoirs. S V GS <V T G V GD <V T D n+ n+ depletion region p no inversion layer anywhere no water flow I D =

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-7 Linear or Triode regime: MOSFET: V GS >V T, V GD >V T, with V DS >. Water analogy: gate open but small difference in height between source and drain; water flows. S V GS >V T G V GD >V T D n+ n+ depletion region p inversion layer everywhere Electrons drift from source to drain electrical current! V GS Q n I D V DS E y I D ID small VDS ID small VDS VGS>VT VDS VDS VT VGS

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-8 Saturation regime: MOSFET: V GS >V T, V GD <V T (V DS > ). Water analogy: gate open; water flows from source to drain, but free-drop on drain side total flow independent of relative reservoir height! S V GS >V T G V GD <V T D n+ n+ depletion region p inversion layer "pinched-off" at drain side I D independent of V DS : I D = I Dsat ID V GDsat =V T linear saturation V DSsat =V GS -V T VDS

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-9 3. I-V characteristics Geometry of problem: V DS V GS >V T I D S G D n+ n+ V BS = depletion region inversion layer p L y B General expression of channel current Current can only flow in y-direction: J y = Q n (y)v y (y) Total channel current: I y = WQ n (y)v y (y) Drain terminal current is equal to minus channel current: I D = WQ n (y)v y (y)

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-1 I D = WQ n (y)v y (y) Rewrite in terms of voltage at channel location y, V c (y): If electric field is not too big: v y (y) µ n E y (y) =µ n dv c (y) dy For Q n (y) use charge-control relation at location y: for V GS V c (y) V T. All together: Q n (y) = C ox [V GS V c (y) V T ] I D = Wµ n C ox (V GS V c (y) V T ) dv c(y) dy Simple linear first-order differential equation with one unknown, the channel voltage V c (y).

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-11 Solve by separating variables: I D dy = Wµ n C ox (V GS V c V T )dv c Integrate along the channel in the linear regime: Then: or: -for y =,V c () = -for y = L, V c (L) =V DS (linear regime) I D L dy = Wµ nc ox V DS (V GS V c V T )dv c I D = W L µ nc ox (V GS V DS 2 V T)V DS

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-12 For small V DS : I D W L µ nc ox (V GS V T )V DS Key dependencies: V DS I D (higher lateral electric field) V GS I D (higher electron concentration) L I D (lower lateral electric field) W I D (wider conduction channel) ID small VDS ID small VDS VGS>VT VDS VDS VT VGS This is the linear or triode regime.

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-13 In general, I D = W L µ nc ox (V GS V DS 2 V T)V DS Equation valid if V GS V c (y) V T at every y. Worst point is y = L, where V c (y) =V DS, hence, equation valid if V GS V DS V T, or: V DS V GS V T ID VDS=VGS-VT VGS VGS=VT VDS term responsible for bend over of I D : V DS 2

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-14 To understand why I D bends over, must understand first channel debiasing: Q n C ox (V GS -V T ) E y L y V c L y V DS V GS -V c (y) L y V GS local gate overdrive V DS V T L y Along channel from source to drain: y V c (y) Q n (y) E y (y) Local channel overdrive reduced closer to drain.

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-15 Impact of V DS : Q n VDS= VDS E y L y VDS Vc L VDS= y VDS L VDS= y As V DS, channel debiasing more prominent I D rises more slowly with V DS

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-16 1.5 46.5 NMOSFET Output characteristics (V GS = 3 V, V GS =.5 V ): Zoom close to origin:

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-17 Transfer characteristics (V DS =.1 V ):

6.12 - Microelectronic Devices and Circuits - Spring 23 Lecture 9-18 Key conclusions The MOSFET is a field-effect transistor: the amount of charge in the inversion layer is controlled by the field-effect action of the gate the charge in the inversion layer is mobile conduction possible between source and drain In the linear regime: V GS I D : more electrons in the channel V DS I D : stronger field pulling electrons out of the source Channel debiasing: inversion layer thins down from source to drain current saturation as V DS approaches: V DSsat = V GS V T