ASP-DAC 2014 Normally-Off Technologies for Healthcare Appliance Shintaro Izumi 1, Hiroshi Kawaguchi 1, Yoshikazu Fujimori 2, and Masahiko Yoshimoto 1 1 Kobe University, Kobe, Japan, 2 Rohm, Kyoto, Japan 2014 Kobe University Integrated Silicon & Software Architecture Laboratory 1
Wearable Healthcare System 2
Proposed LSI: IHR monitor IHR (Instantaneous Heart Rate) = 60 / (newest R2R interval [s]) [bpm] R R2R R P T Q S ECG : Electrocardiogram Applications : Heart Rate Variability (HRV) analysis Exercise intensity estimation 3
Constraints of Wearable Sensor Requirement Small size Light weight Low cost Electrode Battery Problems: Current consumption (average, peak) SNR degragetion 4
Normally-off strategy Wireless communication Passivei NFC (Near Field Communication) Leakage current of data buffer FeRAM Active current of analog front end Low-cost t amplifier and ADC with noise tolerant algorithm 5
Passive NFC tag IC usage Program loading Parameter setting NFC Smartphone or Reader/Writer Data gathering Wearable sensor Low speed, passive communication 6
System Architecture 7
Cortex M0 core 8
Data Communication 9
Robust IHR Monitor 10
11 Noises in wearable ECG Clean ECG (10~30Hz) Baseline drift (~3Hz) Hum noise (50,60Hz) Muscle noise (10~1kHz) 1kHz) Motion artifact (5~20Hz) False Positive Removable Difficult to remove False Negative
Short-Term Autocorrelation Algorithm Search window Template window T shift R2R t n Autocorrelation coefficient T shift R2R 12
T shift 0.5s 13 Short-Term Autocorrelation Algorithm Search window T shift = 0.5 s R2R = 0.7s t n Autocorrelation coefficient
Short-Term Autocorrelation Algorithm Search window T shift = 0.7 s R2R = 0.7s t n Autocorrelation coefficient T shift 0.7s 14
Short-Term Autocorrelation Algorithm Search window T shift = 1.0 s R2R = 0.7s t n Autocorrelation coefficient T shift 1.0s 0.7s = R2R 15
16 Our Approach for ECG Sensing Electrodes Analog Digital Amp. ADC IHR Detector t Robust Amp. ADC IHR Detector (proposed)
Architecture of IHR monitor 17
18 Die Micrograph and Specification 6.9 mm OSC AFE 64KB FeRAM ADC IHR, CM0, logic 64 4KB SR RAM Technology Supply voltage Chip area Frequency MCU 130-nm CMOS 1.2V (Digital, SRAM, ADC, AFE) 3.0V (FeRAM, 32kHz OSC, I/O) 6.9 mm 6.9 mm 24 MHz (for MCU) 32 khz (for other blocks) 32-bit Cortex M0 64-KB FeRAM (for logging data On chip memory 64-KB SRAM (for MCU) ADC AFE Resolution 12 bit Current Gain 1.75-KB SRAM (for IHR detecto 0.5 A@128 @ S/s, 1.4 A@1 @ ks/s 54 db Bandwidth 0-100 Hz Current 3.4 A Total current 13.7 A (for heart rate logging) 6.9 mm
4000 Measurement Noisy condition 1 Noisy condition 2 ADC output 3000 2000 1000 400 0 0 2 4 6 8 10 12 QSW WT outp put 200 0-200 -400 0 2 4 6 8 10 12 IHR output [be eat/min.] 90 80 70 0 2 4 6 8 10 12 Time [s] 19
Measurement nsump ption [A] 1E-04 1E-05 Digital: 8.9 ua (avg.) AFE: 3.3 ua (avg.) FeRAM+OSC+I/O: 1.0 ua (avg.) ADC: 0.5 ua (avg.) Activate MCU and write to FeRAM (1 S/s) Curre ent co 1E-06 1E-07 ADC and IHR calculation (128 S/s) 000 0.00 002 0.02 004 0.04 006 0.06 008 0.08 010 0.10 Time [s] 20
21 Comparison This work ISSCC'12 [12] VLSI'11 [13] Technology 130 nm 130 nm 180 nm Supply voltage 1.2V/3.0V 0.3-0.7V 1.2V Frequency 24 MHz/32 khz 1.7 MHz-2 khz 1 MHz MCU Cortex M0 (32 bit) 8b RISC On chip memory 129.75 kb 5.5 kb 46 kb Total power for heart rate extraction Total current for heart rate extraction n/a 18.24 W 19 W 31.1 W 13.7 A >27 A 25.9 A
22 Conclusion The low-power wearable sensor using normally-off strategy was presented The noise tolerant ECG processor chip was fabricated in 0.13 m CMOS The robust IHR monitor using short-term autocorrelation algorithm consumes 1.21 A The test chip totally consumes 13.7 A in IHR logging application
23 Acknowledgement This research was supported by Ministry of Economy, Trade and Industry (METI) and the New Energy and Industrial Technology Development Organization (NEDO).
Thank you! 24
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Performance Summary [ A] 129 A Curre ent con nsump ption [ 17.2 A w/o FeRAM w/o FeRAM w/o IHR w/ IHR 13.7 A w/ FeRAM w/ IHR 26
27 Wavelet Transform (WT) Both time and frequency analysis ψ :mother wavelet 1 x b W Wf(a,b) a a f(x)dx (decide a kind of transform) Discrete WT (DWT) consists of digital filters W 3 G ( z 2 ) H(z( 4 ) 3 G ( z) H( z 2 ) W 2 H : High pass filter G : Low pass filter f [n] H (z) 1 W
28 Wavelet Transform Sampling frequency = 128Hz A kind of Band Pass Filter (BPF)
SNR S SNR 10log N a 2 S : The peak to peak p amplitude of QRS complex N : Frequency weighted noise power a : Scale factor MIT-BIH NST : http://www.physionet.org/physiotools/wag/nst-1.htm 29