Open Architecture Design for GPS Applications Yves Théroux, BAE Systems Canada

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1 Open Architecture Design for GPS Applications Yves Théroux, BAE Systems Canada BIOGRAPHY Yves Théroux, a Project Engineer with BAE Systems Canada (BSC) has eight years of experience in the design, qualification, integration and project engineering of hardware for GPS and Omega navigation and sensor systems. ABSTRACT The last few years have seen a new range of GPS products and applications, while the cost of a basic GPS sensor has decreased significantly. The need has emerged for a versatile GPS sensor that can be tailored to any specific application. This paper describes the architecture of the CMT-1200, a compact and low-cost GPS receiver that permits the incorporation of new software components at different execution levels and rates, thereby providing maximum flexibility without the need of an extra processor or memory. The user can thus easily customize the I/O or navigation filtering, as well as add new data or command processes directly into the core software. This reduces hardware requirements while providing more efficient utilization of software processing power and memory. The CMT-1200's hardware is also described. The basic design approach includes a high level of circuit integration, and a powerful RISC processor architecture. With two built-in serial ports and many discrete inputs and outputs, the CMT-1200 can be easily expanded to handle additional devices (eg, serial ports, A/D converter, gyroscope, altimeter, etc) with minimum added circuitry. Finally, examples are provided of specific applications, showing how the software and hardware can be customized with a minimal time to market. receiver as a peripheral device. For many of these noncritical applications (excluding navigation), the optimal design approach is to integrate the GPS and application electronics in a single processing unit. The CMT-1200's architecture and processing power permits the embedding of a wide range of host applications. The GPS receiver then becomes the heart of the system. BACKGROUND The CMT-1200 design effort has been a collaboration between BAE Systems Canada (BSC) and Mitel (GPSC), combining BAE SYSTEMS CANADA's strengths in navigation system design with Mitel's know-how in RF analog and digital ASICs. The result is an "open architecture" applied to the following products:! BAE SYSTEMS CANADA's CMT-1200 OEM card [1], which can be purchased with a FEPROM that allows the user to develop source code and reprogram it independently! Mitel's chipset, for very high-volume applications! BAE SYSTEMS CANADA's GPS software, to which customized features can be added using GPSC's ARM processor software development kit. The flexibility of this architecture permits the addition of a GPS-based application directly into the receiver, keeping cost, size and power consumption to a minimum. HARDWARE ARCHITECTURE The CMT-1200 GPS receiver is a highly integrated design comprising three chips (see Figure 1):! RF front end [2]! digital signal processing (DSP) ASIC [3]! RISC processor. The RF chip performs triple IF conversion and analog-todigital conversion (2 bits), and also includes the PLL and VCO. It also provides the time base for the processor and the DSP chip. INTRODUCTION The vast majority of GPS-based applications use the GPS

2 wait-states). Typically this will improve the CPU power by a factor of two. SOFTWARE ARCHITECTURE Figure 1 - CMT-1200 Block Diagram The DSP chip includes 12 GPS tracking channels and the following peripheral circuits: The CMT-1200's GPS software is broken down into the simplest and most logical modules (Figure 2). Each module is as self-contained as possible to ensure easy development, testing and interfacing. Once the modules were defined, execution rates of 500 µs, 50 ms, 1 s and background were established, based on previous experience and to provide maximum flexibility for the integration of new tasks. The 500-µs execution rate is used for the highest priority tasks, signal processing and low-level I/O. The 50-ms execution rate is used for I/O management, GPS data decoding and SV management process. The navigation process is performed every second. Lower-rate processes! two programmable UARTs! real-time clock! programmable interrupts! watchdog and reset circuit! discrete I/Os. The processor is the system's critical component. The ARM60 RISC processor was selected because it has:! the processing power to handle 12 tracking channels! 30% spare capacity for customized tasks! low cost and power consumption. Integration of GPS and customized applications can be achieved either by using the CMT-1200 standard platform, or embedding the GPS chipset onto a custom board with the host application. The basic CMT-1200 can be enhanced with the following:! an additional UART! up to 2 Mbytes ROM/FEPROM! up to 512 kbytes SRAM! up to 64 kbytes EEPROM. The battery back-up input can be used to supply only the real-time clock, or to maintain SRAM as well, in order to accelerate time to first fix (TTFF). The chipset architecture also has the required chip-select to support additional 8/16-bit devices, such as a UART or A/D converter, for full custom applications. Figure 2 - CMT-1200 Software Data Flowchart are executed at the background level. At all execution rates, spare CPU time is available to perform any task. Special built-in checks are incorporated to detect any overloading of the system. To facilitate the addition of customized features, all important data structures are global, so that a new process can access any of them directly with no waste of CPU time. Special algorithms prevent modification of values at critical times. Another way to add processes is to execute them just before or after any of the main or underlying modules. This allows for easy modification of the data, eg, to provide an extra filter for pseudo-range measurements prior to navigation processing. A similar filter could be added after the navigator, before the RS-232 output, etc. For applications requiring more processing power, such as a real-time kinematic (RTK) algorithm, the code could be executed totally in SRAM, in order to operate in zero-waitstate memory access. Operational code fetching is then reduced by a factor of three (from two wait-states to zero

3 This high level of flexibility is made possible primarily by the CMT-1200's memory capacity and CPU power. The software's modularity, on the other hand, permits the addition of processes at almost any level and stage in the generation of the navigation solution. This architecture is ideal for the new GPS market, which calls for many different applications with particular characteristics and requirements. CUSTOMIZATION A very wide range of custom software can be embedded in the CMT-1200, for applications including:! drivers to interface with communications devices! enhanced navigation units with DR sensors! RTK positioning! map matching. mobile computer, or a simple data-entry keyboard to provide a driver interface. The third UART provides the enhanced functionality to allow the interconnection of a standard differential input and a user interface without having to process differential corrections through a mobile computer, thereby offering significant cost savings. Additional savings result from the use of the packetswitched public network, which provides a data link at a cost much lower than a cellular phone network. The communications software module can be added to the standard CMT-1200 software in accordance with Figure 4. GPS RECEIVER FEATURES AND PERFORMANCE The GPS receiver has the following features: As an example, the implementation of a communications device interface is described herein. Its goal is to provide real-time tracking with differential GPS (DGPS) capabilities, along with two-way driver/base-station messaging, without installing an expensive in-vehicle computer. The proposed solution uses the CMT-1200 as the development platform. A third UART is used to communicate with a modem, resulting in an on-board unit with the following interfaces (Figure 3):! host on Com 1, ASCII or binary! DGPS on Com 2, RTCM-104! communications on Com 3, packet-switched public network modem. Figure 4 - Data Flowchart with Communications Software! 12 parallel tracking channels, ready for WAAS DGPS! 24 tracking channels in acquisition mode! DGPS-ready RTCM-104! GPS measurements aligned on GPS time (accuracy better than 1 µs)! raw measurement rate of 10 Hz. Related features of the CMT-1200 include:! time-mark output of 1 Hz, aligned with GPS time! keep-alive input pin (RAM and/or real-time clock)! dual UART (third UART optional)! six (6) input/output discrete control lines! reprogrammable operational code (FEPROM)! rechargeable lithium battery (optional). Figure 3 - Communications Unit Block Diagram The main benefits of this product is that it interfaces to a standard device for vehicle tracking. The host might be a

4 The CMT-1200 is compatible with both active and passive antennas. When a passive antenna is used, the maximum loss of the cable should not exceed 3 db, for optimal tracking performance. From integration work with peripheral circuits, the susceptibility of the CMT-1200 to RF emissions has been proven to be very low. Performance data for the CMT-1200 are presented in Figures 5 through 7. Typical TTFFs are 60 s with current almanac, position and time, and 30 s with current almanac, position, time and ephemeris. Re-acquisition times are <1 s for obscurations shorter than 5 s, and <3 s for obscurations shorter than 1 hour. TTFFs have been measured when GPS measurements are not aligned with GPS time. ACKNOWLEDGEMENTS The author would like to thank BSC s GPS design team members, especially those who developed the CMA-3012 airborne GPS receiver used by most major airlines. The concept of the CMT-1200 has been derived from this highend product. Thanks also to GEC Plessey Semiconductors, whose staff has cooperated closely in the design process, thereby achieving the CMT-1200's very high level of integration and quality. REFERENCES 1. ALLSTAR OEM (CMT-1200) Specification, BAE SYSTEMS CANADA Document , rev. E, August GP2010 GPS Receiver RF Front End, GPSC Publication DS , June GP2021 GPS 12-Channel Correlator with Microprocessor Support Functions, GPSC Publication DS , June Figure 5 - CMT-1200 GPS Position Accuracy

5 Figure 6 - CMT-1200 N/S and E/W Position Accuracy Figure 7 - CMT-1200 N/S and E/W Groundspeed Accuracy