Kirchhoff Institute for Physics Heidelberg

Transcription

1 Kirchhoff Institute for Physics Heidelberg Norbert Abel FPGA: (re-)configuration and embedded Linux 1

2 Linux Front-end electronics based on ADC and digital signal processing Slow control implemented as single board computer OS Linux Controls multiple MCS/FPGAs PA/ ADC RAM PA/ ADC MCM or FPGA Link Clockrecovery Clock PA/ ADC Slow Control & Configuration Ethernet 2

3 Linux Move slow control to front-end electronics FPGA PA/ ADC RAM PA/ ADC FPGA Slow Control & Configuration Link Clockrecovery Clock Ethernet PA/ ADC 3

4 Linux - Hardware PLB-Arbiter OPB-Arbiter MicroBlaze I-OCM Ctroller I-BRAM UART Ethernet ICAP OPB D-BRAM D-OCM Ctroller PLB PLB2OPB Bridge JTAG PROC_SYS RESET PLB_DDR DCM 4

5 Linux - Hardware FPGA Linux 908 Slices HWS Xilinx Virtex 2 Pro 7: Slices Xilinx Virtex 4 FX 60: Slices 309 Slices Hardware Scheduling 5

6 What is Hardware Scheduling? Reconfiguration of Hardware Tasks on demand Partial bit files are stored in RAM If you need more place than available => Scheduling Linux: Hardware Task <=> Linux process 6

7 Motivation More flexibility Simple and inexpensive bug fixes High performance tasks More space for more functionality on chip Saving of costs as a result of using smaller FPGAs Less power consumption 7

8 Major Points Chip areas Short reconfiguration times Context management Implementation Tools 8

9 Chip areas Short reconfiguration times Context management Implementation Tools 9

10 10 Hardware Scheduling

11 Chip areas Short reconfiguration times Context management Implementation Tools 11

12 Reconfiguration time using PPC SDRAM Minor Frame PPC Scheduler in SW Minor Frame 340µs ICAP Controller ICAP-BRAM 75µs HW-ICAP 5,7MB/s 12

13 Reconfiguration time without PPC SDRAM Minor Frame PPC Minor Frame 340µs ICAP Controller ICAP-BRAM 75µs Scheduler and ICAP Controller in HW 6,4µs HW-ICAP 80MB/s Reconfiguration of one task(121kb): 1,8ms 13

14 Chip areas Short reconfiguration times Context management Implementation Tools 14

15 Task Scheduler Communication Scheduler Task Start Task Stop Task Stop Task Start Task STOP INIT='1' STOP='1' STOP<='1' WAIT FOR STOP_ACK TCLK<='0' TASK SWITCH TASK SWITCH INIT<='1' TCLK <= SYS_CLK INIT<='0' Scheduler BRAM STOP_ACK INIT TCLK DO (8) DI (8) ADDR (11) RESET ALL FSM & FF WAIT FOR INIT='0' LOAD CONTEXT... SAVE CONTEXT STOP_ACK <='1' WAIT 15

16 Design of a Task Start Task: Stop Task : INIT='1' RESET ALL FSM & FF TSK INIT='0' STOP='0' STOP='1' SAVE CONTEXT STOP_ACK <='1' WAIT FOR INIT='0' WAIT LOAD CONTEXT... not interruptible part 16

17 Context Store Global Store Local Store 1 Local Store 2 Local Store 3 Local Store 4 Local Store 5 Local Store 6 Local Store 7 Task 1 Task 2 Task 5 17

18 Chip areas Short reconfiguration times Context management Implementation Tools 18

19 Size & Speed Size BRAMs Xilinx Virtex 2 Pro Slices 44 Xilinx Virtex 4 FX Slices 24 System (SCHEDULER, PPC, OPB, PLB,...) 1217 Slices 8 SCHEDULER 309 Slices 1 HWS-OS of Waldner und Platzner Scheduler on the FPGA using PPC Scheduler on the FPGA without PPC Reconfiguration of one Minor Frame - 415µs 6,4µs Reconfiguration of one Major Frames µs 141µs Reconfiguration of one Task 510ms 119ms 1,82ms Task size 182,8kB 121kB 121kB Data throughput 0,36MB/s 1MB/s 80MB/s 19

20 Chip areas Short reconfiguration times Context management Implementation Tools 20

21 Linux - Software Our Linux constists of: small Kernel (uclinux) RAMFS BusyBox HWS controller 21

22 Linux Hardware vs. Software Linux kernel ressource allocations 22

23 Linux configuration tool Linux configuration tool Selection of hardware components, kernel versions and drivers and applications Currently supported µc Linux on MicroBlaze and Leon3 PowerPC Kernel and (2.6 in preparation) Xilinx Virtex II pro and 4 devices Busybox hardware kernel application generate Processor I/O PPC MicroBlaze Leon3 Serial ICAP Memory Type Size Ethernet 23 External DDR 128MB I-Cache BRAM 32 KB D-Cache BRAM 32 KB GPIO

24 Conclusion PA/ ADC RAM PA/ ADC FPGA Task Area Link Clockrecovery Clock Ethernet Slow Control & Configuration PA/ ADC Hardware Linux Process 24