KIP Heidelberg. Norbert Abel. SysCore 1.0. Firmware and Software Aspects

Transcription

1 KIP Heidelberg Norbert Abel yscore 1.0 Firmware and oftware Aspects

2 Actual Test etup Detector Front-End Read-Out Board Controller ROC XYTER FEB ADC Tag data ADC data control FPGA clock Eth any PC running PHY Linux and ROOT Bond or cable connection 1 n-xyter 128 ch. LVD signal cable plain Ethernet 2

3 Actual Test etup nxyter ADC yscore

4 FEE in Detail ADCLK (32 MHz) DATA OUTP, OUTN DATA LCLK (192 MHz) ADC analog LCLKP, LCLKN ADCLK (32 Mhz) clk32o_p, clk32o_n DA, CL, C DATA Data_P(0...7), Data_N(0...7) I²C ID(0..6), CL, DA, I2C_Reset, RegReset CLK (256 & 128 MHz), REET clk256a_p, clk256a_n, clk256b_p, clk256b_n, Reset_P, Reset_N FPGA XYTER erial Bus

5 yscore in Detail DATA OUTP, OUTN LCLK (192 MHz) DDR - DRAM ADCLK (32 MHz) 192 MHz ADC Fast Control 100 MHz PPC LCLKP, LCLKN ADC low Control DATA 128/256 Mhz Data_P(0...7), Data_N(0...7) CLK, REET I²C N-XYTER Fast Control Ethernet erial Bus YNCH N-XYTER low Control 5

6 yscore Version 1.0 D card Connector to the nxyter Connector to the ADC erial port Ethernet port Xilinx Virtex4 FX20 Actel CPLD Flash memory 6

7 low Control - Linux (1) loaded at: relocated to: board data at: relocated to: zimage at: avail ram: F C9 004FD FC1E0 004FC1E0 004F C 004F Linux/PPC load: root=/dev/mtdblock0 rootfstype=romfs rw ip=on Uncompressing Linux...done. Now booting the kernel Linux version pre1 (bob@debian) (gcc version 3.4.2) #12 Fri Aug 17 02:197 Xilinx Virtex-II Pro port (C) 2002 MontaVista oftware, Inc. ([email protected]) On node 0 totalpages: zone(0): pages. zone(1): 0 pages. zone(2): 0 pages. Kernel command line: root=/dev/mtdblock0 rootfstype=romfs rw ip=on Xilinx INTC #0 at 0x mapped to 0xFDFFF000 Calibrating delay loop BogoMIP [...] Freeing unused kernel memory: 44k init Mounting proc: Mounting var: Populating /var: Running local start scripts. etting hostname: etting up interface lo: Mounting /etc/dhcpc: mount: Mounting none on /etc/dhcpc failed: No such file or directory tarting DHCP client: tarting inetd: tarting thttpd: 7

8 low Control - Linux (2) powerpc-auto login: root Password: # ls bin dev etc home lib mnt proc sbin tmp usr var # mount /dev/mtdblock0 on / type romfs (ro) /proc on /proc type proc (rw) none on /var type ramfs (rw) # ps PID PORT TAT IZE HARED %CPU COMMAND /sbin/init keventd ksoftirqd_cpu kswapd bdflush kupdated mtdblockd /bin/inetd thttpd -c *.cgi sh /bin/inetd 42 0 R 0.0 ps # 8

9 low Control - yscore hell yscore> 9

10 low Control - yscore hell yscore> ls 0: 0 1: 0 2: 0 3: 0 4: 0 5: 0 6: 0 7: 0 8: 0 9: 0 10: 0 11: 0 12: 0 13: 0 14: 0 15: 0 [...] 38: 0 39: 0 40: 0 41: 0 42: 0 43: 0 44: 0 45: 0 FIFO full: 0 FIFO empty: 1 yscore> 10

11 low Control - yscore hell yscore> ls 32 32: 0 yscore> set : 1 yscore> data FIFO is empty. 11

12 low Control - yscore hell yscore> testpulse 4 DV: DV: DV: DV: 1, 1, 1, 1, T: T: T: T: 3418, ID: 3, ADC: 7D , ID: 3, ADC: 7D6 9049, ID: 3, ADC: 7CA 5464, ID: 3, ADC: 7D4 yscore> 12

13 The ADC (AD5257) 13

14 Clock Generation ADCLK_B (32 MHz) DDR-DATA CDC DATA ADC ADCLK_A (32 MHz) XYTER low Control ODDR Johnson Counter analog ynch (Delay) LCLK (192 MHz) 0 /90 Phase hift ADCLK_N (32 Mhz) DATA CLK (128 MHz) CLK (256 MHz), REET CDC CLK256_A

15 NX vs. ADC

16 Clock Generation and low Control CLK100 CDC ynch (Delay) OCM FIFO PPC CDC PLB 0 /90 Phase hift OPB Johnson Counter ODDR Eth0 CLK256_A PC

17 low Control - yscore hell yscore> R_INIT 256 OK. yscore> BUFG 0 OK. yscore> HIFT 17 R_INIT: BUFG: 1 yscore> 17

18 Conclusion Already done: nxyter-control ADC-Control ynchronization of the ADC and the nxyter data Linux Bootloader In progress: Flash prog via Actel Performance optimization Auto calibration Programming via UB 18