AM26LS30 TIMING CHARACTERISTICS

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1 Order this document by AM26LS3/ The AM26LS3 is a low power Schottky set of line drivers which can be configured as two differential drivers which comply with EIA422A standards, or as four singleended drivers which comply with EIA423A standards. A mode select pin and appropriate choice of power supplies determine the mode. Each driver can source and sink currents in excess of 5 ma. In the differential mode (EIA422A), the drivers can be used up to Mbaud. A disable pin for each driver permits setting the outputs into a high impedance mode within a ± V common mode range. In the singleended mode (EIA423A), each driver has a slew rate control pin which permits setting the slew rate of the output signal so as to comply with EIA423A and FCC requirements and to reduce crosstalk. When operated from symmetrical supplies (±5. V), the outputs exhibit zero imbalance. The AM26LS3 is available in a 6pin plastic IP and surface mount package. Operating temperature range is 4 to +85 C. Operates as Two ifferential EIA422A rivers, or Four SingleEnded EIA423A rivers High Impedance Outputs in ifferential Mode Short Circuit Current Limit In Both Source and Sink Modes ± V Common Mode ange on High Impedance Outputs ± 5 V ange on Inputs Low Current PNP Inputs Compatible with, CMOS, and MOS Outputs Individual Output Slew ate Control in SingleEnded Mode eplacement for the AM AM25LS3 and National Semiconductor S369 UAL IFFEENTIAL/ QUA SINGLEENE LINE IVES SEMICONUCTO TECHNICAL ATA PC SUFFI PLASTIC PACKAGE CASE 648 SUFFI PLASTIC PACKAGE CASE 75B (SO6) Input A Input B/ Enable AB Mode Gnd Input C/ Enable C Input VEE FN SUFFI PLASTIC PACKAGE CASE 775 PIN CONNECTIONS SA Output A Output B SB SC Output C Output S (Top View) epresentative Block iagrams Input A NC SA Out A SingleEnded Mode EIA423A Input A Input B Input C Input SA Out A SB Out B SC Out C S Out Enable AB Input A Input Enable C ifferential Mode EIA422A VEE 8 Gnd 5 Mode 4 Out A Out B Out C Out In B/En AB Mode NC Gnd In C/En C evice AM26LS3PC MC26LS3 AM26LS3FN In VEE NC S Out OEING INFOMATION Operating Temperature ange TA = 4 to +85 C Out B SB NC SC Out C Package Plastic IP SO6 PLCC2 This document contains information on a new product. Specifications and information herein are subject to change without notice. MOTOOLA ANALOG IC EVICE ATA Motorola, Inc. 995

2 AM26LS3 MAIMUM OPEATING CONITIONS (Pin numbers refer to IP and SO6 packages only.) ating Symbol Value Unit Power Supply Voltage VEE.5, , +.5 Input Voltage (All Inputs).5, +2 Applied Output Voltage when in High Impedance Mode ( = 5. V, Pin 4 = Logic, Pins 3, 6 = Logic ) Vza ±5 Output Voltage with, VEE = V Vzb ±5 Output Current IO Self limiting Junction Temperature TJ 65, +5 C evices should not be operated at these limits. The ecommended Operating Conditions table provides conditions for actual device operation. ECOMMENE OPEATING CONITIONS Power Supply Voltage (ifferential Mode) ating Symbol Min Typ Max Unit VEE Power Supply Voltage (SingleEnded Mode) VEE Input Voltage (All Inputs) +5 Applied Output Voltage (when in High Impedance Mode) Vza + Applied Output Voltage, = Vzb + Output Current IO ma Operating Ambient Temperature (See text) TA C All limits are not necessarily functional concurrently. ELECTICAL CHAACTEISTICS (EIA422A differential mode, Pin 4.8 V, 4 C TA 85 C, 4.75 V 5.25 V, VEE = Gnd, unless otherwise noted. Pin numbers refer to IP and SO6 packages only.) Output Voltage (see Figure ) ifferential, L =, = 5.25 V ifferential, L = Ω, = 4.75 V Change in ifferential Voltage, L = Ω (Note 4) Offset Voltage, L = Ω Change in Offset Voltage*, L = Ω Characteristic Symbol Min Typ Max Unit Output Current (each output) Power Off Leakage, =, V VO + V High Impedance Mode, = 5.25 V, V VO + V Short Circuit Current (Note 2) High Output Shorted to Pin 5 (TA = 25 C) High Output Shorted to Pin 5 (4 C TA +85 C) Low Output Shorted to +6. V (TA = 25 C) Low Output Shorted to +6. V (4 C TA +85 C) Inputs Low Level Voltage High Level Voltage = 2.4 V = 5 V =.4 V Current, 5 V, = Clamp Voltage (Iin = 2 ma) Power Supply Current ( = V, Outputs Open) ( Enable ) VO VO2 VO2 VOS VOS IOLK IO ISC ISC ISC+ ISC+ VIL VIH IIH IIHH IIL II VIK NOTES:. All voltages measured with respect to Pin Only one output shorted at a time, for not more than second. 3. Typical values established at +25 C, V CC = +5. V, V EE = 5. V. 4. V in switched from.8 to 2. V. 5. Imbalance is the difference between V O2 with V in.8 V and V O2 with V in 2. V. ICC m m µa ma µa ma 2 MOTOOLA ANALOG IC EVICE ATA

3 AM26LS3 TIMING CHAACTEISTICS (EIA422A differential mode, Pin 4.8 V, TA = 25 C, = 5. V, VEE = Gnd, (Notes and 3) unless otherwise noted.) Characteristic Symbol Min Typ Max Unit ifferential Output ise Time (Figure 3) tr 7 2 ns ifferential Output Fall Time (Figure 3) tf 7 2 ns Propagation elay Time Input to ifferential Output Input Low to High (Figure 3) Input High to Low (Figure 3) tph tpl ns Skew Timing (Figure 3) tph to tpl for Each river Max to Min tph Within a Package Max to Min tpl Within a Package tsk tsk2 tsk ns Enable Timing (Figure 4) Enable to Active High ifferential Output Enable to Active Low ifferential Output Enable to 3State Output From Active High Enable to 3State Output From Active Low tph tpl tph tpl ns ELECTICAL CHAACTEISTICS (EIA423A singleended mode, Pin 4 2. V, 4 C TA 85 C, 4.75 V, VEE 5.25 V, (Notes and 3) unless otherwise noted). Output Voltage ( = VEE = 4.75 V) SingleEnded Voltage, L = (Figure 2) SingleEnded Voltage, L = 45 Ω, (Figure 2) Voltage Imbalance (Note 5), L = 45 Ω Characteristic Symbol Min Typ Max Unit VO VO2 VO2 Slew Control Current (Pins 6, 3, 2, 9) ISLEW ±2 µa Output Current (Each Output) Power Off Leakage, = VEE =, 6. V VO +6. V Short Circuit Current (Output Short to Ground, Note 2).8 V (TA = 25 C).8 V (4 C TA +85 C) 2. V (TA = 25 C) 2. V (4 C TA +85 C) Inputs Low Level Voltage High Level Voltage = 2.4 V = 5 V =.4 V Current, 5 V, = Clamp Voltage (Iin = 2 ma) Power Supply Current (Outputs Open) = V, VEE = 5.25 V, =.4 V TIMING CHAACTEISTICS (EIA423A singleended mode, Pin 4 2. V, TA = 25 C, = 5. V, VEE = 5. V, (Notes and 3) unless otherwise noted.) Output Timing (Figure 5) Output ise Time, CC = Output Fall Time, CC = Output ise Time, CC = 5 pf Output Fall Time, CC = 5 pf IOLK ISC+ ISC+ ISC ISC VIL VIH IIH IIHH IIL II VIK ICC IEE Characteristic Symbol Min Typ Max Unit ise Time Coefficient (Figure 6) Crt.6 µs/pf Propagation elay Time, Input to Single Ended Output (Figure 5) Input Low to High, CC = Input High to Low, CC = Skew Timing, CC = (Figure 5) tph to tpl for Each river Max to Min tph Within a Package Max to Min tpl Within a Package tr t f tr t f tph tpl tsk4 tsk5 tsk µa ma µa ma ns µs ns ns MOTOOLA ANALOG IC EVICE ATA 3

4 AM26LS3 4 MOTOOLA ANALOG IC EVICE ATA Table Inputs Outputs Operation VEE Mode A B C A B C ifferential (EIA422A) +5. Gnd (EIA422A) SingleEnded (EIA423A) (EIA423A) = on t Care = High Impedance (Off) Figure. ifferential Output Test Figure 2. SingleEnded Output Test VEE Mode = VOS L L/2 L/2 CL (.8 or 2. V) VO VO2 Mode = (.8 or 2. V) Figure 3. ifferential Mode ise/fall Time and ata Propagation elay NOTES:. S.G. set to: f. MHz; duty cycle = 5%; t r, t f, ns. 2. t SK = t PH t PL for each driver. 3. t SK2 computed by subtracting the shortest t PH from the longest t PH of the 2 drivers within a package. 4. t SK3 computed by subtracting the shortest t PL from the longest t PL of the 2 drivers within a package. % tph.5 V V % 5% 9% tf tpl tr 9% 5% Vout.5 V +3. V S.G. VO 5 pf

5 AM26LS3 Figure 4. ifferential Mode Enable Timing or 3. V 5 pf L VSS.5 V tph +3. V.5 V V S.G. En 45 Ω ( = Hi) Output Current ( = Lo) tpl. VSS/L. VSS/L VSS/L VSS/L tph tpl.5 VSS/L.5 VSS/L NOTES:. S.G. set to: f. MHz; duty cycle = 5%; t r, t f, ns. 2. Above tests conducted by monitoring output current levels. Figure 5. SingleEnded Mode ise/fall Time and ata Propagation elay CC.5 V tph +2.5 V.5 V tpl V VEE S.G pf VO 9% 5% Vout % 9% 5% % tr tf NOTES:. S.G. set to: f khz; duty cycle = 5%; t r, t f, ns. 2. t SK4 = t PH t PL for each driver. 3. t SK5 computed by subtracting the shortest t PH from the longest t PH of the 4 drivers within a package. 4. t SK6 computed by subtracting the shortest t PL from the longest t PL of the 4 drivers within a package. MOTOOLA ANALOG IC EVICE ATA 5

6 AM26LS3 Figure 6. ifferential Output Voltage versus Load Current Figure 7. Internal Bias Current versus Load Current V O, OUTPUT VOLTAGE (V) ifferential Mode Mode =, = 5. V.8 or 2. V IO VO I B, BIAS CUENT (ma) ifferential Mode Mode = Supply Current = Bias Current + Load Current = 5.25 V IO, OUTPUT CUENT (ma) TOTAL LOA CUENT (ma) 2 I SC, SHOT CICUIT CUENT (ma) Figure 8. Short Circuit Current versus Output Voltage Normally Low Output Normally High Output ifferential Mode Mode =, = 5. V I in, INPUT CUENT ( µ A) +5. Figure 9. Input Current versus Input Voltage (Pin numbers refer to IP and SO6 packages only.) = = 5. V Pins 2 to 4, 6, 7 5. V VEE ifferential or SingleEnded Mode Vza, APPLIE OUTPUT VOLTAGE (V) , INPUT VOLTAGE (V) 3 5 Figure. Output Voltage versus Output Source Current Figure. Output Voltage versus Output Sink Current V OH, OUTPUT VOLTAGE (V) SingleEnded Mode Mode = = 5. V, VEE = 5. V = V OL, OUTPUT VOLTAGE (V) SingleEnded Mode Mode = = 5. V, VEE = 5. V = IOH, OUTPUT CUENT (ma) IOL, OUTPUT CUENT (ma) MOTOOLA ANALOG IC EVICE ATA

7 AM26LS3 I B+, BIAS CUENT (ma) Figure 2. Internal Positive Bias Current versus Load Current Single Ended Mode Mode = = 5. V, VEE = 5. V Supply Current = Bias Current + IOH = Lo = Hi IOL IOH TOTAL LOA CUENT (ma) 24 I B, BIAS CUENT (ma) 5. Figure 3. Internal Negative Bias Current versus Load Current = Lo = Hi 5 SingleEnded Mode Mode = = 5. V, VEE = 5. V Supply Current = Bias Current + IOL IOL IOH TOTAL LOA CUENT (ma) I SC, SHOT CICUIT CUENT (ma) Figure 4. Short Circuit Current versus Output Voltage Normally Low Output SingleEnded Mode Mode = = 5. V, VEE = 5. V Normally High Output Vza, APPLIE OUTPUT VOLTAGE (V) I SC (ma) I SC + (ma) Figure 5. Short Circuit Current versus Temperature Normally Low Output Single or ifferential Mode = 5. V, VEE = 5. V or Gnd 9 Normally High Output to Ground TA, AMBIENT TEMPEATUE ( C) t r, t f, ISE/FALL TIME ( µ s). k Figure 6. ise/fall Time versus Capacitance SingleEnded Mode Mode = = 5. V, VEE = 5. V. CC, CAPACITANCE (pf). k k MOTOOLA ANALOG IC EVICE ATA 7

8 AM26LS3 APPLICATIONS INFOMATION (Pin numbers refer to IP and SO6 packages only.) escription The AM26LS3 is a dual function line driver it can be configured as two differential output drivers which comply with EIA422A Standard, or as four singleended drivers which comply with EIA423A Standard. The mode of operation is selected with the Mode pin (Pin 4) and appropriate power supplies (see Table ). Each of the four outputs is capable of sourcing and sinking 6 to 7 ma while providing sufficient voltage to ensure proper data transmission. As differential drivers, data rates to Mbaud can be transmitted over a twisted pair for a distance determined by the cable characteristics. EIA422A Standard provides guidelines for cable length versus data rate. The advantage of a differential (balanced) system over a singleended system is greater noise immunity, common mode rejection, and higher data rates. Where extraneous noise sources are not a problem, the AM26LS3 may be configured as four singleended drivers transmitting data rates to Kbaud. Crosstalk among wires within a cable is controlled by the use of the slew rate control pins on the AM26LS3. Mode Selection (ifferential Mode) In this mode (Pins 4 and 8 at ground), only a +5. V supply ±5% is required at. Pins 2 and 7 are the driver inputs, while Pins,, 4 and 5 are the outputs (see Block iagram on page ). The two outputs of a driver are always complementary and the differential voltage available at each pair of outputs is shown in Figure 6 for = 5. V. The differential output voltage will vary directly with. A high output can only source current, while a low output can only sink current (except for short circuit current see Figure 8). The two outputs will be in a high impedance mode when the respective Enable input (Pin 3 or 6) is high, or if. V. Output leakage current over a common mode range of ± V is typically less than. µa. The outputs have short circuit current limiting, typically, less than ma over a voltage range of to +6. V (see Figure 8). Short circuits should not be allowed to last indefinitely as the IC may be damaged. Pins 9, 2, 3 and 6 are not normally used when in this mode, and should be left open. (SingleEnded Mode) In this mode (Pin 4 2. V) requires +5. V, and VEE requires 5. V, both ±5.%. Pins 2, 3, 6, and 7 are inputs for the four drivers, and Pins 5, 4,, and (respectively) are the outputs. The four drivers are independent of each other, and each output will be at a positive or a negative voltage depending on its input state, the load current, and the supply voltage. Figures & indicate the high and low output voltages for = 5. V, and VEE = 5. V. The graph of Figure will vary directly with, and the graph of Figure will vary directly with VEE. A high output can only source current, while a low output can only sink current (except short circuit current see Figure 4). The outputs will be in a high impedance mode only if. V. Changing VEE to V does not set the outputs to a high impedance mode. Leakage current over a common mode range of ± V is typically less than. µa. The outputs have short circuit current limiting, typically less than ma over a voltage range of ±6. V (see Figure 4). Short circuits should not be allowed to last indefinitely as the IC may be damaged. Capacitors connected between Pins 9, 2, 3, and 6 and their respective outputs will provide slew rate limiting of the output transition. Figure 6 indicates the required capacitor value to obtain a desired rise or fall time (measured between the % and 9% points). The positive and negative transition times will be within ±5% of each other. Each output may be set to a different slew rate if desired. Inputs The five inputs determine the state of the outputs in accordance with Table. All inputs (regardless of the operating mode) have a nominal threshold of +.3 V, and their voltage must be kept within a range of V to +5 V for proper operation. If an input is taken more than.3 V below ground, excessive currents will flow, and the proper operation of the drivers will be affected. An open pin is equivalent to a logic high, but good design practices dictate that inputs should never be left open. Unused inputs should be connected to ground. The characteristics of the inputs are shown in Figure 9. Power Supplies requires +5. V, ±5%, regardless of the mode of operation. The supply current is determined by the IC s internal bias requirements and the total load current. The internally required current is a function of the load current and is shown in Figure 7 for the differential mode. In the singleended mode, VEE must be 5. V, ±5% in order to comply with EIA423A standards. Figures 2 and 3 indicate the internally required bias currents as a function of total load current (the sum of the four output loads). The discontinuity at load current exists due to a change in bias current when the inputs are switched. The supply currents vary ± 2. ma as and VEE are varied from 4.75 V to 5.25 V. Sequencing of the supplies during powerup/powerdown is not required. Bypass capacitors (. µf minimum on each supply pin) are recommended to ensure proper operation. Capacitors reduce noise induced onto the supply lines by the switching action of the drivers, particularly where long P.C. board tracks are involved. Additionally, the capacitors help absorb transients induced onto the drivers outputs from the external cable (from ES, motor noise, nearby computers, etc.). 8 MOTOOLA ANALOG IC EVICE ATA

9 AM26LS3 Operating Temperature ange The maximum ambient operating temperature, listed as +85 C, is actually a function of the system use (i.e., specifically how many drivers within a package are used) and at what current levels they are operating. The maximum power which may be dissipated within the package is determined by: P max T Jmax T A JA where θja = package thermal resistance which is typically: 67 C/W for the IP (PC) package, 2 C/W for the SOIC () package, TJmax = max. allowable junction temperature (5 C) TA = ambient air temperature near the IC package. ) ifferential Mode Power issipation For the differential mode, the power dissipated within the package is calculated from: P = [( VO) IO] (each driver) + ( IB) where: = the supply voltage where: VO = is taken from Figure 6 for the known where: VO = value of IO where: IB = the internal bias current (Figure 7) As indicated in the equation, the first term (in brackets) must be calculated and summed for each of the two drivers, while the last term is common to the entire package. Note that the term ( VO) is constant for a given value of IO and does not vary with. For an application involving the following conditions: TA = +85 C, IO = 6 ma (each driver), = 5.25 V, the suitability of the package types is calculated as follows. The power dissipated is: P = [3. V 6 ma 2] + (5.25 V 8 ma) P = 454 mw The junction temperature calculates to: TJ = 85 C + (.454 W 67 C/W) = 5 C for the TJ = IP package, TJ = 85 C + (.454 W 2 C/W) = 39 C for the TJ = SOIC package. Since the maximum allowable junction temperature is not exceeded in any of the above cases, either package can be used in this application. 2) SingleEnded Mode Power issipation For the singleended mode, the power dissipated within the package is calculated from: P = (IB+ ) + (IB VEE) + [(IO ( VOH)](each driver) The above equation assumes IO has the same magnitude for both output states, and makes use of the fact that the absolute value of the graphs of Figures and are nearly identical. IB+ and IB are obtained from the right half of Figures 2 and 3, and ( VOH) can be obtained from Figure. Note that the term ( VOH) is constant for a given value of IO and does not vary with. For an application involving the following conditions: TA = +85 C, IO = 6 ma (each driver), = 5.25 V, VEE = 5.25 V, the suitability of the package types is calculated as follows. The power dissipated is: P = (24 ma 5.25 V) + (3. ma 5.25 V) + P = [6 ma.45 V 4.] P = 49 mw The junction temperature calculates to: TJ = 85 C + (.49 W 67 C/W) = 8 C for the TJ = IP package, TJ = 85 C + (.49 W 2 C/W) = 44 C for the TJ = SOIC package. Since the maximum allowable junction temperature is not exceeded in any of the above cases, either package can be used in this application. MOTOOLA ANALOG IC EVICE ATA 9

10 AM26LS3 SYSTEM EAMPLES (Pin numbers refer to IP and SO6 packages only.) ifferential System An example of a typical EIA422A system is shown in Figure 7. Although EIA422A does not specifically address multiple driver situations, the AM26LS3 can be used in this manner since the outputs can be put into a high impedance mode. It is, however, the system designer s responsibility to ensure the Enable pins are properly controlled so as to prevent two drivers on the same cable from being on at the same time. The limit on the number of receivers and drivers which may be connected on one system is determined by the input current of each receiver, the maximum leakage current of each off driver, and the C current through each terminating resistor. The sum of these currents must not exceed the capability of the on driver ( 6 ma). If the cable is of any significant length, with receivers at various points along its length, the common mode voltage may vary along its length, and this parameter must be considered when calculating the maximum driver current. The cable requirements are defined not only by the AC characteristics and the data rate, but also by the C resistance. The maximum resistance must be such that the minimum voltage across any receiver inputs is never less than 2 mv. The ground terminals of each driver and receiver in Figure 7 must be connected together by a dedicated wire (or the shield) in the cable to provide a common reference. Chassis grounds or power line grounds should not be relied on for this common connection as they may generate significant common mode differences. Additionally, they usually do not provide a sufficiently low impedance at the frequencies of interest. SingleEnded System An example of a typical EIA423A system is shown in Figure 8. Multiple drivers on a single data line are not possible since the drivers cannot be put into a high impedance mode. Although each driver is shown connected to a single receiver, multiple receivers can be driven from a single driver as long as the total load current of the receivers and the terminating resistor does not exceed the capability of the driver ( 6 ma). If the cable is of any significant length, with receivers at various points along its length, the common mode voltage may vary along its length, and this parameter must be considered when calculating the maximum driver current. The cable requirements are defined not only by the AC characteristics and the data rate, but also by the C resistance. The maximum resistance must be such that the minimum voltage across any receiver inputs is never less than 2 mv. The ground terminals of each driver and receiver in Figure 8 must be connected together by a dedicated wire (or the shield) in the cable so as to provide a common reference. Chassis grounds or power line grounds should not be relied on for this common connection as they may generate significant common mode differences. Additionally, they usually do not provide a sufficiently low impedance at the frequencies of interest. Additional Modes of Operation If compliance with EIA422A or EIA423A Standard is not required in a particular application, the AM26LS3 can be operated in two other modes. ) The device may be operated in the differential mode (Pin 4 = ) with VEE connected to any voltage between ground and 5.25 V. Outputs in the low state will be referenced to VEE, resulting in a differential output voltage greater than that shown in Figure 6. The Enable pins will operate the same as previously described. 2) The device may be operated in the singleended mode (Pin 4 = ) with VEE connected to any voltage between ground and 5.25 V. Outputs in the high state will be at a voltage as shown in Figure, while outputs in a low state will be referenced to VEE. Termination esistors Transmission line theory states that, in order to preserve the shape and integrity of a waveform traveling along a cable, the cable must be terminated in an impedance equal to its characteristic impedance. In a system such as that depicted in Figure 7, in which data can travel in both directions, both physical ends of the cable must be terminated. Stubs leading to each receiver and driver should be as short as possible. In a system such as that depicted in Figure 8, in which data normally travels in one direction only, a terminator is theoretically required only at the receiving end of the cable. However, if the cable is in a location where noise spikes of several volts can be induced onto it, then a terminator (preferably a series resistor) should be placed at the driver end to prevent damage to the driver. Leaving off the terminations will generally result in reflections which can have amplitudes of several volts above or several volts below ground or VEE. These overshoots/undershoots can disrupt the driver and/or receiver, create false data, and in some cases, damage components on the bus. MOTOOLA ANALOG IC EVICE ATA

11 AM26LS3 Figure 7. EIA422A Example En En T En En En T En Twisted Pair NOTES:. Terminating resistors T should be located at the physical ends of the cable. 2. Stubs should be as short as possible. 3. eceivers = AM26LS32, MC3486, SN7573 or SN Circuit grounds must be connected together through a dedicated wire. Figure 8. EIA423A Example CC T + CC T + CC T + CC T + AM26LS3 AM26LS32, MC3486, SN7573, or SN7575 MOTOOLA ANALOG IC EVICE ATA

12 AM26LS3 OUTLINE IMENSIONS PC SUFFI PLASTIC PACKAGE CASE 6488 ISSUE 6 H A 8 G F 9 6 PL B S C K.25 (.) M T SEATING T PLANE A M J L M NOTES:. IMENSIONING AN TOLEANCING PE ANSI Y4.5M, CONTOLLING IMENSION: INCH. 3. IMENSION L TO CENTE OF LEAS WHEN FOME PAALLEL. 4. IMENSION B OES NOT INCLUE MOL FLASH. 5. OUNE CONES OPTIONAL. INCHES MILLIMETES IM MIN MA MIN MA A B C F G. BSC 2.54 BSC H.5 BSC.27 BSC J K L M S T SEATING PLANE G A 6 PL K B P 8 PL.25 (.) M B S C.25 (.) M T B S A S SUFFI PLASTIC PACKAGE CASE 75B5 (SO6) ISSUE J M 45 J F NOTES:. IMENSIONING AN TOLEANCING PE ANSI Y4.5M, CONTOLLING IMENSION: MILLIMETE. 3. IMENSIONS A AN B O NOT INCLUE MOL POTUSION. 4. MAIMUM MOL POTUSION.5 (.6) PE SIE. 5. IMENSION OES NOT INCLUE AMBA POTUSION. ALLOWABLE AMBA POTUSION SHALL BE.27 (.5) TOTAL IN ECESS OF THE IMENSION AT MAIMUM MATEIAL CONITION. MILLIMETES INCHES IM MIN MA MIN MA A B C F G.27 BSC.5 BSC J K M 7 7 P MOTOOLA ANALOG IC EVICE ATA

13 AM26LS3 OUTLINE IMENSIONS FN SUFFI PLASTIC PACKAGE CASE 7752 ISSUE C B.7 (.8) M T LM S N S N Y BK U.7 (.8) M T LM S N S L M W 2 G. (.25) S T LM S N S V VIEW A.7 (.8) M T LM S N S.7 (.8) M T LM S N S H.7 (.8) M T LM S N S C E K G G. (.25) S T LM S N S.4 (.) J T SEATING PLANE VIEW S K VIEW S F.7 (.8) M T LM S N S NOTES:. ATUMS L, M, AN N ETEMINE WHEE TOP OF LEA SHOULE EITS PLASTIC BOY AT MOL PATING LINE. 2. IMENSION G, TUE POSITION TO BE MEASUE AT ATUM T, SEATING PLANE. 3. IMENSIONS AN U O NOT INCLUE MOL FLASH. ALLOWABLE MOL FLASH IS. (.25) PE SIE. 4. IMENSIONING AN TOLEANCING PE ANSI Y4.5M, CONTOLLING IMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLE THAN THE PACKAGE BOTTOM BY UP TO.2 (.3). IMENSIONS AN U AE ETEMINE AT THE OUTEMOST ETEMES OF THE PLASTIC BOY ECLUSIVE OF MOL FLASH, TIE BA BUS, GATE BUS AN INTELEA FLASH, BUT INCLUING ANY MISMATCH BETWEEN THE TOP AN BOTTOM OF THE PLASTIC BOY. 7. IMENSION H OES NOT INCLUE AMBA POTUSION O INTUSION. THE AMBA POTUSION(S) SHALL NOT CAUSE THE H IMENSION TO BE GEATE THAN.37 (.94). THE AMBA INTUSION(S) SHALL NOT CAUSE THE H IMENSION TO BE SMALLE THAN.25 (.635). INCHES MILLIMETES IM MIN MA MIN MA A B C E F G.5 BSC.27 BSC H J.2.5 K U V W Y G K.4.2 MOTOOLA ANALOG IC EVICE ATA 3

14 AM26LS3 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters can and do vary in different applications. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUOPE: Motorola Literature istribution; JAPAN: Nippon Motorola Ltd.; TatsumiSPJLC, Toshikatsu Otsuki, P.O. Box 292; Phoenix, Arizona F SeibuButsuryuCenter, 342 Tatsumi KotoKu, Tokyo 35, Japan MFA: MFA@ .sps.mot.com TOUCHTONE (62) HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, INTENET: 5 Ting Kok oad, Tai Po, N.T., Hong Kong MOTOOLA ANALOG IC EVICE AM26LS3/ ATA

15 This datasheet has been download from: atasheets for electronics components.