Machine Language to Assembly Language Conversion Table
|
|
|
- Clyde Chambers
- 7 years ago
- Views:
Transcription
1 Machine Language to Assembly Language Conversion Table 1 Mode 00 * 01 NOP No operation Inherent 1 02 * 03 * 04 * 05 * 06 TAP Transfer from accumulator A to process code register Number Inherent 1 07 TPA Transfer from process code Inherent 1 register to accumulator A 08 INX Increment index register Inherent 1 09 DEX Decrement index register Inherent 1 0A CLV Clear 2's complement overflow Inherent 1 bit 0B SEV Set 2's complement overflow Inherent 1 bit 0C CLC Clear carry Inherent 1 0D SEC Set carry Inherent 1 0E CLI Clear interrupt mask Inherent 1 0F SEI Set interrupt mask Inherent 1 10 SBA Subtract accumulator Inherent 1 11 CBA Compare accumulator Inherent 1 12 * 13 * 14 * 15 * 16 TAB Transfer from A to B Inherent 1 17 TBA Transfer from B to A Inherent 1 18 * 19 DAA Decimal Adjust (A) Inherent 1 1A * 1B ADA Add B to A Inherent 1 1C * 1D * 1E * 1F * 20 BRA Branch always Relative 2 21 * 23 BLS Branch if lower or same Relative 2 24 BCC Branch if carry clear Relative 2 25 BCS Branch if carry set Relative 2 26 BNE Branch if not equal Relative 2 27 BEQ Branch if equal Relative 2 28 BVC Branch if overflow clear Relative 2 29 BVS Branch if overflow set Relative 2 2A BPL Branch if plus Relative 2 2B BMI Branch if minus Relative 2 2C BGE Branch if greater than zero Relative 2 or equal to 2D BLT Branch if less than zero Relative 2 2E BGT Branch if greater than zero Relative 2 2F BLE Branch if less than zero or Relative equal to 2
2 Machine Language to Assembly Language Conversion Table (continued) 2 Mode Number 30 TSX Transfer from stack pointer Inherent 1 to index register 31 INS Increment stack pointer Inherent 1 32 PUL(A) Pull data from stack 1 33 PUL(B) Pull -data from stack 1 34 DES Decrement stack pointer Inherent 1 35 TXS Transfer from index register Inherent 1 to stack pointer 36 PSH(A) Push data on stack 1 37 PSH(B) Push data on stack 1 38 * 39 RTS Return from subroutine Inherent 1 3A * 3B RTI Return from interrupt Inherent 1 3C * 3D * 3E WAI Wait for interrupt Inherent 1 3F SWI Software interrupt Inherent 1 40 NEG(A) Negate 1 41 * 42 * 43 COM(A) Complement 1 44 LSR(A) Logical shift right 1 45 * 46 ROR(A) Rotate right 1 47 ASR(A) Arithmetic right shift 1 48 ASL(A) Arithmetic shift left 1 49 ROL(A) Rotate left 1 4A DEC(A) Decrement 1 4B * 4C INC(A) Increment 1 4D TST(A) Test 1 4E * 4F CLR(A) Clear 1 50 NEG(B) Negate 1 51 * 52 * 53 COM(B) Complement 1 54 LSR(B) Logical shift right 1 55 * 56 ROR(B) Rotate right 1 57 ASR(B) Arithmetic shift right 1 58 ASL(B) Arithmetic shift left 1 59 ROL(B) Rotate left 1 5A DEC(B) Decrement 1 5B * 5C INC(B) Increment 1 5D TST(B) Test 1 5E * 5F CLR(B) Clear 1
3 Machine Language to Assembly Language Conversion Table (continued) 3 Mode Number 60 NEG Negate Indexed 2 61 * 62 * 63 COM Complement Indexed 2 64 LSR Logical shift right Indexed 2 65 * 66 ROR Rotate Right Indexed 2 67 ASR Arithmetic shift right Indexed 2 68 ASL Arithmetic shift left Indexed 2 69 ROL Rotate left Indexed 2 6A DEC Decrement Indexed 2 6B * 6C INC Increment Indexed 2 6D TST Test Indexed 2 6E JMP Jump Indexed 2 6F CLR Clear Indexed 2 70 NEG Negate Extended 3 71 * 72 * 73 COM Complement Extended 3 74 LSR Logical shift right Extended 3 9F STS Store stack pointer Direct 2 A0 SUB(A) Subtract Indexed 2 A1 CMP(A) Compare Indexed 2 A2 SBC(A) Subtract with carry Indexed 2 A3 * A4 AND(A) Logical AND Indexed 2 A5 BIT(A) Bit test Indexed 2 A6 LDA(A) Load accumulator Indexed 2 A7 STA(A) Store accumulator Indexed 2 A8 EOR(A) Exclusive OR Indexed 2 A9 ADC(A) Add with carry Indexed 2 AA ORA(A) Inclusive OR Indexed 2 AB ADD(A) Add without carry Indexed 2 AC CPX Compare index register Indexed 2 AD JSR Jump to subroutine Indexed 2 AE LDS Load stack pointer Indexed 2 AF STS Store stack pointer Indexed 2 B0 SUB(A) Subtract Extended 3 B1 CMP(A) Compare Extended 3 B2 SBC(A) Subtract with carry Extended 3 B3 * B4 AND(A) Logical AND Extended 3 B5 BIT(A) Bit test Extended 3 B6 LDA(A) Load accumulator Extended 3 B7 STA(A) Store accumulator Extended 3 B8 EOR(A) Exclusive OR Extended 3 B9 ADC(A) Add with carry Extended 3 BA ORA(A) Inclusive OR Extended 3 BB ADD(A) Add without carry Extended 3 BC CPX Compare index register Extended 3 BD JSR Jump to subroutine Extended 3 BE LDS(A) Load stack pointer Extended 3 BF STS(A) Store stack pointer Extended 3
4 Machine Language to Assembly Language Conversion Table (continued) 4 Mode Number C0 SUM(B) Subtract Immediate 3 C1 CMP(B) Compare Immediate 2 C2 SBC(B) Subtract with carry Immediate 2 C3 * C4 AND(B) Logical AND Immediate 2 C5 BIT(B) Bit test Immediate 2 C6 LDA(B) Load accumulator Immediate 2 C7 * C8 EOR(B) Exclusive OR Immediate 2 C9 ADC(B) Add with carry Immediate 2 CA ORA(B) Inclusive OR Immediate 2 CB ADD(B) Add without carry Immediate 2 CC * CD * CE LDX Load index register Immediate 3 CF * D0 SUB(B) Subtract Direct 2 D1 CMP(B) Compare Direct 2 D2 SBC(B) Subtract with carry Direct 2 D3 * D4 AND(B) Logical AND Direct 2 D5 BIT(B) Bit test Direct 2 D6 LDA(B) Load accumulator Direct 2 D7 STA(B) Store accumulator Direct 2 D8 EOR(B) Exclusive OR Direct 2 D9 ADC(B) Add with carry Direct 2 DA ORA(B) Inclusive OR Direct 2 DB ADD(B) Add without carry Direct 2 DC * DD * DE LDX Load index register Direct 2 DF STX Store index register Direct 2 E0 SUB(B) Subtract Indexed 2 E1 CMP(B) Compare Indexed 2 E2 SBC(B) Subtract with carry Indexed 2 E3 * E4 AND(B) Logical AND Indexed 2 E5 BIT(B) Bit test Indexed 2 E6 LDA(B) Load accumulator Indexed 2 E7 STAB) Store accumulator Indexed 2 E8 EOR(B) Exclusive OR Indexed 2 E9 ADC(B) Add with carry Indexed 2 EA ORA(B) Inclusive OR Indexed 2 EB ADD(B) Add without carry Indexed 2 EC * ED * EE LDX Load index register Indexed 2 EF STX Store index register Indexed 2
5 Machine Language to Assembly Language Conversion Table (continued) 5 Mode Number F0 SUB(B) Subtract Extended 3 F1 CMP(B) Compare Extended 3 F2 SBC(B) Subtract with carry Extended 3 F3 * F4 AND(B) Logical AND Extended 3 F5 BIT(B) Bit test Extended 3 F6 LDA(B) Load accumulator Extended 3 F7 STA(B) Store accumulator Extended 3 F8 EOR(B) Exclusive Extended 3 F9 ADC(B) Add with carry Extended 3 FA ORA(B) Inclusive OR Extended 3 FB ADD(B) Add without carry Extended 3 FC * FD * FE LDX Load index register Extended 3 FF STX Store index register Extended 3
6 Assembly Language to Machine Language Conversion Table 6 Mnemonic Hex Mnemonic Description Mode Number of Code Code Bytes ADA 1B Add B to A Inherent 1 ADC(A) A9 Add with carry Indexed 2 ADC(A) B9 Add with carry Extended 3 ADC(B) C9 Add with carry Immediate 2 ADC(B) D9 Add with carry Direct 2 ADC(B) E9 Add with carry Indexed 2 ADC(B) F9 Add with carry Extended 3 ADD(A) AB Add without carry Indexed 2 ADD(A) BB Add without carry Extended 3 ADD(B) CB Add without carry Immediate 2 ADD(B) DB Add without carry Direct 2 ADD(B) EB Add without carry Indexed 2 ADD(B) FB Add without carry Extended 3 AND(A) A4 Logical AND Indexed 2 AND(A) B4 Logical AND Extended 3 AND(B) C4 Logical AND Immediate 2 AND(B) D4 Logical AND Direct 2 AND(B) E4 Logical AND Indexed 2 AND(B) F4 Logical AND Extended 3 ASL 68 Arithmetic shift left Indexed 2 ASL(A) 48 Arithmetic shift left 1 ASL(B) 58 Arithmetic shift left 1 ASR 67 Arithmetic shift right Indexed 2 ASR(A) 47 Arithmetic right shift 1 ASR(B) 57 Arithmetic shift right 1 BCC 24 Branch if carry clear Relative 2 BCS 25 Branch if carry set Relative 2 BEQ 27 Branch if equal Relative 2 BGE 2C Branch if greater than zero Relative 2 or equal to BGT 2E Branch if greater than zero Relative 2 BHI 22 Branch if higher Relative 2 BIT(A) A5 Bit test Indexed 2 BIT(A) B5 Bit test Extended 3 BIT(B) C5 Bit test Immediate 2 BIT(B) D5 Bit test Direct 2 BIT(B) E5 Bit test Indexed 2 BIT(B) F5 Bit test Extended 3 BLE 2F Branch if less than zero or Relative 2 equal to BLS 23 Branch if lower or same Relative 2 BLT 2D Branch if less than zero Relative 2 BMI 2B Branch if minus Relative 2 BNE 26 Branch if not equal Relative 2 BPL 2A Branch if plus Relative 2 BRA 20 Branch always Relative 2 BVC 28 Branch if overflow clear Relative 2 BVS 29 Branch if overflow set Relative 2
7 Assembly Language to Machine Language Conversion Table (continued) 7 Mnemonic Hex Mnemonic Description Mode Number of Code Code Bytes CBA 11 Compare accumulator Inherent 1 CLC 0C Clear carry Inherent 1 CLI 0E Clear interrupt mask Inherent 1 CLR 6F Clear Indexed 2 CLR(A) 4F Clear 1 CLR(B) 5F Clear 1 CLV 0A Clear 2's complement overflow Inherent 1 bit CMP(A) A1 Compare Indexed 2 CMP(A) B1 Compare Extended 3 CMP(B) C1 Compare Immediate 2 CMP(B) D1 Compare Direct 2 CMP(B) E1 Compare Indexed 2 CMP(B) F1 Compare Extended 3 COM 63 Complement Indexed 2 COM 73 Complement Extended 3 COM(A) 43 Complement 1 COM(B) 53 Complement 1 CPX AC Compare index register Indexed 2 CPX BC Compare index register Extended 3 DAA 19 Decimal Adjust (A) Inherent 1 DEC 6A Decrement Indexed 2 DEC(A) 4A Decrement 1 DEC(B) 5A Decrement 1 DES 34 Decrement stack pointer Inherent 1 DEX 09 Decrement index register Inherent 1 EOR(A) A8 Exclusive OR Indexed 2 EOR(A) B8 Exclusive OR Extended 3 EOR(B) C8 Exclusive OR Immediate 2 EOR(B) D8 Exclusive OR Direct 2 EOR(B) E8 Exclusive OR Indexed 2 EOR(B) F8 Exclusive Extended 3 INC 6C Increment Indexed 2 INC(A) 4C Increment 1 INC(B) 5C Increment 1 INS 31 Increment stack pointer Inherent 1 INX 08 Increment index register Inherent 1 JMP 6E Jump Indexed 2 JSR AD Jump to subroutine Indexed 2 JSR BD Jump to subroutine Extended 3 LDA(A) A6 Load accumulator Indexed 2 LDA(A) B6 Load accumulator Extended 3 LDA(B) C6 Load accumulator Immediate 2 LDA(B) D6 Load accumulator Direct 2 LDA(B) E6 Load accumulator Indexed 2 LDA(B) F6 Load accumulator Extended 3 LDS AE Load stack pointer Indexed 2 LDS(A) BE Load stack pointer Extended 3
8 Assembly Language to Machine Language Conversion Table (continued) 8 Mnemonic Hex Mnemonic Description Mode Number of Code Code Bytes LDX CE Load index register Immediate 3 LDX DE Load index register Direct 2 LDX EE Load index register Indexed 2 LDX FE Load index register Extended 3 LSR 64 Logical shift right Indexed 2 LSR 74 Logical shift right Extended 3 LSR(A) 44 Logical shift right 1 LSR(B) 54 Logical shift right 1 NEG 60 Negate Indexed 2 NEG 70 Negate Extended 3 NEG(A) 40 Negate 1 NEG(B) 50 Negate 1 NOP 01 No operation Inherent 1 ORA(A) AA Inclusive OR Indexed 2 ORA(A) BA Inclusive OR Extended 3 ORA(B) CA Inclusive OR Immediate 2 ORA(B) DA Inclusive OR Direct 2 ORA(B) EA Inclusive OR Indexed 2 ORA(B) FA Inclusive OR Extended 3 PSH(A) 36 Push data on stack 1 PSH(B) 37 Push data on stack 1 PUL(A) 32 Pull data from stack 1 PUL(B) 33 Pull -data from stack 1 ROL 69 Rotate left Indexed 2 ROL(A) 49 Rotate left 1 ROL(B) 59 Rotate left 1 ROR 66 Rotate Right Indexed 2 ROR(A) 46 Rotate right 1 ROR(B) 56 Rotate right 1 RTI 3B Return from interrupt Inherent 1 RTS 39 Return from subroutine Inherent 1 SBA 10 Subtract accumulator Inherent 1 SBC(A) A2 Subtract with carry Indexed 2 SBC(A) B2 Subtract with carry Extended 3 SBC(B) C2 Subtract with carry Immediate 2 SBC(B) D2 Subtract with carry Direct 2 SBC(B) E2 Subtract with carry Indexed 2 SBC(B) F2 Subtract with carry Extended 3 SEC 0D Set carry Inherent 1 SEI 0F Set interrupt mask Inherent 1 SEV 0B Set 2's complement overflow Inherent 1 bit STA(A) A7 Store accumulator Indexed 2 STA(A) B7 Store accumulator Extended 3 STA(B) D7 Store accumulator Direct 2 STA(B) F7 Store accumulator Extended 3 STAB) E7 Store accumulator Indexed 2
9 Assembly Language to Machine Language Conversion Table (continued) 9 Mnemonic Hex Mnemonic Description Mode Number of Code Code Bytes STS AF Store stack pointer Indexed 2 STS 9F Store stack pointer Direct 2 STS(A) BF Store stack pointer Extended 3 STX DF Store index register Direct 2 STX EF Store index register Indexed 2 STX FF Store index register Extended 3 SUB(A) A0 Subtract Indexed 2 SUB(A) B0 Subtract Extended 3 SUB(B) D0 Subtract Direct 2 SUB(B) E0 Subtract Indexed 2 SUB(B) F0 Subtract Extended 3 SUM(B) C0 Subtract Immediate 3 SWI 3F Software interrupt Inherent 1 TAB 16 Transfer from A to B Inherent 1 TAP 06 Transfer from accumulator A Inherent 1 to process code register TBA 17 Transfer from B to A Inherent 1 TPA 07 Transfer from process code Inherent 1 register to accumulator A TST 6D Test Indexed 2 TST(A) 4D Test 1 TST(B) 5D Test 1 TSX 30 Transfer from stack pointer Inherent 1 to index register TXS 35 Transfer from index register Inherent 1 to stack pointer WAI 3E Wait for interrupt Inherent 1
M6800. Assembly Language Programming
M6800 Assembly Language Programming 1 3. MC6802 MICROPROCESSOR MC6802 microprocessor runs in 1MHz clock cycle. It has 64 Kbyte memory address capacity using 16-bit addressing path (A0-A15). The 8-bit data
Programming the Motorola MC68HC11 Microcontroller
Programming the Motorola MC68HC11 Microcontroller CONTENTS: COMMON PROGRAM INSTRUCTIONS WITH EXAMPLES MEMORY LOCATIONS PORTS SUBROUTINE LIBRARIES PARALLEL I/O CONTROL REGISTER (PIOC) COMMON PROGRAM INSTRUCTIONS
Lecture 3 Addressing Modes, Instruction Samples, Machine Code, Instruction Execution Cycle
Lecture 3 Addressing Modes, Instruction Samples, Machine Code, Instruction Execution Cycle Contents 3.1. Register Transfer Notation... 2 3.2. HCS12 Addressing Modes... 2 1. Inherent Mode (INH)... 2 2.
6800 Basics. By Ruben Gonzalez
6800 Basics By Ruben Gonzalez 6800 Processor Uses 8 bit words Has addressable main memory of 64k Has Memory Mapped I/O and interrupts The 6800 has the following main registers: 8- bit Accumulator A (AccA)
HC12 Assembly Language Programming
HC12 Assembly Language Programming Programming Model Addressing Modes Assembler Directives HC12 Instructions Flow Charts 1 Assembler Directives In order to write an assembly language program it is necessary
How To Understand All Instructions In The Power12 Program
Module Introduction PURPOSE: The intent of this module is to present all CPU12 instructions to better prepare you to write short routines in assembly language. OBJECTIVES: - Discuss all CPU12 instruction
Visa Smart Debit/Credit Certificate Authority Public Keys
CHIP AND NEW TECHNOLOGIES Visa Smart Debit/Credit Certificate Authority Public Keys Overview The EMV standard calls for the use of Public Key technology for offline authentication, for aspects of online
The stack and the stack pointer
The stack and the stack pointer If you google the word stack, one of the definitions you will get is: A reserved area of memory used to keep track of a program's internal operations, including functions,
Microcontroller Basics A microcontroller is a small, low-cost computer-on-a-chip which usually includes:
Microcontroller Basics A microcontroller is a small, low-cost computer-on-a-chip which usually includes: An 8 or 16 bit microprocessor (CPU). A small amount of RAM. Programmable ROM and/or flash memory.
Introduction to Microcontrollers
Introduction to Microcontrollers Motorola M68HC11 Specs Assembly Programming Language BUFFALO Topics of Discussion Microcontrollers M68HC11 Package & Pinouts Accumulators Index Registers Special Registers
STANDARD ASCII NULL START OF HEADING START OF TEXT END OF TEXT END OF TRANSMISSION ENQUIRY ACKNOWLEDGE BELL BACKSPACE HORIZ.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F Uppercase/Graphics
How To Write A Microsoft Microsoft 8D (Droid) (Program) (Powerbook) (I386) (Microsoft) (Donga) (Opera) And (Dungeo) (Dugeo
CPU08 Central Processor Unit Reference Manual M68HC08 Microcontrollers CPU08RM Rev. 02/2006 freescale.com CPU08 Central Processor Unit Reference Manual To provide the most up-to-date information, the
Programmer s Model = model of µc useful to view hardware during execution of software instructions
HC12/S12 Programmer s Model Programmer s Model = model of µc useful to view hardware during execution of software instructions Recall: General Microcontroller/Computer Architecture note: Control Unit &
SERVER CERTIFICATES OF THE VETUMA SERVICE
Page 1 Version: 3.4, 19.12.2014 SERVER CERTIFICATES OF THE VETUMA SERVICE 1 (18) Page 2 Version: 3.4, 19.12.2014 Table of Contents 1. Introduction... 3 2. Test Environment... 3 2.1 Vetuma test environment...
URL encoding uses hex code prefixed by %. Quoted Printable encoding uses hex code prefixed by =.
ASCII = American National Standard Code for Information Interchange ANSI X3.4 1986 (R1997) (PDF), ANSI INCITS 4 1986 (R1997) (Printed Edition) Coded Character Set 7 Bit American National Standard Code
THUMB Instruction Set
5 THUMB Instruction Set This chapter describes the THUMB instruction set. Format Summary 5-2 Opcode Summary 5-3 5. Format : move shifted register 5-5 5.2 Format 2: add/subtract 5-7 5.3 Format 3: move/compare/add/subtract
SERVER CERTIFICATES OF THE VETUMA SERVICE
Page 1 Version: 3.5, 4.11.2015 SERVER CERTIFICATES OF THE VETUMA SERVICE 1 (18) Page 2 Version: 3.5, 4.11.2015 Table of Contents 1. Introduction... 3 2. Test Environment... 3 2.1 Vetuma test environment...
Advanced Encryption Standard by Example. 1.0 Preface. 2.0 Terminology. Written By: Adam Berent V.1.7
Written By: Adam Berent Advanced Encryption Standard by Example V.1.7 1.0 Preface The following document provides a detailed and easy to understand explanation of the implementation of the AES (RIJNDAEL)
Advanced Encryption Standard by Example. 1.0 Preface. 2.0 Terminology. Written By: Adam Berent V.1.5
Written By: Adam Berent Advanced Encryption Standard by Example V.1.5 1.0 Preface The following document provides a detailed and easy to understand explanation of the implementation of the AES (RIJNDAEL)
Microprocessor/Microcontroller. Introduction
Microprocessor/Microcontroller Introduction Microprocessor/Microcontroller microprocessor - also known as a CU or central processing unit - is a complete computation engine that is fabricated on a single
USB HID to PS/2 Scan Code Translation Table
Key Name HID Usage Page HID Usage ID PS/2 Set 1 Make* PS/2 Set 1 Break* PS/2 Set 2 Make PS/2 Set 2 Break System Power 01 81 E0 5E E0 DE E0 37 E0 F0 37 System Sleep 01 82 E0 5F E0 DF E0 3F E0 F0 3F System
Appendix C: Keyboard Scan Codes
Thi d t t d ith F M k 4 0 2 Appendix C: Keyboard Scan Codes Table 90: PC Keyboard Scan Codes (in hex) Key Down Up Key Down Up Key Down Up Key Down Up Esc 1 81 [ { 1A 9A, < 33 B3 center 4C CC 1! 2 82 ]
The ASCII Character Set
The ASCII Character Set The American Standard Code for Information Interchange or ASCII assigns values between 0 and 255 for upper and lower case letters, numeric digits, punctuation marks and other symbols.
WHAT IS MACHINE LANGUAGE?
WHAT IS MACHINE LANGUAGE? At the heart of every microcomputer, is a central microprocessor. It's a very special microchip which is the "brain" of the computer. The Commodore 64 is no exception. Every microprocessor
Z80 Instruction Set. Z80 Assembly Language
75 Z80 Assembly Language The assembly language allows the user to write a program without concern for memory addresses or machine instruction formats. It uses symbolic addresses to identify memory locations
U:\montages\dominique\servo\moteur_AV_AR\program\moteur_AV_AR.asm jeudi 28 avril 2011 10:32
Norton Junior Moteur PWM AV - AR pour SLE BRESSUIRE PORTA ------------------------------------------------------- 0 = Entrée Servo 1 = PWM moteur 2 = Strap mode 3 = 4 = 5 = Relay AV - AR $Include 'C:\pemicro\ics08qtqyz\qtqy_registers.inc'
SL-8800 HDCP 2.2 and HDCP 1.x Protocol Analyzer for HDMI User Guide
SL-8800 HDCP 2.2 and HDCP 1.x Protocol Analyzer for HDMI Simplay-UG-02003-A July 2015 Contents 1. Overview... 4 1.1. SL-8800 HDCP Protocol Analyzer Test Equipment... 4 1.2. HDCP 2.2/HDCP 1.x Protocol Analyzer
Pattern Co. Monkey Trouble Wall Quilt. Size: 48" x 58"
.............................................................................................................................................. Pattern Co..........................................................................................
ASCII CODES WITH GREEK CHARACTERS
ASCII CODES WITH GREEK CHARACTERS Dec Hex Char Description 0 0 NUL (Null) 1 1 SOH (Start of Header) 2 2 STX (Start of Text) 3 3 ETX (End of Text) 4 4 EOT (End of Transmission) 5 5 ENQ (Enquiry) 6 6 ACK
How to create OpenDocument URL s with SAP BusinessObjects BI 4.0
How to create OpenDocument URL s with SAP BusinessObjects BI 4.0 Creator: Twitter: Blog: Pieter Verstraeten http://www.twitter.com/pverstraeten http://www.pieterverstraeten.com/blog Hi, Thanks for downloading
HTML Codes - Characters and symbols
ASCII Codes HTML Codes Conversion References Control Characters English version Versión español Click here to add this link to your favorites. HTML Codes - Characters and symbols Standard ASCII set, HTML
MACHINE ARCHITECTURE & LANGUAGE
in the name of God the compassionate, the merciful notes on MACHINE ARCHITECTURE & LANGUAGE compiled by Jumong Chap. 9 Microprocessor Fundamentals A system designer should consider a microprocessor-based
AN2183. Using FLASH as EEPROM on the MC68HC908GP32. Introduction. Semiconductor Products Sector Application Note
Order this document by /D Semiconductor Products Sector Application Note Using FLASH as EEPROM on the MC68HC908GP32 By Derrick H.J. Klotz Field Applications Engineer Toronto, Canada Introduction This application
Luxembourg (Luxembourg): Trusted List
Luxembourg (Luxembourg): Trusted List Institut Luxembourgeois de la Normalisation, de l'accréditation de la Sécurité et qualité des produits et services Scheme Information TSL Version 4 TSL Sequence Number
BCD (ASCII) Arithmetic. Where and Why is BCD used? Packed BCD, ASCII, Unpacked BCD. BCD Adjustment Instructions AAA. Example
BCD (ASCII) Arithmetic We will first look at unpacked BCD which means strings that look like '4567'. Bytes then look like 34h 35h 36h 37h OR: 04h 05h 06h 07h x86 processors also have instructions for packed
Application Note RMF Magic 5.1.0: EMC Array Group and EMC SRDF/A Reporting. July 2009
Application Note RMF Magic 5.1.0: EMC Array Group and EMC SRDF/A Reporting July 2009 Summary: This Application Note describes the new functionality in RMF Magic 5.1 that enables more effective monitoring
Call Subroutine (PC<15:0>) TOS, (W15)+2 W15 (PC<23:16>) TOS, Process data. Write to PC NOP NOP NOP NOP
Section 3. Descriptions CALL Call Subroutine Syntax: {label:} CALL lit23 CALL.S Operands: lit23 [0... 8388606] (PC)+4 PC, (PC) TOS, (W15)+2 W15 (PC) TOS, (W15)+2 W15 lit23 PC, NOP Register.
0242-1. HSR TRAINING COURSE REQUIREMENTS HSR Training Course Guidance Booklet 2
0242-1 HSR TRAINING COURSE REQUIREMENTS HSR Training Course Guidance Booklet 2 SafeWork SA 2 Contents Introduction... 4 Learning resources... 4 PART 1 UNDERPINNING PRINCIPLES FOR THE DEVELOPMENT OF A SAFEWORK
Rijndael Encryption implementation on different platforms, with emphasis on performance
Rijndael Encryption implementation on different platforms, with emphasis on performance KAFUUMA JOHN SSENYONJO Bsc (Hons) Computer Software Theory University of Bath May 2005 Rijndael Encryption implementation
8085 INSTRUCTION SET
DATA TRANSFER INSTRUCTIONS Opcode Operand Description 8085 INSTRUCTION SET INSTRUCTION DETAILS Copy from source to destination OV Rd, Rs This instruction copies the contents of the source, Rs register
Service Instruction. 1.0 SUBJECT: ECi Accessory Cases for Lycoming 4-Cylinder engines with single magneto configurations and TITAN 361 Engines
Title: Service Instruction ECi Accessory Cases Installed on Engines S.I. No.: 03-1 Page: 1 of 7 Issued: 2/28/2003 Revision: 2 (4/13/2009) Technical Portions are FAA DER Approved. 1.0 SUBJECT: ECi Accessory
3. April 2013 IT ZERTIFIKATE. Zertifizierungsstellen / Certification Center. IT Sicherheit UNTERNEHMENSBEREICH IT
IT Sicherheit UNTERNEHMENSBEREICH IT IT ZERTIFIKATE 3. April 2013 Zertifizierungsstellen / Certification Center D-TRUST D-Trust Root Class 2 CA2007 Aussteller/Issuer: D-TRUST Root Class 2 CA 2007 Gültig
CROSS REFERENCE. Cross Reference Index 110-122. Cast ID Number 110-111 Connector ID Number 111 Engine ID Number 112-122. 2015 Ford Motor Company 109
CROSS REFERENCE Cross Reference Index 110-122 Cast ID Number 110-111 Connector ID Number 111 112-122 2015 Ford Motor Company 109 CROSS REFERENCE Cast ID Number Cast ID Ford Service # MC Part # Part Type
Community College of Philadelphia Calling Code 218 Employer Scan Client Approved: November 17, 2005 Region (CIRCLE) City MSA
Community College of Philadelphia Calling Code 218 Employer Scan Client Approved: November 17, 2005 Region (CIRCLE) City MSA Zip V0 V1 V2 Month/ Day/ Year of Contact: Business Name: Address: V3 City: V4
EMV (Chip-and-PIN) Protocol
EMV (Chip-and-PIN) Protocol Märt Bakhoff December 15, 2014 Abstract The objective of this report is to observe and describe a real world online transaction made between a debit card issued by an Estonian
68HC11 Programmer s Reference Manual
8HC11 Programmer s Reference Manual Phillip Musumeci p.musumeci@ieee.org November 1999 Version 1. Credits Engineer proofreading: Dr. Barbara La Scala; Cross Assembler for 8HC11: Motorola; University of
The 68000's Instruction Set
The 68000's Instruction Set We have included this appendix to save you the task of having to turn to secondary material when writing 68000 assembly language programs. Since most programmers are not interested
Freescale Semiconductor, I
nc. Reference Guide CU12RG/D Rev. 2, 11/2001 CU12 Reference Guide (for HCS12 and original M68HC12) 7 15 15 15 15 15 A 0 D X Y S C 7 B S X H I N Z V C 0 0 0 0 0 0 8-BIT ACCUMULATRS A AND B R 16-BIT DUBLE
Baseball Pitch Speedometer
Freescale Semiconductor Application Note Rev, 05/005 Baseball Pitch Speedometer by: Carlos Miranda, Systems and Applications Engineer and David Heeley, Systems and Applications Mechanical Engineer INTRODUCTION
1 Classical Universal Computer 3
Chapter 6: Machine Language and Assembler Christian Jacob 1 Classical Universal Computer 3 1.1 Von Neumann Architecture 3 1.2 CPU and RAM 5 1.3 Arithmetic Logical Unit (ALU) 6 1.4 Arithmetic Logical Unit
Parallax Serial LCD 2 rows x 16 characters Non-backlit (#27976) 2 rows x 16 characters Backlit (#27977) 4 rows x 20 characters Backlit (#27979)
599 Menlo Drive, Suite 100 Rocklin, California 95765, USA Office: (916) 624-8333 Fax: (916) 624-8003 General: info@parallax.com Technical: support@parallax.com Web Site: www.parallax.com Educational: www.stampsinclass.com
KALE: A High-Degree Algebraic-Resistant Variant of The Advanced Encryption Standard
KALE: A High-Degree Algebraic-Resistant Variant of The Advanced Encryption Standard Dr. Gavekort c/o Vakiopaine Bar Kauppakatu 6, 41 Jyväskylä FINLAND mjos@iki.fi Abstract. We have discovered that the
The x86 PC: Assembly Language, Design, and Interfacing 5 th Edition
Online Instructor s Manual to accompany The x86 PC: Assembly Language, Design, and Interfacing 5 th Edition Muhammad Ali Mazidi Janice Gillispie Mazidi Danny Causey Prentice Hall Boston Columbus Indianapolis
LABORATORY MANUAL EE0310 MICROPROCESSOR & MICROCONTROLLER LAB
LABORATORY MANUAL EE0310 MICROPROCESSOR & MICROCONTROLLER LAB DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING FACULTY OF ENGINEERING & TECHNOLOGY SRM UNIVERSITY, Kattankulathur 603 203 1 LIST OF EXEPRIMENTS
MICROPROCESSOR. Exclusive for IACE Students www.iace.co.in iacehyd.blogspot.in Ph: 9700077455/422 Page 1
MICROPROCESSOR A microprocessor incorporates the functions of a computer s central processing unit (CPU) on a single Integrated (IC), or at most a few integrated circuit. It is a multipurpose, programmable
How It All Works. Other M68000 Updates. Basic Control Signals. Basic Control Signals
CPU Architectures Motorola 68000 Several CPU architectures exist currently: Motorola Intel AMD (Advanced Micro Devices) PowerPC Pick one to study; others will be variations on this. Arbitrary pick: Motorola
NEOSHO COUNTY COMMUNITY COLLEGE MASTER COURSE SYLLABUS. Medical Administrative Aspects
NEOSHO COUNTY COMMUNITY COLLEGE MASTER COURSE SYLLABUS COURSE IDENTIFICATION Course Code/Number: ALMA 120 Course Title: Medical Administrative Aspects Division: Applied Science (AS) Liberal Arts (LA) Workforce
DATING YOUR GUILD 1952-1960
DATING YOUR GUILD 1952-1960 YEAR APPROXIMATE LAST SERIAL NUMBER PRODUCED 1953 1000-1500 1954 1500-2200 1955 2200-3000 1956 3000-4000 1957 4000-5700 1958 5700-8300 1959 12035 1960-1969 This chart displays
Unpacked BCD Arithmetic. BCD (ASCII) Arithmetic. Where and Why is BCD used? From the SQL Server Manual. Packed BCD, ASCII, Unpacked BCD
BCD (ASCII) Arithmetic The Intel Instruction set can handle both packed (two digits per byte) and unpacked BCD (one decimal digit per byte) We will first look at unpacked BCD Unpacked BCD can be either
ASSEMBLY LANGUAGE PROGRAMMING (6800) (R. Horvath, Introduction to Microprocessors, Chapter 6)
ASSEMBLY LANGUAGE PROGRAMMING (6800) (R. Horvath, Introduction to Microprocessors, Chapter 6) 1 COMPUTER LANGUAGES In order for a computer to be able to execute a program, the program must first be present
Interrupts and the Timer Overflow Interrupts Huang Sections 6.1-6.4. What Happens When You Reset the HCS12?
Interrupts and the Timer Overflow Interrupts Huang Sections 6.1-6.4 o Using the Timer Overflow Flag to interrupt a delay o Introduction to Interrupts o How to generate an interrupt when the timer overflows
Application Note. General Description. AN991/D Rev. 1, 1/2002. Using the Serial Peripheral Interface to Communicate Between Multiple Microcomputers
Application Note Rev. 1, 1/2002 Using the Serial Peripheral Interface to Communicate Between Multiple Microcomputers General Description As the complexity of user applications increases, many designers
MOS T ic H N O LO O Y, INC. V A LLEY FORGE CORPORATE CENTER (216) 666 7950 950 RITTENHOUSE ROAD, NORRISTOWN, PA 19401
PR ELIM IN A R Y DATA SHEET MOS T ic H N O LO O Y, INC. V A LLEY FORGE CORPORATE CENTER (216) 666 7950 950 RITTENHOUSE ROAD, NORRISTOWN, PA 19401 M A Y, 1976 M C S6 5 0 0 M IC R O P R O C E S S O R S The
Apple II Technical Notes
Apple II Technical Notes Developer Technical Support #1: The GETLN Buffer and a ProDOS Clock Card Revised by: Matt Deatherage November 1988 Revised by: Pete McDonald November 1985 This Technical Note describes
Real-time system programs
by ORV BALCOM Simple Task Scheduler Prevents Priority Inversion Here is a method of task scheduling using a single interrupt that provides a deterministic approach to program timing and I/O processing.
MICROPROCESSOR AND MICROCOMPUTER BASICS
Introduction MICROPROCESSOR AND MICROCOMPUTER BASICS At present there are many types and sizes of computers available. These computers are designed and constructed based on digital and Integrated Circuit
Future Trends in Airline Pricing, Yield. March 13, 2013
Future Trends in Airline Pricing, Yield Management, &AncillaryFees March 13, 2013 THE OPPORTUNITY IS NOW FOR CORPORATE TRAVEL MANAGEMENT BUT FIRST: YOU HAVE TO KNOCK DOWN BARRIERS! but it won t hurt much!
IBM Emulation Mode Printer Commands
IBM Emulation Mode Printer Commands Section 3 This section provides a detailed description of IBM emulation mode commands you can use with your printer. Control Codes Control codes are one-character printer
T360 Barbecue. Assembly Manual. 85-3052-6 (G30531) Propane 1 YEAR LIMITED WARRANTY
T360 Barbecue Assembly Manual 85-3052-6 (G30531) Propane 1 YEAR LIMITED WARRANTY READ AND SAVE MANUAL FOR FUTURE REFERENCE. If pre-assembled, leave this manual with unit for consumer s future reference.
ASCII control characters (character code 0-31)
ASCII control characters (character code 0-31) DEC HEX 0 00 NUL Null char 1 01 SOH Start of Heading 2 02 STX Start of Text 3 03 ETX End of Text 4 04 EOT End of Transmission
Computer Science 281 Binary and Hexadecimal Review
Computer Science 281 Binary and Hexadecimal Review 1 The Binary Number System Computers store everything, both instructions and data, by using many, many transistors, each of which can be in one of two
PART B QUESTIONS AND ANSWERS UNIT I
PART B QUESTIONS AND ANSWERS UNIT I 1. Explain the architecture of 8085 microprocessor? Logic pin out of 8085 microprocessor Address bus: unidirectional bus, used as high order bus Data bus: bi-directional
"HIGHER EDUCATION VALUES AND OPINIONS SURVEY" ADVANCED PLACEMENT TEACHERS and GUIDANCE COUNSELORS May-June 1994
"HIGHER EDUCATION VALUES AND OPINIONS SURVEY" ADVANCED PLACEMENT TEACHERS and GUIDANCE COUNSELORS May-June 1994 VARIABLE SURVEY ANSWER NAME QUESTION CATEGORIES Facsimile the original mail questionnaire
PCL PC -8. PCL Symbol Se t: 12G Unicode glyph correspondence table s. Contact:help@redtitan.com http://pcl.to
PCL PC-8 Page 1 of 5 PCL Symbol Se t: 12G Unicode glyph correspondence table s. Contact:help@redtitan.com http://pcl.to -- -- -- -- $90 U00C9 Ê Uppercase e acute $21 U0021 Ë Exclamation $91 U00E6 Ì Lowerc
Scilab Textbook Companion for Digital Electronics: An Introduction To Theory And Practice by W. H. Gothmann 1
Scilab Textbook Companion for Digital Electronics: An Introduction To Theory And Practice by W. H. Gothmann 1 Created by Aritra Ray B.Tech Electronics Engineering NIT-DURGAPUR College Teacher Prof. Sabyasachi
How To Set The Sensor On A Powerpoint 3.5 (Powerpoint) On A Blackberry 2.5A (Powerplant) On An Iphone Or Ipad (Powerplant) On The Blackberry 3.2 (
VMBGPOD Touch panel with Oled display for VELBUS system 1 Binairy format: bits Description
Building A RISC Microcontroller in an FPGA
Building A RISC Microcontroller in an FPGA Name : Yap Zi He Course : 4 SEL Supervisor : PM Muhammad Mun im Ahmad Zabidi Introduction Reduce Instruction Set Computer (RISC) is a new trend on computer design.
Systems I: Computer Organization and Architecture
Systems I: Computer Organization and Architecture Lecture 2: Number Systems and Arithmetic Number Systems - Base The number system that we use is base : 734 = + 7 + 3 + 4 = x + 7x + 3x + 4x = x 3 + 7x
Geometry Handout 2 ~ Page 1
1. Given: a b, b c a c Guidance: Draw a line which intersects with all three lines. 2. Given: a b, c a a. c b b. Given: d b d c 3. Given: a c, b d a. α = β b. Given: e and f bisect angles α and β respectively.
ON-BOARDING TOOL USER GUIDE. HKEx Orion Market Data Platform Securities Market & Index Datafeed Products Mainland Market Data Hub (MMDH)
ON-BOARDING TOOL USER GUIDE HKEx Orion Market Data Platform Securities Market & Index Datafeed Products Mainland Market Data Hub (MMDH) Version 1.1 27 May 2013 Document History DOCUMENT HISTORY Distribution
A DIVISION OF THE MENO. Meno proposes a question: whether virtue can be taught. Three conversations or discussions following question
A DIVISION OF THE MENO 70A 70B-100B Meno proposes a question: whether virtue can be taught Three conversations or discussions following question 70B-80D Conversation on a question before Meno's: what is
MAC Address Management
D MAC Address Management Contents Overview.................................................... D-2.................................. D-3 Menu: Viewing the Switch s MAC Addresses.................... D-4
PROBLEMS (Cap. 4 - Istruzioni macchina)
98 CHAPTER 2 MACHINE INSTRUCTIONS AND PROGRAMS PROBLEMS (Cap. 4 - Istruzioni macchina) 2.1 Represent the decimal values 5, 2, 14, 10, 26, 19, 51, and 43, as signed, 7-bit numbers in the following binary
Decimal to Binary Conversion
Decimal to Binary Conversion A tool that makes the conversion of decimal values to binary values simple is the following table. The first row is created by counting right to left from one to eight, for
NEOSHO COUNTY COMMUNITY COLLEGE MASTER COURSE SYLLABUS. Medical Professional Issues
NEOSHO COUNTY COMMUNITY COLLEGE MASTER COURSE SYLLABUS COURSE IDENTIFICATION Course Code/Number: ALMA 110 Course Title: Medical Professional Issues Division: Applied Science (AS) Liberal Arts (LA) Workforce
US Code (Unofficial compilation from the Legal Information Institute)
US Code (Unofficial compilation from the Legal Information Institute) TITLE 26 - INTERNAL REVENUE CODE Subtitle D - Miscellaneous Excise Taxes CHAPTER 43 QUALIFIED PENSION, ETC., PLANS Please Note: This
A single register, called the accumulator, stores the. operand before the operation, and stores the result. Add y # add y from memory to the acc
Other architectures Example. Accumulator-based machines A single register, called the accumulator, stores the operand before the operation, and stores the result after the operation. Load x # into acc
COUNCIL OF INTERNATIONAL SCHOOLS (CIS) SCHOOL IMPROVEMENT THROUGH ACCREDITATION
COUNCIL OF INTERNATIONAL SCHOOLS (CIS) SCHOOL IMPROVEMENT THROUGH ACCREDITATION Guide to School Evaluation and Accreditation - 8 th Edition (Version 8.2) STANDARDS AND INDICATORS SECTION A SCHOOL GUIDING
EMDX3 Multifunction meter Cat No. 146 69 ModbusTable LGR EN v1.01.xls
GENERAL MODBUS TABLE ORGANIZATION Starting of the Starting of the Group s Group s System Version (Release) System Version (Build) Group Name (Text) Group Code Group Complexity Group Version 50512 C550
Computer Organization and Architecture
Computer Organization and Architecture Chapter 11 Instruction Sets: Addressing Modes and Formats Instruction Set Design One goal of instruction set design is to minimize instruction length Another goal
What to do when I have a load/store instruction?
76 What to do when I have a load/store instruction? Is there a label involved or a virtual address to compute? 1 A label (such as ldiq $T1, a; ldq $T0, ($T1);): a Find the address the label is pointing
Today. Binary addition Representing negative numbers. Andrew H. Fagg: Embedded Real- Time Systems: Binary Arithmetic
Today Binary addition Representing negative numbers 2 Binary Addition Consider the following binary numbers: 0 0 1 0 0 1 1 0 0 0 1 0 1 0 1 1 How do we add these numbers? 3 Binary Addition 0 0 1 0 0 1 1
South Texas Educational Technologies, Inc. TEL (956)969-3092 FAX (956)969-8614 Tomorrow s Education Today... 519 S. TEXAS BLVD WESLACO, TX 78596
South Texas Educational Technologies, Inc. TEL (956)969-3092 FAX (956)969-8614 Tomorrow s Education Today... 519 S. TEXAS BLVD WESLACO, TX 78596 The following documents are required for employment consideration.
Online EFFECTIVE AS OF JANUARY 2013
2013 A and C Session Start Dates (A-B Quarter Sequence*) 2013 B and D Session Start Dates (B-A Quarter Sequence*) Quarter 5 2012 1205A&C Begins November 5, 2012 1205A Ends December 9, 2012 Session Break
Instruction Set. Microcontroller Instruction Set. Instructions that Affect Flag Settings (1) The Instruction Set and Addressing Modes
Microcontroller For interrupt response time information, refer to the hardware description chapter. Instructions that ffect Flag Settings (1) Instruction Flag Instruction Flag C OV C C OV C DD X X X CLR
Common Licensing Technology Overview
Common Licensing Technology Overview Siemens PLM Software has developed a common license technology in response to customer requests for consistent licensing and a common license file as well as the Siemens
The colors in the Federal Standard set have no official names, just five-digit numbers. Any names given below are generic.
Federal Standard 595 Paint Spec Information The following information is made available to our customers as a reference point only. See below for how to request the 595 specification from the US Government.
Calculation of Valu-Trac Statuses
Calculation of Intrinsic Value Yield Latest Cash Earnings (Net Income + Depreciation and Amortization) (put aside) Dividend (subtract) Provision for Depreciation (Net Assets x Inflation Rate) (subtract)
How To Use A Powerpoint On A Microsoft Powerpoint 2.5 (Powerpoint 2) With A Microsatellite 2.2 (Powerstation 2) (Powerplant 2.3) (For Microsonde) (Micros
SIM2 Multimedia Nero 3D-1, Nero 3D-2, Nero 3D HB RS-232 Control Rev. 1.1 (17 January 2012) Contents Contents 2 1 Introduction 3 1.1 Setting up the RS-232C Serial connection........................... 3
Instruction Set Architecture
Instruction Set Architecture Consider x := y+z. (x, y, z are memory variables) 1-address instructions 2-address instructions LOAD y (r :=y) ADD y,z (y := y+z) ADD z (r:=r+z) MOVE x,y (x := y) STORE x (x:=r)