Vending Machine using Verilog
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1 Vending Machine using Verilog Ajay Sharma 3rd May 05
2 Contents 1 Introduction 2 2 Finite State Machine MOORE MEALY State Diagram Verilog Code of the Machine 6 4 TesT Bench 10 5 Output 14 6 Explaination of Output 17 1
3 Chapter 1 Introduction Vending Machine is a soft drink dispensor machine that dispenses drink based on the amount deposited in the machine. It accepts all the coins ie: Nickel(5 cents), Dime(10 cents), Quarter(25 cents). Till it recieves 40 cents it will not dispense anything. After it has recieved 40 cents it will dispense a softdrink. Any amount above that will be given back as a change. The diagram below is the block diagram of the vending machine.the inputs are the coins and the output is the drink. In the next chapter we will see the how we can encode the state machine in a state diagram and draw it. 2
4 Chapter 2 Finite State Machine Any Sequential digital circuit can be converted into a state machine using state diagram. In a State machine the circuit s output is defined in a different set of states ie. each output is a state. There is a State Register to hold the state of the machine and a nextstate logic to decode the nextstate. There is also a output register that defines the output of the machine. The nextstate logic is the sequential part of the machine and the Output and Currentstate are the Register part of the logic. There are two types of state machines: 1. MOORE 2. MEALY Lets see each: 2.1 MOORE In a moore machine the output state is totally dependent on the present state. The diagram shows the information. 3
5 2.2 MEALY In a mealy machine the output depends on the input as well as the present state. 2.3 State Diagram The State Diagram of the Vending Machine is given here. It has the following states: 1. State 1: reset 2. State 2: Five 3. State 3: Ten 4. State 4: Fifteen 5. State 5: Twenty 6. State 6: Twenty Five The next state is the Reset state again. The diagram is given below and is self explanatory. 4
6 What happens is whenever we get a coin we jump to the next state. So for example we get a coin from the reset state say a NICKEL, then we jump to the next state FIVE. Otherwise we stay in the same state. When we get Extra amount we come back to the reset state and the difference is given back to the user. In the next chapter we will see the Verilog Code for the Vending Machine/State Machine. 5
7 Chapter 3 Verilog Code of the Machine The code below is the verilog Code of the State Diagram. There are two parts to the code. The first being the Sequential Logic that decides where to go nex or the change in state. The second being the one that decides the Outputs of each state. The Code is as follows: \\*********************** \\***AUTHOR : AJAY SHARMA \\************************ \\please see the website: \\****************************** \\ \\****************************** \\for the entire source code of the machine \\module name module fsm(clock,reset,coin,vend,state,change); \\these are the inputs and the outputs. input clock; input reset; input [2:0]coin; output vend; output [2:0]state; output [2:0]change; 6
8 \\i need to define the registers as change,coin and vend reg vend; reg [2:0]change; wire [2:0]coin; \\my coins are declared as parameters to make reading better. parameter [2:0]NICKEL=3 b001; parameter [2:0]DIME=3 b010; parameter [2:0]NICKEL_DIME=3 b011; parameter [2:0]DIME_DIME=3 b100; parameter [2:0]QUARTER=3 b101; \\MY STATES ARE ALSO PARAMETERS. I DONT WANT TO MAKE YOU READ \\IN MACHINE LANGUAGE parameter [2:0]IDLE=3 b000; parameter [2:0]FIVE=3 b001; parameter [2:0]TEN=3 b010; parameter [2:0]FIFTEEN=3 b011; parameter [2:0]TWENTY=3 b100; parameter [2:0]TWENTYFIVE=3 b101; \\AS ALWAYS THE STATES ARE DEFINED AS REG reg [2:0]state,next_state; \\MY MACHINE WORKS ON STATE AND COIN or coin) begin next_state=0; \\VERYFIRST NEXT STATE IS GIVEN ZERO case(state) IDLE: case(coin) \\THIS IS THE IDLE STATE NICKEL: next_state=five; DIME: next_state=ten; QUARTER: next_state=twentyfive; default: next_state=idle; endcase FIVE: case(coin) \\THIS IS THE SECOND STATE 7
![I DONT WANT TO MAKE YOU READ \\IN MACHINE LANGUAGE parameter [2:0]IDLE=3 b000; parameter [2:0]FIVE=3 b001; parameter [2:0]TEN=3 b010; parameter [2:0]FIFTEEN=3 b011; parameter [2:0]TWENTY=3 b100;](/docs-images/46/21478443/images/page_8.jpg "parameter [2:0]TWENTYFIVE=3 b101; \\AS ALWAYS THE STATES ARE DEFINED AS REG reg [2:0]state,next_state; \\MY MACHINE WORKS ON STATE AND COIN always @(state or coin) begin next_state=0; \\VERYFIRST")
9 NICKEL: next_state=ten; DIME: next_state=fifteen; QUARTER: next_state=twentyfive; //change=nickel default: next_state=five; endcase TEN: case(coin) \\THIS IS THE THIRD STATE NICKEL: next_state=fifteen; DIME: next_state=twenty; QUARTER: next_state=twentyfive; //change=dime default: next_state=ten; endcase FIFTEEN: case(coin) \\THIS IS THE FOURTH STATE NICKEL: next_state=twenty; DIME: next_state=twentyfive; QUARTER: next_state=twentyfive; //change==nickel_dime default: next_state=fifteen; endcase TWENTY: case(coin) \\THIS IS THE FIFTH STATE NICKEL: next_state=twentyfive; DIME: next_state=twentyfive; //change=nickel QUARTER: next_state=twentyfive; //change==dime_dime default: next_state=twenty; endcase TWENTYFIVE: next_state=idle; \\THE NEXT STATE HERE IS THE RESET default : next_state=idle; endcase end begin \\WHENEVER I GIVE A RESET I HAVE TO MAKE THE STATE TO IDLE AND VEND TO 1 if(reset) begin state <= IDLE; vend <= 1 b0; // change <= 3 b000; end \\THE CHANGE ALSO HAS TO BECOME NONE else state <= next_state; 8
10 case (state) \\HERE WE DECIDE THE NEXT STATE \\ALL THE STATES ARE DEFINED HERE AND THE OUTPUT IS ALSO GIVEN IDLE: begin vend <= 1 b0; change <=3 d0; end FIVE: begin vend <= 1 b0; if (coin==quarter) change <=NICKEL; else change <=3 d TEN: begin vend <= 1 b0; if (coin==quarter) change <=DIME; else change <= 3 d FIFTEEN : begin vend <= 1 b0; if (coin==quarter) change <=NICKEL_DIME; else cha TWENTY : begin vend <= 1 b0; if (coin==dime) change <=NICKEL; else if (coin==qu TWENTYFIVE : begin vend <= 1 b1; change <=3 d0; end default: state <= IDLE; endcase end endmodule In the next chapter we see the Test Bench of the machine. 9
11 Chapter 4 TesT Bench We try to test the machine for the outputs. We add coins to the machine and see after which state does it give output or Softdrink. The testbench code is given below. \\AUTHOR: AJAY SHARMA \\PLEASE VISIT: \\FOR THE ENTIRE SOURCE CODE OF THE MACHINE. \\OK \\SO I HAVE TO INCLUDE THE STATEMACHINE VERILOG CODE \\IN THIS FILE SO THAT THE I CAN RUN IT AND TEST IT HERE. include "fsm2.v" \\THIS IS THE HIGHEST LEVEL OF THE MODULE: THE TEST BENCH. module test; \\THE INPUT IN THE FSM MODULE ARE REG HERE reg clock,reset; reg [2:0]coin; \\THE OUTPUT IN THE FSM MODULE ARE WIRES HERE wire vend; wire [2:0]state; wire [2:0]change; 10
12 \\THE PARAMETERS AGAIN FOR THE COIN AND STATE parameter [2:0]IDLE=3 b000; parameter [2:0]FIVE=3 b001; parameter [2:0]TEN=3 b010; parameter [2:0]FIFTEEN=3 b011; parameter [2:0]TWENTY=3 b100; parameter [2:0]TWENTYFIVE=3 b101; parameter [2:0]NICKEL=3 b001; parameter [2:0]DIME=3 b010; parameter [2:0]NICKEL_DIME=3 b011; parameter [2:0]DIME_DIME=3 b100; parameter [2:0]QUARTER=3 b101; \\I MONITOR THE TIME,DRINK,RESET,CLOCK,STATE AND CHANGE FOR CHANGES. initial begin $display("time\tcoin\tdrink\treset\tclock\tstate\tchange"); $monitor("%g\t%b\t%b\t%b\t%b\t%d\t%d",$time,coin,vend,reset,clock,state,change); \\NEW FEATURE: MY MACHINE HAS THE FACILITY TO DUMP VARIABLES SO THAT \\ I CAN VIEW THEM USING A VCD VIEWER. $dumpvars; $dumpfile("file.vcd"); // Dump output file. \\THIS IS WHERE THE COINS ARE ADDED. clock=0; reset=1; \\FIRST LETS RESET THE MACHINE coin=nickel; \\CHECK FOR STATE 1 #2 reset=1; coin=2 b00; coin=dime; \\RESET AGAIN AND CHECK FOR STATE 2 #2 reset=1; coin=2 b00; \\RESET AGAIN AND CHECK FOR STATE 5 11
13 coin=quarter; #2 reset=1; coin=2 b00; \\RESET AGAIN AND CHECK FOR STATE 5 coin=nickel; #2 reset=1; coin=2 b00; \\RESET AGAIN AND CHECK FOR STATE 5 AND SO ON coin=nickel; #2 coin=dime; #2 coin=dime; #2 reset=1; coin=2 b00; coin=nickel; #2 coin=dime; #2 coin=quarter; #2 reset=1; coin=2 b00; coin=nickel; #2 coin=dime; #2 reset=1; coin=2 b00; coin=nickel; #2 coin=dime; #2 reset=1; coin=2 b00; coin=nickel; #2 coin=quarter; 12
14 #2 reset=1; coin=2 b00; coin=nickel; #2 coin=quarter; #2 reset=1; coin=2 b00; #2 $finish; end \\THE CLOCK NEEDS TO TICK EVERY 2 TIME UNIT always #1 clock=~clock; // coin=!coin; initial begin if (reset) coin=2 b00; end \\THIS IS WHERE I INSTANTIATE THE MACHINE fsm inst1(clock,reset,coin,vend,state,change); endmodule 13
15 Chapter 5 Output This chapter describes the output of the machine GPLCVER_2.10c of 02/28/05 (Linux-elf). Copyright (c) Pragmatic C Software Corp. All Rights reserved. Licensed under the GNU General Public License (GPL). See the COPYING file for details. NO WARRANTY provided. Today is Wed May 11 03:36: Compiling source file "fsmtest2.v" Highest level modules: test Time coin drink reset clock state change x
16
17 Halted at location **fsmtest2.v(82) time 78 from call to $finish. There were 0 error(s), 0 warning(s), and 15 inform(s). 16
18 Chapter 6 Explaination of Output The Output is explained here. We start by adding coins. We start first with the least amount NICKEL. Then we reset the machine to see the output ie: state and the SOFTDRINK. Then we add a DIME and see the result. So on till till QUARTER is also added. Then i add a dime 5 times to see the output and it vends. ie. a softdrink is given. When i add an extra amount it gives a change also. so my machine works. The next page has the state diagram of the machine. 17
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