Low Phase Noise XO (for HF Fund. and 3 rd O.T.) XIN XOUT N/C N/C OE CTRL N/C (0,0) Pad #9 OUTSEL
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1 Reserved BUF BUF 62 mil Reserved Reserved FEATURES 100MHz to 200MHz Fund. or 3 rd OT Crystal. Output range: MHz (no multiplication). Available outputs: PECL, or LVDS. OESEL/OECTRL for both PECL & LVDS. Supports 2.5V or 3.3V-Power Supply. Available in die form. Die thickness 10 mil. DIE CONFIGURATION XIN X Die ID: A mil (1550,1475) BUF LVDSB PECLB DESCRIPTION The is an XO IC specifically designed to work with high frequency fundamental and third overtone crystals. Its design was optimized to tolerate higher limits of interelectrode capacitance and bonding capacitance to improve yield. It achieves very low current into the crystal resulting in better overall stability. It is ideal for XO applications requiring LVDS or PECL output levels at high frequencies. DIE SPECIFICATIONS Name Size Reverse side Pad dimensions Thickness BLOCK DIAGRAM X+ X- Oscillator Amplifier Value 62 x 65 m il 80 m icron x 80 micron 10 m il OE Q Q Y OE CTRL X (0,0) PUT SELECTION AND ENABLE Pad #9 SEL C502A Pad #9 SEL 0 LVDS 1 PECL (default) Pad #30 OE_CTRL 0 Tri-state Selected Output State 1 Output enabled (default) 0 Output enabled (default) 1 Tri-state Pad # 9: Bond to to set to 0, bond to to set to 1 Pad # 30: Logical states defined by PECL levels if SEL is 1 Logical states defined by CMOS levels if SEL is BUF BUF PECL LVDS SEL^ Micrel Inc Fortune Drive San J ose, CA USA tel +1(408) fax +1(408) Rev 4/28/09 Page 1
2 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage 4.6 V Input Voltage, dc VI V Output Voltage, dc VO V Storage Temperature TS -65 1C Ambient Operating Temperature* TA C Junction Temperature TJ 125 C Lead Temperature (soldering, 10s) 260 C ESD Protection, Human Body Model 2 kv Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permane nt damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or an y other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaran teed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. Crystal Specifications Fundamental or 3 Crystal Resonator Frequency F rd XIN MHz overtone* Crystal Loading Rating CL ( xta l) Die only 3.0 pf Interelectrode Capacitance C0 3 pf Recommended ESR RE F XIN<160MHz and C0<3.0pF 30 F XIN<200MHz and C0<3.0pF 25 F XIN<200MHz and C0<2.5pF 30 * Note: 3 rd overtone crystals require an external resistor between XIN and X to prevent the fundamental from oscillating. 3. General Electrical Specifications Supply Current (Loaded Outputs) IDD PECL/LVDS 100/80 ma Operating Voltage V Output Clock Duty 1.25V (LVDS) V (PECL) % Short Circuit Current 50 ma Micrel Inc Fortune Drive San J ose, CA USA tel +1(408) fax +1(408) Rev 4/28/09 Page 2
3 4. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period jitter RMS at 155MHz At MHz, with capacitive 2.5 Period jitter peak-to-peak at 155MHz decoupling between and ps. Over 10,000 cycles Accumulated jitter RMS at 155MHz At MHz, with capacitive 2.5 Accumulated jitter peak-to-peak at decoupling between and ps 155MHz. Over 1,000,000 cycles Random Jitter RJ measured on Wavecrest SIA ps Integrated jitter RMS at 155MHz Integrated 12 khz to 20 MHz ps Note: Higher Q factor of 3 rd overtone crystals will result in even better jitter performance. 5. Phase Noise Specifications @100kHz UNITS Phase Noise relative to carrier MHz dbc/hz Note: Higher Q factor of 3 rd overtone crystals will result in even better phase noise performance. Micrel Inc Fortune Drive San J ose, CA USA tel +1(408) fax +1(408) Rev 4/28/09 Page 3
4 6. LVDS Electrical Characteristics Output Differential Voltage VOD mv Magnitude Change V OD mv Output High Voltage VOH RL = V Output Low Voltage VOL (see figure) V Offset Voltage VOS V Offset Magnitude Change V OS mv Power-off Leakage IOXD Vout = or = 0V 1 10 ua Output Short Circuit Current IOSD ma 7. LVDS Switching Characteristics Differential Clock Rise Time tr RL = ns CL = 10 pf Differential Clock Fall Time tf (see figure) ns LVDS Levels Test Circuit LVDS Switching Test Circuit C L = 10pF V OD V OS V DIFF R L = 100 C L = 10pF LVDS Transistion Time Waveform 0V (Differential) 80% 80% V DIFF 0V 20% 20% t R t F Micrel Inc Fortune Drive San J ose, CA USA tel +1(408) fax +1(408) Rev 4/28/09 Page 4
5 8. PECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. MAX. UNITS Output High Voltage VOH RL = to ( 2V) V Output Low Voltage VOL (see figure) V 9. PECL Switching Characteristics Clock Rise Time - PECL ns Clock Fall Time - PECL ns PECL Levels Test Circuit PECL Output Skew 2.0V 50% t SKEW PECL Transistion Time Waveform DUTY CYCLE 45-55% 55-45% 80% 50% 20% t R t F Micrel Inc Fortune Drive San J ose, CA USA tel +1(408) fax +1(408) Rev 4/28/09 Page 5
6 PAD ASSIGNMENT Pad # Name X ( m) Y ( m) Description 1 Optional Optional Ground. 2 Optional Optional Ground. 3 Optional Optional Ground. 4 Optional Optional Ground Ground. 6 Reserved Reserved for future use. 7 Optional BUF Optional Ground, buffer circuitry. 8 BUF Ground, buffer circuitry. 9 SEL Output type selector. Internal pull up. See Output Selection and Enable table on page 1. Internal pull up. 10 LVDS LVDS output. 11 PECL PECL output. 12 BUF V power supply, buffer circuitry. 13 Optional BUF Optional 3.3V power supply, buffer circuitry. 14 PECLB Complementary PECL output. 15 LVDSB Complementary LVDS output. 16 Not connected Not Connected. 17 BUF Ground, buffer circuitry. 18 Reserved Reserved for future use. 19 Reserved Reserved for future use. 20 Not connected Not Connected. 21 Optional Optional 3.3V power supply. 22 Optional Optional 3.3V power supply V power supply. 24 Optional Optional 3.3V power supply. 25 Not connected Not Connected. 26 XIN Crystal input. See Crystal Specifications on page X Crystal output. See Crystal Specifications on page Not connected Not Connected. 29 Not connected Not Connected. 30 OE_CTRL Used to enable/disable the output(s). See Output Selection and Enable table on page Not connected Not Connected. Note: for optimal Phase Noise performance, it is recommended to bond all optional and pads. Micrel Inc Fortune Drive San J ose, CA USA tel +1(408) fax +1(408) Rev 4/28/09 Page 6
7 ORDERING INFORMATION For part ordering, please contact our Sales Department: 2180 Fortune Drive, San Jose, CA 95131, USA Tel: (408) Fax: (408) PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range D C PART NUMBER TEMPERATURE C=COMMERCIAL PACKAGE TYPE D=DIE Order Number Marking Package Option DC P620-20DC Die Waffle Pack Micrel Inc., reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Micrel is believed to be accurate and reliable. However, Micrel makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: Micrel s products are not auth orized for use as critical components in life support devices or systems without the express written approval of the President of Micrel Inc. Micrel Inc Fortune Drive San J ose, CA USA tel +1(408) fax +1(408) Rev 4/28/09 Page 7
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