Scattering Mechanisms in Narrow Copper Lines

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Scattering Mechanisms in Narrow Copper Lines G. B. Alers, J. Sukamto, S. Park, J. Blackburn, C. Chi, I. Kalinovski, W. Wu, R. Powell Novellus Systems 1

Purpose: Scattering Mechanisms in Copper Problem: Increased resistivity of copper in sub-100nm lines Procedure: Quantify scattering mechanisms in sub-100nm lines (1) Determine lower limit for copper resistivity in sub-100nm lines (2) Identify relative importance of each scattering mechanisms in copper (3) Prioritize critical process steps for reducing copper resistivity Goal: Critical process steps for controlling copper resistivity Line edge roughness, post-plate anneal, copper thickness, chemistry 2

Outstanding questions (1) What is the lower limit of copper resistivity in sub-100nm lines? (2) Does barrier interface scattering depend on material? (3) Can a thick copper overburden reduce grain boundary scattering? (4) Can a fast annealing chemistry reduce grain boundary scattering? 3

Experimental Outline Barrier interface scattering contribution Blanket Cu films with large grains and different barriers Resistivity vs. thickness ~ barrier interface scattering Fabrication of sub-100nm lines Minimize line edge roughness Large process window for barrier / seed / fill Impact of process on copper resistivity Anneal temperature Copper thickness Plating chemistry 4

Surface Scattering Contribution Small Grain Cu (800nm) + Seed (40nm) Alternate Barriers Copper Oxide Silicon Anneal 150C / 1hour Copper Oxide Silicon Large Grain Cu CMP: Cu remains in wafer center Sheet resistance 4 pt. probe Thickness XRF Oxide Silicon Oxide Silicon Resistivity vs. thickness for large grain copper Cu / barrier + Cu / oxide scattering only 5

Surface Scattering Component Resistivity 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 Bulk Cu Blanket copper (annealed) Polished back to less than 100nm 100% Diffuse Scattering Ru WN ALD TaN PVD Ta 1-D model (p=0) 0 50 100 150 200 Copper Thickness (nm) Large Grain Copper Barrier/seed 1µm Cu + Anneal Polish back to 20-100nm Thickness: XRF Resistance: sheet R Average over 8 wafers PVD Ta, WN, ALD TaN: 100% diffuse scattering Both top and bottom Ru Incomplete CMP (?) Model surface scattering with ρ = ρ 0 * (1+ /t), = (1-p)*λ Scattering for all barriers consistent with p=0 (diffuse scattering) 6

Narrow Line Fabrication: Requirements Minimum line edge roughness Issue: 193 photoresist = thin, rough line edges Solution: SiC hardmask + 248nm lithography Reduction in CD: 200nm lines to 50nm lines Issue: Facets with backfill of 75 90nm of PDL SiO 2 Solution: PVD + ECD with corner facets, remove at CMP Cross section determination Issue: SEM has large errors Solution: Matthiessen rule to determine area 7

Line Edge Roughness / 193nm lithography Alternative: 248nm lithography / TEOS Top View 193nm Litho / SiOCH 248nm litho / TEOS / Virtual Modified Image SiC hardmask Shrink Side View 140nm l/s Resist BARC Line edge roughness will be a larger fraction of final CD as features are backfilled. 193nm litho / SiOC: ~20nm line edge roughness 248nm litho / SiC hardmask / TEOS: < 10nm roughness 8

CD Reduction: Oxide Backfill + ECD Cu ECD Copper Oxide Backfill Underlying Trenches CMP Polish Back Thick backfill gives large facets at trench corner Larger process window for thin PVD barrier / seed Polish through backfill material for realistic features 9

Lines after ECD / CMP Low Aspect Ratio Structures Pt High Aspect Ratio Structures Pt Cross sectional area difficult to measure with SEM (large errors) Subtract out barrier area for copper resistivity 10

Matthiessen Law and Effective Line Width Avoid difficult FIB/SEM, improve statistics Resistance of copper line vs. temperature Electrical and Microstructural characterization of Narrow Cu Interconnects W. Wu, et al., IMEC. AMC, 2003. Cleave / SEM : 6.3 +/- 0.6 E-11 cm 2 Measure resistance at two temperatures, find two unknowns Area = α T L / R(T), Resistivity = R α T / R(T) Thickness from wide Cu lines with ρ = 1.8 µω -cm Matthiessen: 6.3 E-11 cm 2 11

Narrow Lines After Passivation Cu overburden has large impact Resistivity (µω-cm) 3.0 2.9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 Line Depth ~ 100nm Seed = 50nm = 50% of trench Annealing of seed is critical 0 100 200 300 400 500 Line Width (nm) 2kA Overburden No anneal 2kA Overburden 400C / 30min anneal 8kA Overburden 150C / 1H anneal Thick overburden more effective than high T anneal 12

Partial Annealing of Seed Layer Partial anneal of blanket ECD Cu Less than 20% Resistance drop Small grain Cu seed layer visible Upper copper: Shorts out seed Seed Importance: Thin wires Seed large fraction of line 13

Impact of ECD Chemistry and Overburden Pure chemistry 300nm thick deposit 800nm thick deposit 130nm chemistry 300nm thick deposit 800nm thick deposit 130 Chemistry: Thick overburden required for full recrystallization Pure Chemistry Less dependent on overburden Higher Purity Cu Film faster RT anneal rate less GB scattering Fast annealing Cu film reduces need for thick overburden 14

Minimum Resistivity in Narrow Lines ρ (µohm-cm) 2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 80nm 160nm All The Right Ingredients Pure chemistry 1.5µm of overburden, 40nm seed 300C / 90s anneal 160nm trench depth 2.5 : 1 aspect ratio at ECD Simple additive model ρ = ρ 0 * (1+ /t + /w ) obtained from blanket wafer data Only parameter: ρ 0 = 1.75 1.7 0 50 100 150 200 250 300 Line Width (nm) ρ = 2.3 µohm-cm at 80nm, 2:1 AR Resistivity consistent with surface scattering only 15

Process Variations and Resistivity 3.5 Increased resistivity: Resistivity (µω-cm) 3.0 2.5 2.0 1.5 0 50 100 150 200 250 300 350 400 Width(nm) All the right things High as plated AR (3:1) 150nm depth Thin Overburden ρ = 0.2 µω-cm Shallow depth (70nm) Thin Overburden ρ = 0.4 µω-cm Minimum resistivity: Thick overburden, low as plated AR 16

Cu Overburden Effect on Electromigration ln(cdf) 2.0 1.5 1.0 0.5 0.0-0.5-1.0-1.5 Trench: 80nm wide 80nm deep 200nm Overburden 6x Difference 800nm Overburden PDL Oxide Cu Oxide Line Dimension: 80nm (W) x 80nm (D) 130nm generation chemistry -2.0 1.E+03 1.E+04 1.E+05 Time to fail (s) 8kA Cu overburden shows 6X EM improvement over 2kA 17

Conclusions on Minimum Copper Resistivity Novellus structures designed to minimize resistivity Low effective aspect ratio Minimal edge roughness Wide margin for barrier / seed coverage and fill Lowest resistivity in narrow line Thick overburden Fast annealing chemistry Barrier material has small impact 18

Return to Outstanding Questions (1) What is the lower limit of copper resistivity in sub 100nm lines? Pure surface scattering = 2.3 µω-cm for 80nm x 160nm lines (2) Does barrier interface depend metal? PVD Ta(N), ALD Ta(N), ALD WN and Ru all have 100% diffuse scattering (3) Can a thick overburden (>1µm) reduce grain boundary scattering? Yes, provided optimum trench aspect ratio and profile (4) Can a fast annealing chemistry reduce grain boundary scattering? Yes, provided optimum trench aspect ratio and profile 19