Power MOSFET FEATURES. IRF840APbF SiHF840A-E3 IRF840A SiHF840A

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Power MOSFET PRODUCT SUMMARY (V) 500 R DS(on) ( ) = 0 V 0.85 Q g (Max.) (nc) 38 Q gs (nc) 9.0 Q gd (nc) 8 Configuration Single D TO220AB G FEATURES Low Gate Charge Q g Results in Simple Drive Requirement Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche Voltage and Current Effective C oss Specified Compliant to RoHS Directive 2002/95/EC APPLICATIONS Switch Mode Power Supply (SMPS) Uninterruptable Power Supply High Speed Power Switching Available RoHS* COMPLIANT G DS ORDERING INFORMATION Package Lead (Pb)free SnPb S NChannel MOSFET TYPICAL SMPS TOPOLOGIES Two Transistor Forward Half Bridge Full Bridge TO220AB IRF840APbF SiHF840AE3 IRF840A SiHF840A ABSOLUTE MAXIMUM RATINGS (T C = 25 C, unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT DrainSource Voltage 500 V GateSource Voltage ± 30 Continuous Drain Current at 0 V T C = 25 C 8.0 I D T C = 00 C 5. A Pulsed Drain Current a I DM 32 Linear Derating Factor.0 W/ C Single Pulse Avalanche Energy b E AS 50 mj Repetitive Avalanche Current a I AR 8.0 A Repetitive Avalanche Energy a E AR 3 mj Maximum Power Dissipation T C = 25 C P D 25 W Peak Diode Recovery dv/dt c dv/dt 5.0 V/ns Operating Junction and Storage Temperature Range T J, T stg 55 to 50 Soldering Recommendations (Peak Temperature) for 0 s 300 d C Mounting Torque 632 or M3 screw Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. ). b. V DD = 50 V, starting T J = 25 C, L = 6 mh, R g = 25, I AS = 8.0 A (see fig. 2). c. I SD 8.0 A, di/dt 00 A/μs, V DD, T J 50 C. d..6 mm from case. 0 lbf in. N m * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 9065 www.vishay.com S0506Rev. B, 2Mar THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000

THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. UNIT Maximum JunctiontoAmbient R thja 62 CasetoSink, Flat, Greased Surface R thcs 0.50 C/W Maximum JunctiontoCase (Drain) R thjc.0 SPECIFICATIONS (T J = 25 C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static DrainSource Breakdown Voltage = 0 V, I D = 250 μa 500 V Temperature Coefficient /T J Reference to 25 C, I D = ma 0.58 V/ C GateSource Threshold Voltage (th) =, I D = 250 μa 2.0 4.0 V GateSource Leakage I GSS = ± 30 V ± 00 na = 500 V, = 0 V 25 Zero Gate Voltage Drain Current I DSS = 400 V, = 0 V, T J = 25 C 250 μa DrainSource OnState Resistance R DS(on) = 0 V I D = 4.8 A b 0.85 Forward Transconductance g fs = 50 V, I D = 4.8 A b 3.7 S Dynamic Input Capacitance C iss V = 0 V, GS 08 Output Capacitance C oss = 25 V, 55 Reverse Transfer Capacitance C rss f =.0 MHz, see fig. 5 8.0 Output Capacitance C oss = 0 V; =.0 V, f =.0 MHz 490 pf Output Capacitance C oss = 0 V; = 400 V, f =.0 MHz 42 Effective Output Capacitance C oss eff. = 0 V; = 0 V to 400 V c 56 Total Gate Charge Q g 38 GateSource Charge Q gs I = 0 V D = 8 A, = 400 V, see fig. 6 and 3 b 9.0 nc GateDrain Charge Q gd 8 TurnOn Delay Time t d(on) Rise Time t r V DD = 250 V, I D = 8 A 23 TurnOff Delay Time t d(off) R g = 9., R D = 3, see fig. 0 b 26 ns Fall Time t f 9 DrainSource Body Diode Characteristics Continuous SourceDrain Diode Current I MOSFET symbol D S 8.0 showing the integral reverse A G Pulsed Diode Forward Current a I SM p n junction diode 32 Body Diode Voltage V SD T J = 25 C, I S = 8 A, = 0 V b 2.0 V Body Diode Reverse t rr 422 633 ns Recovery Time T J = 25 C, I F = 8 A, di/dt = 00 A/μs b Body Diode Reverse Recovery Charge Q rr 2.6 3.24 μc Forward TurnOn Time t on Intrinsic turnon time is negligible (turnon is dominated by L S and L D ) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. ). b. Pulse width 300 μs; duty cycle 2 %. c. C oss eff. is a fixed capacitance that gives the same charging time as C oss while is rising from 0 % to 80 %. S www.vishay.com Document Number: 9065 2 S0506Rev. B, 2Mar THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000

TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) I D, DraintoSource Current (A) 9065_0 0 2 0 0. 0. Top Bottom 5 V 0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V 20 µs Pulse Width T C = 25 C 0 4.5 V, DraintoSource Voltage (V) 0 2 I D, DraintoSource Current (A) 9065_03 0 2 0 T J = 50 C T J = 25 C 20 µs Pulse Width = 50 V 0. 4.0 5.0 6.0 7.0 8.0 9.0, GatetoSource Voltage (V) Fig. Typical Output Characteristics, T C = 25 C Fig. 3 Typical Transfer Characteristics I D, DraintoSource Current (A) 9065_02 0 2 0 0. 0. Top Bottom 5 V 0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V 20 µs Pulse Width T C = 50 C 0 4.5 V, DraintoSource Voltage (V) 0 2 R DS(on), DraintoSource On Resistance (Normalized) 9065_04 3.0 2.5 2.0.5.0 0.5 I D = 8.0 A = 0 V 0.0 60 40 20 0 20 40 60 80 00 20 40 60 T J, Junction Temperature ( C) Fig. 2 Typical Output Characteristics, T C = 50 C Fig. 4 Normalized OnResistance vs. Temperature Document Number: 9065 www.vishay.com S0506Rev. B, 2Mar 3 THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000

Capacitance (pf) 0 5 0 4 0 3 0 2 0 = 0 V, f = MHz C iss = C gs C gd, C ds Shorted C rss = C gd C oss = C ds C gd C iss C oss C rss I SD, Reverse Drain Current (A) 0 2 0 T J = 50 C T J = 25 C 0 0 2 0 3 = 0 V 0. 0.2 0.5 0.8..4 9065_05, DraintoSource Voltage (V) 9065_07 V SD, SourcetoDrain Voltage (V) Fig. 5 Typical Capacitance vs. DraintoSource Voltage Fig. 7 Typical SourceDrain Diode Forward Voltage, GatetoSource Voltage (V) 20 6 2 8 4 0 I D = 8.0 A = 00 V = 250 V = 400 V 0 0 20 30 40 9065_06 Q G, Total Gate Charge (nc) For test circuit see figure 3 I D, Drain Current (A) 9065_08 0 2 0 0. Operation in this area limited by R DS(on) 0 µs 00 µs ms 0 0 2 0 3 0 ms T C = 25 C T J = 50 C Single Pulse, DraintoSource Voltage (V) 0 4 Fig. 6 Typical Gate Charge vs. GatetoSource Voltage Fig. 8 Maximum Safe Operating Area www.vishay.com Document Number: 9065 4 S0506Rev. B, 2Mar THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000

R D D.U.T. 8.0 R G V DD I D, Drain Current (A) 6.0 4.0 2.0 Pulse width µs Duty factor 0. % Fig. 0a Switching Time Test Circuit 90 % 0 V 9065_09 0.0 25 50 75 00 25 50 T C, Case Temperature ( C) 0 % t d(on) t r t d(off) t f Fig. 9 Maximum Drain Current vs. Case Temperature Fig. 0b Switching Time Waveforms 0 Thermal Response (Z thjc ) 0. D = 0.5 0.2 0. 0.05 0.02 0.0 Single Pulse (Thermal Response) 0 2 0 4 0 3 0 2 P DM t t 2 Notes:. Duty Factor, D = t /t 2 2. Peak T j = P DM x Z thjc T C 0 5 9065_ t, Rectangular Pulse Duration (s) 0. Fig. Maximum Effective Transient Thermal Impedance, JunctiontoCase Document Number: 9065 www.vishay.com S0506Rev. B, 2Mar 5 THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000

L Vary t p to obtain required I AS R G I AS D.U.T V DD 0 V Q GS Q G Q GD 0 V t p 0.0 Ω V G Fig. 2a Unclamped Inductive Test Circuit Charge t p Fig. 2d Basic Gate Charge Waveform V DD 600 E AS, Single Pulse Avalanche Energy (mj) 9065_2c 200 000 800 600 400 200 I AS Fig. 2b Unclamped Inductive Waveforms Top Bottom I D 3.6 A 5. A 8.0 A 0 25 50 75 00 25 50 Starting T J, Junction Temperature ( C) av, Avalanche Voltage (V) 9065_2d 580 560 540 520 0.0.0 2.0 3.0 4.0 5.0 6.0 I AV, Avalanche Current (A) 7.0 8.0 Fig. 3a Typical DraintoSource Voltage vs. Avalanche Current Current regulator Same type as D.U.T. 50 kω Fig. 2c Maximum Avalanche Energy vs. Drain Current 2 V 0.2 µf 0.3 µf D.U.T. V DS 3 ma Fig. 3b Gate Charge Test Circuit I G I D Current sampling resistors www.vishay.com Document Number: 9065 6 S0506Rev. B, 2Mar THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000

Peak Diode Recovery dv/dt Test Circuit D.U.T. Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer R g dv/dt controlled by R g Driver same type as D.U.T. I SD controlled by duty factor D D.U.T. device under test V DD Driver gate drive P.W. Period D = P.W. Period = 0 V a D.U.T. l SD waveform Reverse recovery current Body diode forward current di/dt D.U.T. waveform Diode recovery dv/dt V DD Reapplied voltage Inductor current Body diode forward drop Ripple 5 % I SD Note a. = 5 V for logic level devices Fig. 4 For NChannel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?9065. Document Number: 9065 www.vishay.com S0506Rev. B, 2Mar 7 THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000

www.vishay.com Package Information TO220 D L H() Q L() E 2 e 3 b M * b() Ø P C A F MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. A 4.4 4.70 0.63 0.85 b 0.69.02 0.027 0.040 b().4.73 0.045 0.068 c 0.36 0.6 0.04 0.024 D 4.33 5.85 0.564 0.624 E 9.96 0.52 0.392 0.44 e 2.4 2.67 0.095 0.05 e() 4.88 5.28 0.92 0.208 F 0.43.40 0.07 0.055 H() 6.0 6.48 0.240 0.255 J() 2.4 2.92 0.095 0.5 L 3.36 4.40 0.526 0.567 L() 3.33 4.04 0.3 0.59 Ø P 3.53 3.94 0.39 0.55 Q 2.59 3.00 0.02 0.8 ECN: X50003Rev. A, 9Jan5 DWG: 603 Notes M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM Outline conforms to JEDEC outline TO220AB with exception of dimension F e() J() Revison: 9Jan5 Document Number: 66542 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000

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