ata sheet acquired from Harris Semiconductor SHS0 ugust - Revised May [ /Title (0 U, 0 0) /Subject (MO S Hex uffer/ onverters) /utho r () /Keywords (Harris Semiconductor, 00 0, metal gate, MOS MOS Hex uffer/onverters The 0U and 00 devices are inverting and non-inverting hex buffers, respectively, and feature logiclevel conversion using only one supply voltage ( ). The input-signal high level (V IH ) can exceed the supply voltage when these devices are used for logic-level conversions. These devices are intended for use as MOS to TL/TTL converters and can drive directly two TL/TTL loads. ( = V, V OL 0.V, and I OL.m.) The 0U and 00 are designated as replacements for 00U and 00, respectively. ecause the 0U and 00 require only one power supply, they are preferred over the 00U and 00 and should be used in place of the 00U and 00 in all inverter, current driver, or logic-level conversion applications. In these applications the 0U and 00 are pin compatible with the 00U and 00 respectively, and can be substituted for these devices in existing as well as in new designs. Terminal No. is not connected internally on the 0U or 00, therefore, connection to this terminal is of no consequence to circuit operation. For applications not requiring high sink-current or voltage conversion, the 0U Hex Inverter is recommended. Pinouts 0U (PIP, RIP) TOP VIW Features 0U Inverting 00 Non-Inverting High Sink urrent for riving TTL Loads High-To-Low Level Logic onversion 00% Tested for Quiescent urrent at 0V Maximum Input urrent of µ at V Over Full Package Temperature Range; 00n at V and o V, 0V and V Parametric Ratings pplications MOS to TL/TTL Hex onverter MOS urrent Sink or Source river MOS High-To-Low Logic Level onverter Ordering Information PRT NUMR TMP. RNG ( o ) PKG PKG. NO. 0U - to Ld PIP. 00 - to Ld PIP. 0UF - to Ld RIP F. 00F - to Ld RIP F. 00M - to Ld SOI M. NOT: Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office or customer service for ordering information. 00 (PIP, RIP, SOI) TOP VIW N N G = L = F G = L = F F F H = N H = N K = K = I = I = 0 J = 0 J = UTION: These devices are sensitive to electrostatic discharge; follow proper I Handling Procedures. opyright, Texas Instruments Incorporated
Functional lock iagrams 0U 00 G = G = H = H = I = I = 0 J = 0 J = K = K = F L = F F L = F N = N = N = N = Schematic iagrams IN R P N OUT IN R P N P N OUT FIGUR. SHMTI IGRM OF 0U, OF INTIL UNITS FIGUR. SHMTI IGRM OF 00, OF INTIL UNITS
bsolute Maximum Ratings Supply Voltage (V+ to V-)....................... -0.V to 0V Input urrent, ny One Input...................... ±0m Operating onditions Temperature Range......................... - o to o Thermal Information Thermal Resistance (Typical, Note ) θ J ( o /W) θ J ( o /W) PIP Package................... 0 N/ RIP Package................. 0 SOI Package................... 00 N/ Maximum Junction Temperature (Plastic Package)........0 o Maximum Storage Temperature Range.......... - o to 0 o Maximum Lead Temperature (Soldering 0s)............. o (SOI - Lead Tips Only) UTION: Stresses above those listed in bsolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOT:. θ J is measured with the component mounted on an evaluation P board in free air. lectrical Specifications LIMITS T INIT TMPRTUR ( o ) TST ONITIONS PRMTR V O (V) V IN (V) (V) - -0 MIN TYP MX UNITS Quiescent evice urrent I (Max) - 0, 0 0-0.0 µ - 0,0 0 0 0-0.0 µ - 0, 0 0-0.0 µ - 0,0 0 0 0 00 00-0.0 0 µ Output Low (Sink) urrent I OL (Min) 0. 0,....... - m 0. 0,..... - m 0. 0,0 0 0... - m. 0, 0 - m Output High (Source) urrent I OH (Min). 0, -0. -0. -0. -0. -0. -. - m. 0, -. -. -. -. -. -. - m. 0,0 0 -.0 -. -. -. -. -.0 - m. 0, -. -. -. -. -. -.0 - m Out Voltage Low Level V OL (Max) - 0, 0.0 0.0 0.0 0.0-0 0.0 V - 0,0 0 0.0 0.0 0.0 0.0-0 0.0 V - 0, 0.0 0.0 0.0 0.0-0 0.0 V Output Voltage High Level V OH (Min) - 0,..... - V - 0,0 0..... 0 - V - 0,..... - V Input Low Voltage, V IL (Max) 0U. - - - V - 0 - - V. -.... - -. V Input Low Voltage, V IL (Max) 00 0. -.... - -. V - 0 - - V. - - - V Input High Voltage, V IH Min 0U 0. - - - V - 0 - - V. -..... - - V
lectrical Specifications (ontinued) LIMITS T INIT TMPRTUR ( o ) TST ONITIONS PRMTR V O (V) V IN (V) (V) - -0 MIN TYP MX UNITS Input High Voltage, V IH Min 00. -..... - - V - 0 - - V. - - - V Input urrent, I IN Max - 0, ±0. ±0. ± ± - ±0 - ±0. µ lectrical Specifications T = o, Input t r, t f = 0ns, L = 0pF, R L = 00kΩ TST ONITIONS LIMITS (LL PKGS) PRMTR V IN TYP MX UNITS Propagation elay Time Low to High, t PLH 0U 0 0 ns 0 0 ns 0 0 ns 0 ns 0 ns Propagation elay Time Low to High, t PLH 00 0 0 ns 0 0 0 0 ns 0 0 ns 0 0 ns 0 0 ns Propagation elay Time High to Low, t PHL 0U ns 0 0 0 0 ns 0 0 ns 0 ns 0 0 ns Propagation elay Time High to Low, t PHL 00 0 ns 0 0 ns 0 0 00 ns 0 ns 0 00 ns Transition Time, Low to High, t TLH 0 0 ns 0 0 0 0 ns 0 0 ns Transition Time, High to Low, t THL 0 0 ns 0 0 0 0 ns 0 ns Input apacitance, IN 0U Input apacitance, IN 00 - -. pf - -. pf
Typical Performance urves T = o T = o SUPPLY VOLTG ( ) = V SUPPLY VOLTG ( ) = V V O, OUTPUT VOLTG (V) MINIMUM MXIMUM V O, OUTPUT VOLTG (V) MINIMUM MXIMUM 0 V I, INPUT VOLTG (V) 0 V I, INPUT VOLTG (V) FIGUR. MINIMUM N MXIMUM VOLTG TRNSFR HRTRISTIS FOR 0U FIGUR. MINIMUM N MXIMUM VOLTG TRNSFR HRTRISTIS FOR 00 I OL, OUTPUT LOW (SINK) URRNT (m) 0 0 0 0 0 0 0 T = o V 0V GT TO SOUR VOLTG (V GS ) = V I OL, OUTPUT LOW (SINK) URRNT (m) 0 0 0 0 0 0 0 T = o V 0V GT TO SOUR VOLTG (V GS ) = V 0 0 V S, RIN TO SOUR VOLTG (V) V S, RIN TO SOUR VOLTG (V) FIGUR. TYPIL OUTPUT LOW (SINK) URRNT HRTRISTIS FIGUR. MINIMUM OUTPUT LOW (SINK) URRNT RIN HRTRISTIS V S, RIN TO SOUR VOLTG (V) - - - - - - - - 0 V S, RIN TO SOUR VOLTG (V) - - - - - - - - 0 T = o GT TO SOUR VOLTG V GS = -V -0V -V - -0 - -0 - -0 - OUTPUT HIGH (SOUR) URRNT HRTRISTIS T = o GT TO SOUR VOLTG V GS = -V -0V -V - -0 - -0 - -0 - OUTPUT HIGH (SOUR) URRNT HRTRISTIS FIGUR. TYPIL OUTPUT HIGH (SOUR) URRNT HRTRISTIS FIGUR. MINIMUM OUTPUT HIGH (SOUR) URRNT HRTRISTIS
Typical Performance urves (ontinued) V O, OUTPUT VOLTG (V) 0 o = V o SUPPLY VOLTG = 0V T = - o - o V O, OUTPUT VOLTG (V) 0 o o = V - o SUPPLY VOLTG = 0V T = - o 0 0 0 V I, INPUT VOLTG (V) 0 0 0 V I, INPUT VOLTG (V) FIGUR. TYPIL VOLTG TRNSFR HRTRISTIS S FUNTION OF TMPRTUR FOR 0U FIGUR. TYPIL VOLTG TRNSFR HRTRISTIS S FUNTION OF TMPRTUR FOR 00 POWR ISSIPTION PR INVRTR (µw) 0 0 0 T = o SUPPLY VOLTG = V 0 LO PITN L = 0pF (pf FIXTUR + pf XT) L = pf 0 (pf FIXTUR + pf XT) 0 0 0 0 0 0V 0V V f, INPUT FRQUNY (khz) POWR ISSIPTION PR INVRTR (µw) 0 0 0 0 0 T = o V; MHz V; 00kHz 0V; 00kHz V; 0kHz 0V; 0kHz V; khz SUPPLY VOLTG = V FRQUNY (f) = 0kHz 0 0 0 0 0 0 0 0 t r, t f, INPUT RIS N FLL TIM (ns) FIGUR 0. TYPIL POWR ISSIPTION vs FRQUNY HRTRISTIS FIGUR. TYPIL POWR ISSIPTION vs INPUT RIS N FLL TIMS PR INVRTR FOR 0U POWR ISSIPTION PR INVRTR (µw) 0 0 0 0 0 0 T = o V; MHz V; 00kHz 0V; 00kHz V; 0kHz 0V; 0kHz V; khz SUPPLY VOLTG = V FRQUNY (f) = 0kHz 0 0 0 0 0 0 0 0 t r, t f, INPUT RIS N FLL TIM (ns) FIGUR. TYPIL POWR ISSIPTION vs INPUT RIS N FLL TIMS PR INVRTR FOR 00
Test ircuits INPUTS INPUTS V IH V IL OUTPUTS + VM - I FIGUR. QUISNT VI URRNT TST IRUIT NOT: Test any one input with other inputs at or. FIGUR. INPUT VOLTG TST IRUIT MOS 0V LVL TO TL/TTL V LVL = V I INPUTS OUTPUTS 0V = V IH OS/MOS IN 0 OUTPUT TO TL/TTL INPUTS V = V OH 0 = V IL 0 = V OL NOT: Measure inputs sequentially, to both and connect all unused inputs to either or. FIGUR. INPUT URRNT TST IRUIT In Terminal -,,,,, or Out Terminal -,,, 0, or Terminal - Terminal - FIGUR. LOGI LVL ONVRSION PPLITION V 00µF I 0.µF L 0kHz, 00kHz, MHz 0U 0 L INLUS FIXTUR PITN FIGUR. YNMI POWR ISSIPTION TST IRUITS
ual-in-line Plastic Packages (PIP) 0U, 00 INX R N N/ -- -- S PLN -- STING PLN L L e e e e 0.00 (0.) M S NOTS:. ontrolling imensions: INH. In case of conflict between nglish and Metric dimensions, the inch dimensions control.. imensioning and tolerancing per NSI Y.M-.. Symbols are defined in the MO Series Symbol List in Section. of Publication No... imensions, and L are measured with the package seated in J- seating plane gauge GS-..,, and dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.00 inch (0.mm).. and e are measured with the leads constrained to be perpendicular to datum --.. e and e are measured at the lead tips with the leads unconstrained. e must be zero or greater.. maximum dimensions do not include dambar protrusions. ambar protrusions shall not exceed 0.00 inch (0.mm).. N is the maximum number of terminal positions. 0. orner leads (, N, N/ and N/ + ) for.,.,.,.,. will have a dimension of 0.00-0.0 inch (0. -.mm).. (J MS-00- ISSU ) L UL-IN-LIN PLSTI PKG INHS MILLIMTRS SYMOL MIN MX MIN MX NOTS - 0.0 -. 0.0-0. - 0. 0... - 0.0 0.0 0. 0. - 0.0 0.00.., 0 0.00 0.0 0.0 0. - 0. 0... 0.00-0. - 0.00 0... 0.0 0.0.0. e 0.00 S. S - e 0.00 S. S e - 0.0-0. L 0. 0.0.. N Rev. 0 /
eramic ual-in-line Frit Seal Packages (RIP) S PLN STING PLN S b ccc M bbb S b - - S e S NOTS:. Index area: notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer s identification shall not be used as a pin one identification mark.. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied.. imensions b and c apply to lead base metal only. imension M applies to lead plating and finish thickness.. orner leads (, N, N/, and N/+) may be configured with a partial lead paddle. For this configuration dimension b replaces dimension b.. This dimension allows for off-center lid, meniscus, and glass overrun.. imension Q shall be measured from the seating plane to the base plane.. Measure dimension S at all four corners.. N is the maximum number of terminal positions.. imensioning and tolerancing per NSI Y.M -. 0. ontrolling dimension: INH. L M c e/ S S aaa M - L FINISH S MTL b M (b) STION - -- -- Q -- -α S e c S (c) F. MIL-ST- GIP-T (-, ONFIGURTION ) L RMI UL-IN-LIN FRIT SL PKG INHS MILLIMTRS SYMOL MIN MX MIN MX NOTS - 0.00 -.0 - b 0.0 0.0 0. 0. b 0.0 0.0 0. 0. b 0.0 0.0.. - b 0.0 0.0 0.. c 0.00 0.0 0.0 0. c 0.00 0.0 0.0 0. - 0.0 -. 0.0 0.0.. e 0.00 S. S - e 0.00 S. S - e/ 0.0 S. S - L 0. 0.00..0 - Q 0.0 0.00 0.. S 0.00-0. - α 0 o 0 o 0 o 0 o - aaa - 0.0-0. - bbb - 0.00-0. - ccc - 0.00-0. - M - 0.00-0.0, N Rev. 0 /
Small Outline Plastic Packages (SOI) 0U, 00 N INX R e 0.(0.00) M M -- -- -- STING PLN S H 0.(0.00) M 0.0(0.00) NOTS:. Symbols are defined in the MO Series Symbol List in Section. of Publication Number.. imensioning and tolerancing per NSI Y.M-.. imension does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.mm (0.00 inch) per side.. imension does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.mm (0.00 inch) per side.. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.. L is the length of terminal for soldering to a substrate.. N is the number of terminal positions.. Terminal numbers are shown for reference only.. The lead width, as measured 0.mm (0.0 inch) or greater above the seating plane, shall not exceed a maximum value of 0.mm (0.0 inch) 0. ontrolling dimension: MILLIMTR. onverted inch dimensions are not necessarily exact. α L M h x o M. (J MS-0- ISSU ) L WI OY SMLL OUTLIN PLSTI PKG INHS MILLIMTRS SYMOL MIN MX MIN MX NOTS 0.0 0.0.. - 0.000 0.0 0.0 0.0-0.0 0.000 0. 0. 0.00 0.0 0. 0. - 0. 0. 0.0 0.0 0. 0..0.0 e 0.00 S. S - H 0. 0. 0.00 0. - h 0.00 0.0 0. 0. L 0.0 0.00 0.0. N α 0 o o 0 o o - Rev. 0 / 0
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