INTEGRATED CIRCUITS. 74F153 Dual 4-line to 1-line multiplexer. Product specification 1996 Jan 05 IC15 Data Handbook
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1 INTEGRATED CIRCUITS 1996 Jan 05 IC15 Data Handbook
2 FEATURES Non-inverting outputs Separate enable for each section Common select inputs See 74F253 for 3-State version PIN CONFIGURATION Ea 1 S1 2 I3a 3 I2a V CC Eb S0 I3b DESCRIPTION The is a dual 4-input multiplexer that can select 2 bits of data from up to four sources selected by common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active-low Enables (Ea, Eb) which can be used to strobe the outputs independently. Outputs (Ya, Yb) are forced Low when the corresponding Enables (Ea, Eb) are High. I1a I0a Ya GND I2b 11 I1b 10 I0b 9 Yb SF00146 The is the logic implementation of a 2-pole, 4-position switch where the switch is determined by the logic levels supplied to the common select inputs. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7.0ns 12mA ORDERING INFORMATION DESCRIPTION COMMERCIAL RANGE V CC = 5V ±10%, T amb = 0 C to +70 C PKG. DWG. # 16-pin plastic DIP NN SOT pin plastic SO ND SOT109-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW I0a I3a Port A data inputs 1.0/1.0 20µA/0.6mA I0b I3b Port B data inputs 1.0/1.0 20µA/0.6mA S0, S1 Common Select inputs 1.0/1.0 20µA/0.6mA Ea Port A Enable input (active Low) 1.0/1.0 20µA/0.6mA Eb Port B Enable input (active Low) 1.0/1.0 20µA/0.6mA Ya, Yb Port A, B data outputs 50/33 1.0µA/20mA NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL IEC/IEEE SYMBOL G I0a S0 S1 Ea Eb I1a I2a Ya I3a I0b Yb I1b I2b I3b EN MUX V CC = Pin 16 GND = Pin SF SF Jan
3 LOGIC DIAGRAM Ea I0a I1a I2a I3a S1 S2 I0b I0b I2b I3b Eb V CC = Pin 16 GND = Pin 8 7 Ya 9 Yb SF00149A FUNCTION TABLE INPUTS OUTPUT S0 S1 En I0n I1n I2n I3n Yn X X H X X X X L L L L L X X X L L L L H X X X H H L L X L X X L H L L X H X X H L H L X X L X L L H L X X H X H H H L X X X L L H H L X X X H H H = High voltage level L = Low voltage level X = Don t care 1996 Jan 05 3
4 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT V CC Supply voltage 0.5 to +7.0 V V IN Input voltage 0.5 to +7.0 V I IN Input current 30 to +5 ma V OUT Voltage applied to output in High output state 0.5 to V CC V I OUT Current applied to output in Low output state 40 ma T amb Operating free-air temperature range 0 to +70 C T stg Storage temperature range 65 to +150 C RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS MIN NOM MAX UNIT V CC Supply voltage V V IH High-level input voltage 2.0 V V IL Low-level input voltage 0.8 V I IK Input clamp current 18 ma I OH High-level output current 1 ma I OL Low-level output current 20 ma T amb Operating free-air temperature range C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL PARAMETER TEST CONDITIONS 1 MIN TYP 2 MAX UNIT V OH High-level output voltage V CC = MIN, V IL = MAX ±10%V CC 2.5 V IH = MIN, I OH = MAX ±5%V CC V V OL Low-level output voltage V CC = MIN, V IL = MAX ±10%V CC V IH = MIN, I OL = MAX ±5%V CC V V IK Input clamp voltage V CC = MIN, I I = I IK V I I Input current at maximum input voltage V CC = MAX, V I = 7.0V 100 µa I IH High-level input current V CC = MAX, V I = 2.7V 20 µa I IL Low-level input current V CC = MAX, V I = 0.5V 0.6 ma I OS Short-circuit output current 3 V CC = MAX ma En = GND, I CCH ma I Supply current (total) V = MAX Sn=In=4.5V CC CC I CCL En=Sn=In=GND ma NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at V CC = 5V, T amb = 25 C. 3. Not more than one output should be shorted at a time. For testing I OS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, I OS tests should be performed last Jan 05 4
5 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITION V CC = +5.0V T amb = +25 C C L = 50pF, R L = 500Ω V CC = +5.0V ± 10% T amb = 0 C to +70 C C L = 50pF, R L = 500Ω UNIT MIN TYP MAX MIN MAX Propagation delay In to Yn Waveform ns Propagation delay Sn to Yn Waveform ns Propagation delay En to Yn Waveform ns AC WAVEFORMS For all waveforms, = 1.5V. In Sn En Yn Yn SF00150 SF00151 Waveform 1. Propagation Delay, Data to Output Waveform 2. Propagation Delay, Enable and Select to Output TEST CIRCUIT AND WAVEFORMS PULSE GENERATOR V IN V CC D.U.T. V OUT NEGATIVE PULSE 90% 10% t THL ( t f ) t w t TLH ( t r ) 10% 90% AMP (V) 0V R T C L R L Test Circuit for Totem-Pole Outputs POSITIVE PULSE 10% 90% t TLH ( t r ) t w t THL ( t f ) 90% 10% AMP (V) 0V DEFINITIONS: R L = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. C L = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. R T = Termination resistance should be equal to Z OUT of pulse generators. family 74F Input Pulse Definition INPUT PULSE REQUIREMENTS amplitude rep. rate t w t TLH t THL 3.0V 1.5V 1MHz 500ns 2.5ns 2.5ns SF Jan 05 5
6 DIP16: plastic dual in-line package; 16 leads (300 mil) SOT Jan 05 6
7 SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT Jan 05 7
8 Data sheet status Data sheet status Product status Definition [1] Objective specification Preliminary specification Product specification Development Qualification Production This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California Telephone Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Date of release: Document order number: Jan 05 8
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