RELATIONSHIP BETWEEN PHASE NOISE AND BIT ERROR RATIO (BER)

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RELATIONSHIP BETWEEN PHASE NOISE AND BIT ERROR RATIO (BER) As stated in the article RELATIONSHIP BETWEEN PHASE NOISE AND JITTER the Phase Noise of a stable crystal oscillator can be converted to an Rms jitter figure. This Rms jitter figure can be analysed further to show the contribution the crystal oscillator makes to the overall system Bit Error Ratio. Bit Error Ratio (BER, also known as the Bit Error Rate) is defined as The number of erroneous bits transmitted, received, or processed divided by the total number of bits transmitted, received, or processed for a given time period. This is a ratio, hence dimensionless, but convention states the number is expressed as ten to the power of a negative integer. For example a BER of 10-12 means for one million million (10 12 ) bits transmitted there is a statistical likelihood of receiving 1 bit in error. If the transmission was working at 10MHz (10 7 ) then we would expect to receive a bit in error once every 100000 seconds (10 5 ) i.e. approximately once every 28 hours. The cause of the error bits could be poor electronic / software design, environmental / electromagnetic fluctuations, but assuming the system design is robust then the over-riding cause of the error bits is inherent system jitter. The convention for displaying / studying BER is the Eye pattern as shown in Fig. 1. Note this is a representation of a typical Eye pattern for a complete transmit / receive system, not the crystal oscillator which will be shown to contribute a small percentage of the overall jitter performance. Figure 1 If Fig. 1 is the Eye pattern at the input to the receivers is the received bit a logic 1 or logic 0 circuitry then the ideal decision point is the centre of the Eye pattern opening as shown in Fig. 2. It follows that as the Eye pattern opening gets smaller (closes in on the ideal decision point) then the likelihood of miss reading the logic 1 or logic 0 will increase until the limit where the Eye pattern opening is so small it becomes impossible to distinguish between the two logic states. The same likelihood of miss reading the logic 1 or logic 0 happens if we move the ideal decision point away from the centre of the Eye pattern opening. Figure 2 Page 1 of 5

This allows us to plot contour lines of predicted BER as we move away from the ideal decision point (as shown in Fig. 3). The predicted BER at the ideal decision point (for this example) is approximately 10-32. For our 10MHz example this is a predicted error of 1 bit every 10 25 seconds, i.e. approximately once every million million million years. Figure 3 Fig. 4 shows the same contour lines of predicted BER as a three dimensional image to show the Bath Tub shape of the contour lines. The top of the Bath Tub has a value of 0.5, if we try to guess whether we have a logic 1 or logic 0 on the rising or falling edge of a perfect noise free waveform then the chances of guessing correctly is 50/50. Since BER is a statistical relationship the bottom of the Bath Tub can never be zero, just a very small number as demonstratedd above. Figure 4 From the article RELATIONSHIP BETWEEN PHASE NOISE AND JITTER the noise sources in a crystal oscillator are shown to be random (stochastic) rather than induced/repetitive (deterministic) and follow a normal Gaussian distribution. A stable crystal oscillator has negligible amplitude noise but will have some Phase Noise (jitter in the time domain), so for the remainder of this discussion only the Phase Noise contribution to BER will be considered and the distribution will be considered as Gaussian (random). Page 2 of 5

Fig. 5 shows the same Eye pattern with the Gaussian distribution of the Rms jitter (Phase Noise) superimposed. These Gaussian distributions are also know as Probability Density Functions. Figure 5 As the Eye pattern closes the crossing of the tails of the two distributions becomes more significant causing the BER to increase as shown in Fig. 6. Figure 6 Since the Probability Density Function is Gaussian it can be described in terms of its Standard Deviation (α) and it s Mean (centre of the distribution). For a crystal oscillator with only Phase Noise (negligible amplitude noise) then the Standard Deviation (α) is the Rms jitter value. The article RELATIONSHIP BETWEEN PHASE NOISE AND JITTER explains how to convert Phase Noise to Rms jitter. The contour lines of predicted BER are then also characterised by the Standard Deviation (α). If the Mean of each of the two distributionss is taken as where the perfect noise free waveforms rising and falling edges should have been (see Fig. 2) then the contour lines of BER will be a multiple of the Standard Deviation (α) in from these perfect edges as tabulated in Fig.7. Page 3 of 5

Figure 7 BER Distance in from the perfect noise free waveforms rising and falling edges (where α is the Rms jitter in seconds) forward from rising edge 10-03 +3.1 x α 10-04 +3.7 x α 10-05 +4.3 x α 10-06 +4.8 x α 10-07 +5.2 x α 10-08 +5.6 x α 10-09 +6.0 x α 10-10 +6.4 x α 10-11 +6.7 x α 10-12 +7.0 x α 10-13 +7.3 x α 10-14 +7.7 x α 10-15 +7.9 x α 10-16 +8.2 x α 10-17 +8.6 x α 10-18 +8.9 x α 10MHz Transmission One Error expected every 2GHz Transmission One Error expected every back from falling edge -3.1 x α ~100 microseconds ~500 nanoseconds -3.7 x α ~1 millisecond ~5 microseconds -4.3 x α ~10 milliseconds ~50 microseconds -4.8 x α ~100 milliseconds ~500 microseconds -5.2 x α ~1 second ~5 milliseconds -5.6 x α ~10 seconds ~50 milliseconds -6.0 x α ~2 minutes ~500 milliseconds -6.4 x α ~17 minutes ~5 seconds -6.7 x α ~3 hours ~1 minutes -7.0 x α ~28 hours ~8 minutes -7.3 x α ~12 days ~1 hour -7.7 x α ~4 months ~14 hours -7.9 x α ~3 years ~6 days -8.2 x α ~32 years ~2 months -8.6 x α ~320 years ~2 years -8.9 x α ~3200 years ~16 years A low Phase Noise 10 MHz Crystal Oscillator with the Phase Noise described by Fig. 8 will have an Rms Jitter figure (α) of:- 1.6ps (pico seconds) from 10Hz to 1MHz 4.0ps (pico seconds) from 12kHz to 10MHz 5.7ps (pico seconds) from 12kHz to 20MHz Figure 8 Page 4 of 5

In terms of real jitter the 10MHz crystal oscillator described in Fig. 8 only has jitter to 100kHz. Above 100kHz the Phase Noise plot is showing the noise floor of the HCMOS output buffer. Jitter to 10MHz suggest there is jitter at DC which does not make sense, and jitter to 20MHz implies a negativee frequency. There is 145dBc of Noise Power per Hertz of bandwidth at 20MHz, it just isn t Jitter. The article PHASE NOISE / JITTER IN CRYSTAL OSCILLATORS explains the concepts of Phase Noise. Assuming the Noise Power per Hertz of bandwidth above 100kHz (the jitter cut off frequency) still affects the Eye pattern opening then for the 12kHz to 20MHz jitter the 10-12 BER contour will be ±40ps in from the ideal clock edges (±7.0 α from the table in Fig.48 where α is 5.7ps). This is 80ps total for a period of 100000ps which is less than 0.1%. If this 10MHz Crystal Oscillator is used as the reference for a WCDMA network transmitting at ~2GHz then we have to consider what happens to the jitter when the frequency is multiplied up from 10MHz to 2GHz (i.e. x 200). All frequency multiplier circuits (digital or analog) pass any jitter present on the input un-attenuated to the output. For the above example this means if the multiplier circuit was completely noise free then the new clock still has 80ps total Jitter but this is now 80ps total of a new period of 500ps which is 16%. Fig. 9 shows, to scale, the above 10MHz Crystal Oscillator with 5.7ps Rms Jitter multiplied up to 2GHz showing the Crystal Oscillator Jitter still only uses a small percentage of the available Eye pattern Opening. Figure 9 In reality the x200 frequency multiplier circuit cannot be noise free and as a result will close the available Eye pattern opening further. If the additional Noise Power is random then the addition is RMS (i.e. square root of the sum of the noise powers squared), but more likely the additional Noise Power will be deterministic in which case it is a straight forward addition. Examples of deterministic Jitter in the multiplier circuit could be sub harmonic spurs for harmonic multiplication (i.e. 2GHz ± N*10MHz for this example) or non harmonically related spurs for Phase Locked Loop type multipliers. Next step: For more information email: info@rakon.co.uk Page 5 of 5