CHAPTER 16. THE NON-IDEAL OPAMP



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Circuits, Deices, Networks, and Microelectronics CHPTE 6. THE NON-IDEL OPMP 6. EFFECT OF FINITE GIN OF THE OPMP In Chapter 6 on the ideal operational amplifier it is characterized as an artifact with infinite gain, infinite input resistance and zero put resistance. These unrealistic but approachable properties gie it the highly desirable nullator-norator behaior when used in the feedback mode. s such the opamp can effectiely disappear and the transfer function then magically becomes an actie realization of the feedback network. But the opamp certainly does not completely disappear. It is a construct, a topology of nodes and branches consisting of transistors, resistances, and capacitances. These internal components impose circuit performance qualifications on its use and application. nd in order to effectiely employ it as a circuit component these qualifications need to be sorted, identified, and passed along to the circuit simulation macro that is used to represent and distinguish one opamp from another. fter transistors and transistor amplifiers hae been introduced and analyzed, most of the constraints are obious. Transfer characteristics in,, and are finite, not infinite or zero. The fruency response is finite. nd since diffamps are inoled, the common-mode rejection concern is finite. nd finally, there is a constraint associated with large swing, i.e. d /dt slew rate = finite, typically on the order of.0/s. There are een a few others associated with offsets and power supply constraints, but these constraints are the big four. econsider the ery first instance of the opamp feedback topology identified by chapter 6 in which the feedback network is a, 2 oltage diider. This topology is indicated by figure 6.- (which is the same as figure 6.2-) Figure 6.-. The opamp with feedback ia a oltage diider. The fraction of fed back as F to the inerting input ( - ) is (6.-a) F for which the feedback factor is 429

Circuits, Deices, Networks, and Microelectronics (6.-b) 2 nd since ) ( ) ( F ( ) Collecting terms in and we hae the result (6.-2a) ssuming large (i.e. nearly ideal) this uation will simplify to = IDEL = NI (6.-2b) for which with uation (6.-b) the transfer gain (for the non-inerting topology) is then 2 2 = NI (6.-3) and is the same as that of the ideal. Otherwise, for = finite, uation (6.-2a) should be rewritten as (6.-4a) Using uation (6.-2b) this can be written as NI IDEL (6.-5) It so happens that uation (6.-5) will hae the same form for its sibling figure 6.-(b). nd this premise can be confirmed by nodal analysis at the feedback node F (= inerting input - ), i.e. ( G G2 ) G2 G 0 (6.-6a) and since / and + = 0, then / and ( G G2 ) G2 G 0 Equation (6.-6b) can be rewritten as (6.-6b) 430

Circuits, Deices, Networks, and Microelectronics ( G G2 ) G 2 G G 2 (6.-6c) The first conductance ratio in (6.-6c) is the same as the reciprocal of uation (6.-b), i.e. G2 G G 2 2 Een though this may be a so what, it puts uation (6.-6c) in the form G G 2 (6.-6d) If we should let large (i.e. like that for the ideal opamp) uation (6.-6d) becomes G G 2 (6.-7) 2 nd this result is (as expected) the ideal transfer gain for the inerting topology. Equation (6.2-6d) then would be of the form 2 IDEL (6.-8) Notice that this is the same form as uation (6.-5). How ab that? o we hae a (readjusted) summary for the, 2 opamp topologies : Non-inerting topology (input at + ): Inerting topology (input to - thru ): If gain is finite (and large) then: Where: NI 2 IDEL = NI IDEL 2 IDEL Table 6.-. ummary of the, 2 (oltage diider) opamp topologies. The last uation (the Where one) is how the feedback factor is acquired. 43

Circuits, Deices, Networks, and Microelectronics Table 6.- is a benchmark that implies a uniersal recipe for all opamp topologies. This recipe is reflected by table6.-2.. ssume that the inputs are irtually connected (nullator context). 2. Execute a nodal analysis at feedback node F (= - ) 3. Continue with a nodal analysis through the feedback network until is reached. 4. Execute an (additional) analysis of the uialent non-inerting topology to find feedback factor 5. Qualify the result of part 3 by means of Table 6.-2. eised recipe for finding / for any and all opamp topologies. The feedback factor is needed for almost all of the non-ideal constraints on an opamp topology. o an analysis of the non-inerting topology is one of the essentials. IDEL 6.2 FINITE FEQUENCY EPONE OF THE OPMP The fruency response of the real opamp has the same character as any other real circuits due to the time constants inherent to all circuits and deices. The principal distinction is that opamp circuits also must answer to feedback, and so must be specifically compensated so that the fruency response will be of the form of a single pole (single time constant) low-pass response, as illustrated by figure 6.2-. TC (single-times constant) response is necessary and essential for feedback stability. Figure 6.2-. Fruency response of the LM324 opamp (PICE simulation). 432

Circuits, Deices, Networks, and Microelectronics Figure 6.2- is a PICE rendition of Bode magnitude plot for the LM324 opamp. The cursors mark the specific characteristics of this response. For this opamp (f= low) = 5.9dB. t high fruencies f rolls off to 0.895 MHz at (f) = 0dB. These benchmarks are called the zero fruency gain 0 and the unity-gain fruency. The unity-gain fruency f T is also called the gain-bandwidth product (GB). Note that the fruency response for the opamp is not identified by the corner (= f ). For the LM324 the corner (by inspection) is approximately = 2.3kHz. If you do the math you will find that this alue corresponds almost exactly to f = f T / 0. Otherwise the opamp will hae fruency response (for f < f T ) of the form. 0 (6.2-) s / where = 2f and 0 is the zero fruency (oltage) gain. Using the same mathematics as before, i.e. uation (6.2-2a) then which is better sered if expressed as F (6.2-2) If uation (6.2-) is applied to uation (6.2-2) a little more informatie form results F 0 ( s / ) ( s / ) 0 0 ( s / ) 0 which can be written as F 0 s / 0 0 0 s / 0 or in simplified form, F F 0 s / (6.2-3) F 433

Circuits, Deices, Networks, and Microelectronics In this uation F0 is the zero fruency gain with feedback. nd is F 0 (6.2-4a) 0 0 Now F is the fruency corner (bandwidth) for the feedback topology and is gien by ) (6.2-4b) ( F 0 Note that the product of (6.2-4a) and (6.2-4b) will be F 0 F 0 T (6.2-5) This result is not unexpected since unity gain fruency and all fruencies associated with uation (6.2-4b) will fall on the linear slope of the roll-off. ummary: Fruency response of the non-ideal opamp is specified () zero fruency gain 0 and (2) by f T = unity-gain fruency. f T is also called the gain-bandwidth product. Bandwidth f F of a circuit with feedback = f T / F0 (by uation 6.2-5) and since F0 / f F = f T Table 6.2-. Fruency response of opamp topologies (with passie feedback networks). The analysis shows that the fruency response of a passie opamp topology (no reactie components) is defined entirely by the feedback factor. o it is the same for either the non-inerting or the inerting topology and in simplest form is gien as f F = f T. 434

Circuits, Deices, Networks, and Microelectronics EXMPLE 6.2-: double-t topology is constructed with an opamp that has 0 = 50dB and f T =.0MHz. Determine the gain and bandwidth of this circuit. OLUTION: Transfer gain is found by nodal analysis, beginning with the feedback node -. node - : ( 0.0.005) (.005) 0 where (irtual connection of inputs) 3 node : ( 0.005.005.005) (.005) 2 (.005) 0 3 ( 3 ) 2 0 2 8 node 2 : 2 ( 0.005.005.005) (.005) (.005) 0 ( 8 ) ( 3 ) 0 2 (same as NI = 2) 3 2 (for which = /2). Thus the (non-inerting) gain F0 = 2 with fruency corner (bandwidth) at f F =f T =.0MHz/2 = 47.6 khz Note that if the configuration in this example been of the inerting option it is still necessary to determine NI to determine the bandwidth. Emphasis is repeated, that uation (6.2-5) relates only to the noninerting gain. 6.3 FINITE INPUT ND OUTPUT EITNCE OF THE OPMP nother qualification of the opamp is that the input resistance in is finite. If not large, in will load down the source and compromise the buffer nature of the opamp input. Fortunately feedback enhances input resistance and so een a modest in will become large. This aspect is easy enough to ascertain and may be determined by an expanded iew of the opamp, as represented by figure 6.3-435

Circuits, Deices, Networks, and Microelectronics Figure 6.3-. Inside look at the opamp, with in enhanced by feedback. From the figure i in if ( ) / i ( ) / i I F in I I in I if i in (6.3-) in The multiplication factor (+ ) can be huge since is expected to be large and is not likely to be small. Howeer the enhancement of input resistance must be qualified because is also fruency dependent, as defined by uation (6.2-). o the input resistance becomes an element Z if with fruency character due to the feedback loop, as represented by figure 6.3-2. Figure 6.3-2. Effect of feedback on input resistance. The nature of this dependence can be resoled by applying uation (6.2-) to (6.3-), for which 436

Circuits, Deices, Networks, and Microelectronics Z if s / 0 in in i where Z is the fruency dependent part and is of form ewritten as an admittance for which and C Z 0 G 0 s / Z (6.3-2a) Z i 0. s / ) ( Y i 0 i G sc (6.3-2b) (6.3-3a) i T i (6.3-3b) F i where the (gain-bandwidth) definition T = 0 has been inoked as well as F = T Typical alues of and C are represented by example 6.3- EXMPLE 6.3-: Ealuate the uialent input impedance terms for the ual-resistance T-network drien by an opamp for which 0 = 52dB, i = 00k, and f T = 2MHz. OLUTION: The circuit is a non-inerting topology. By nodal analysis (and by inspection) NI = 5.0/ and so = / NI = 0.2. From uation (6.3-3a), 0i 0.2 400 00k = 8.0M and from uation (6.3-3b), C T i 0.2 (2 2MHz) 00k 0.6 = 4.0pF 2 2 0.2 2MHz 00k.04 0 437

Circuits, Deices, Networks, and Microelectronics eisiting the analysis of Z IF, Z, Y, and C, the input to the opamp should be expected to be uialent to an C circuit of the topology shown by figure 6.3.4. Figure 6.3-4. Equialent input topology of the opamp with feedback. The C time constant of this network is approximately = in C. o for example 6.3-, = 00k 4pF = 400ns, or a fruency corner f = (/2) (/) = 400 khz. This result is the same as f F = f T. In like manner as the resistance at the input, resistance at the put is also defined by feedback. The internal uialent circuit that feeds the put node is shown by figure 6.3-5. Figure 6.3-5. Internal uialent circuit and put resistance topology with feedback. esistance into the opamp at is = /i o s represented by the figure the current into will be i O = ( I )/ o. o put conductance G = / will be G i I o 0 (6.3-4) 438

Circuits, Deices, Networks, and Microelectronics For ealuation of put resistance = 0 is ruired. o for - = F = then I = F = and uation (6.3-4) becomes G = G o ( + )/ = G o ( + ) (6.3-5) By uation (6.2-) is fruency dependent and so conductance G Y is of the form Y G G G Y (6.3-6) o o o for which Y contains the fruency character of. ewriting it as Z = /Y and making use of uation (6.2-) gies a form with separated uialent components. Z s / sl Go 0 Go 0 Go 0 s (6.3-7) For which the two uialents and L are then o (6.3-8a) G o 0 0 L (6.3-8b) G G o 0 o T since 0 = T. Courtesy of this analysis the put node of an opamp with feedback will then be uialent to the topology of figure 6.3-6. Figure 6.3-6. Equialent put circuit according to uations (6.3-6) and (6.3-7) 439

Circuits, Deices, Networks, and Microelectronics EXMPLE 6.3-2: The circuit shown uses an opamp with zero fruency gain 0 = 52 db, gainbandwidth product GB = 2MHz, and put resistance o = 00. Determine put uialent impedance terms and L. OLUTION: The circuit shown is an inerting topology. (By inspection) the uialent non-inerting topology will hae NI = 8.0. Therefore = / NI = /8. o 00 / 8 400 0 = 2.0 L o 2 f T 00 0.6 / 8 2MHz = 64H If the backend of the opamp is assessed in terms of time constants, then for the alues of example #6.3-2 = L / o = 64H /00 = 0.64s and corresponds to fruency corner f = (/2) (/) = 250 khz. Note that this alue is the same as f F = f T. (= 0.25 2MHz) ummary table: Effect of the feedback loop on input and put impedance. Input uialent impedance Z in : Output uialent admittance Y : 0 o in 0 C L 2 ft o 2 f T in Table 6.3-. Input/put uialent impedance/admittance terms. 440

Circuits, Deices, Networks, and Microelectronics 6.4 COMMON MODE IGNL EJECTION (CM) s emphasized by its circuit symbol, an opamp is a differential amplifier. diffamp is a topology that is characterized by a large differential gain diff, and a common-mode gain CM that usually is fairly small. The ability to reject common-mode signal is defined by the common-mode rejection ratio (CM) diff CM (6.4-) CM The opamp construct has a font end of the form of an operational transconductance amplifier (OT) which is either an emitter- or source- coupled pair. For most OTs the ECP or CP transistor pair is a matched pair of transistors with stiff actie load to create a relatiely high gain amplifier. The shared current tail for the transistor pair is also fairly stiff. With those caeats, the CM for an opamp is typically ery large, on the order of 00dB. The CM primarily affects differential amplifier constructs such as that shown by figure 6.4-. In this figure the signal that appears at the + node is common to both inputs and so an error signal will be passed to the put Figure 6.4-. imple diffamp. ymmetry is important and this circuit will reject common signals as long as 4 / 3 = 2 / (= ). The symmetry criterion plays a role in other diffamp constructs such as the I shown by figure 6.4-2. Figure 6.4-2a. ppice schematic of I (Instrumentation amplifier) constructed with the general purpose LM324 opamp. Input signal = 0kHz carrier signal with one input carrying a 2kHz signal. 44

Circuits, Deices, Networks, and Microelectronics Figure 6.4-2b. The differential put appears as a 2kHz signal with the 0kHz carrier almost completely rejected. Fourier analysis confirms that the CM for this circuit is approximately 90dB. diffamp circuit with less symmetry, as represented by figure 6.4-3, will not necessarily be successful in suppression of the common signal. Figure 6.4-3. ppice schematic of alternatie differential amplifier topology using the general purpose LM324 opamp. Input signal = 0kHz carrier signal with one input carrying a 2kHz signal, identical inputs to that of figure 6.2-2 (for the I). In this case the carrier signal is poorly rejected. CM assessment using Fourier analysis gies a circuit CM of only 39dB. From these figures it should be emphasized that simulation is an analytical necessity for the behaior of circuits with constraints. The CM for an opamp is assessed by a circuit construct of the form shown by figure 6.4-4. ince O 2 CM and O CM CM Diiding by and collecting terms gies CM ince 2 then o CM Figure 6.4-4: construct for CM ealuation CM CM CM O 2 CM (6.4-2) CM 442

Circuits, Deices, Networks, and Microelectronics The reciprocal of the transfer ratio O / CM identified by uation (6.4-2) for seeral opamps is shown by figure 6.4-5 for seeral opamps. The y-axis is in db and the x-axis = fruency. The one with the lowest CM of 70dB corresponds to the general purpose LM324 opamp used in figures 6.4-2 and 6.4-3.. Figure 4.4-5: CM s fruency for the LM324, u74c, and the LF4 6.5 LEW-TE The fruency response limitation of the opamp as identified by section 6.2 is not unexpected, inasmuch as all circuits hae internal time constants that define their ability to respond to fruencies. It is less apparent that there are other time constraints that are not related to the familiar C time constants. The non-ideal opamp has one such. It relates to the fact that non-ideal opamps are compensated with an internal (compensation) capacitance = C C that pulls the dominant pole down to a leel under which the fruency response will be dominated by a single-pole response. This internal capacitance must be charged and discharged not only by the normal time constants but also by the differential pair of transistors when they are fully tilted by a large oltage swing. This constraint manifests itself in terms of an inability of the put to make large swings quickly, i.e. it cannot slew the put oltage quickly and d = constant dt I C EE (6.5-) C Current I EE is that of the current source that dries the coupled (differential) pair. The slew-rate () is typically on the order of.0/us for a general purpose opamp. High-performance opamps such as those deployed within integrated circuit designs can be made with slew rates on the order of 50/us. The slew rate also places an amplitude distortion limit on the fruency since as the put cannot swing large oltages at higher fruencies. For ( t) sin( t) this limit manifests itself as a 443

Circuits, Deices, Networks, and Microelectronics d and thus a cos( t) which has a maximum slope at t = 0 dt ince the maximum amplitude is defined by the power supply rails, then the slew rate defines a maximum fruency at maximum put swing defined by d dt MX (max) (2f ) a m where f m = maximum power bandwidth, gien by where = a (max) is (approximately) the supply rail oltage. f m 2 (6.5-2) EXMPLE 6.5-: n opamp with =.0/us is supplied by oltage rails of ± 0. (a) What is the maximum power bandwidth and (b) what is the highest fruency f for an undistorted of 2.0? OLUTION: (a) f m ( 0.6).0( s) / 0 = 6kHz (b) f m f f 0 2 6kHz = 80kHz Example 6.5- points that a reduction of the put amplitude accommodates higher fruency with distortion by the slew rate. The effect of slew rate on the put signal is represented by figure 6.5-, for which an LM324 generalpurpose opamp attempts to swing a large signal. The for the LM324 is ab 0.5/us. Figure 6.5-. imulation of LM324 which is intending to swing an put signal from 5 to +5 but afflicted by the d/dt slope constraint of = 0.5/us. Consuently the put ends up looking like a triangular wae. 444

Circuits, Deices, Networks, and Microelectronics 6.6 OPMP MCOMODEL While it might be expected that the opamp parts in the (PICE) library are a multiple-transistor construct, that is neither a fact nor practical. The typical opamp circuit consists of 24-30 transistors, somewhat like the form shown by figure 6.6-. If such a circuit were inoked for each opamp the simulation would become swamped by an excess of inisible nodes and deices. The simulator would then slow to a crawl trying to iterate all of these nodes and interconnected transistor uations. Figure 6.6-. chematic of the ICL874 opamp o instead we deise a much simpler macromodel that is little more than a transistor coupled-pair on the front end followed by a few ideal dependent sources with parameters as necessary to effect the transfer characteristics. Diodes are included to characterize the oltage/current limits of the opamp. typical opamp macro is represented by figure 6.6-2 (which in this case is for the LM324 opamp) 445

Circuits, Deices, Networks, and Microelectronics Figure 6.6-2(a). Macromodel for the LM324 ppice opamp. Figure 6.6-2(b). ppice node list for LM324 macromodel. For opamp macromodels the construct is similar but the components may change according to the technology. The LF4 part, for example is a jfet opamp, as reflected by its macromodel. 446

Circuits, Deices, Networks, and Microelectronics Figure 6.6-3(a). Macromodel for the LF4 ppice opamp. The input is a njfet source-coupled pair and it distinguishes its performance characteristics. Figure 6.6-3(b). ppice node list for LF4 macromodel Macromodels are a necessity for packaged circuits. The forms indicated by figures 6.6-2 and 6.6-3 are the ones that exist in the pspice library. 447

Circuits, Deices, Networks, and Microelectronics The somewhat simpler cousin, the ideal opamp macromodel is a T (oltage-oltage transducer) with large gain factor, as indicated by figure 6.6-4. It is an uialent to a nullator-norator element. Figure 6.6-4. Macromodel for ideal opamp. ince there are no internal nodes and the part (the T) is linear, this model does not add any additional oerhead to the simulation. n option that is one step closer to a real opamp is one that adds an an in and an to figure 6.6-4. Figure 6.6-5. Enhanced macromodel for ideal opamp. in = M and = 50. TC fruency character can be added to the model with a topology as represented by figure 6.6-6 Figure 6.6-6. Macromodel with in = M, = 50, and TC fruency corner 50Hz. 448

Circuits, Deices, Networks, and Microelectronics The macromodel of figure 6.6-6 does not include performance constraints such as CM and slew rate. They can only be accommodated if a differential pair is included. The use of a differential pair is a major upgrade, since by default, a power supply must also be assumed. Power supply nodes must be added to the circuit symbol. In the macromodels represented by figures 6.6-2 and 6.6-3, the differential pair front end is the signature of a more mature construct. simplified ersion is shown by figure 6.6-7. Figure 6.6-7. In this case there are two stages with the input stage defined by the differential pair M and M2 and the next stage defined by the two CTs G and G 2. lew rate is defined by the current source and C 2. Capacitance C 2 also defines the fruency corner. The two CTs define () the differential gain and (2) the common-mode gain, with relatie magnitudes as represented by Ga and Gcm. The CCT (denoted by F2) plays a critical role in both the signal gain and the fruency corner. For the sake of the slew rate, which is an amplitude swing, capacitance C 2 must be small, on the order of pf (see uation 6.5-). For the sake of the roll-off corner which must be on the order of 0HZ to 00Hz if it is to match the compensated fruency profile for the opamp, the capacitance must be large. This ruirement is accomplished by a Miller multiplication effect across the capacitance by means of the CCT. The multiplying factor is approximately that of the CCT and gies result f (6.6-) 2 kc O 2 Other relationships that relate to the enhanced macros of figure 6.6-7 are d dt = constant = I (6.6-2) C 2 449

Circuits, Deices, Networks, and Microelectronics with transfer gain O I g G k (6.6-3) m D a O where g m is the transconductance of the (balanced) input FETs. The CM is self-eident as CM Ga Gcm (6.6-4) simulation of figure 6.6-7 with the MOFET modeled as (LEEL=, TOX=3.8n, UO=400, GMM = 0.5, PHI = 0.75) and W/L = 20.0u/.0u is shown by figure 6.6-8. Figure 6.6-8. imulation of figure 6.6-7 with the MOFETs defined such that the conduction coefficient is K = 000/ 2. s indicated by the cursors the gain is 84.7dB and f T = 3.396MHz. Comparison of figures 6.6-3 and 6.6-7 emphasizes that the introduction of real components (i.e. the coupled pair) means that two more nodes must be included with the part, namely those of the power supply. Then constraints and implications associated with the power supply need to be modeled. Figure 6.6-7 does not do so. Power supply constraints ruire an entirely different leel of complexity and must be accomplished by a framework of diode components and polyfunctions, as indicated by figure 6.6-2 and 6.6-3. s a footnote to the macromodel constructs, the alue gien to transconductance gain Ga is always set as Ga = /c (= /d for FET) (6.6-5) This choice assures that uation (6.6-2) for the macromodel alue is alid and consistent with the definition of slew rate. 450

Circuits, Deices, Networks, and Microelectronics UMMY ND POTFOLIO Feedback factor /T NI where T NI = gain for non-inerting topology, ideal opamp T ( non ideal) T IDEL where = finite gain Gain-bandwidth: lew rate: d dt MX I C GB f T f 3dB 3dB corner f 3 db ft a m 2 f f f m full-power bandwidth Finite in and finite : Input uialent impedances: Output uialent admittances: 0 o 0 i C L 2 f 2 o f T i T Macromodels: iee c2 CM ga gcm 45

Circuits, Deices, Networks, and Microelectronics PPENDIX 5-. imulations of selected opamps () Open-loop transfer characteristics 0 (74C) = 06 db f T = 93 khz 0 (LM324) = 50 db f T = 955 khz 0 (LF4) = 2 db f T = 7.0 MHz () Common-mode rejection ratio CM O CM CM CM (LM324) = 70 db CM (u74) = 90 db CM (LF4) = 06 db 452