AUIRFR8405 AUIRFU8405

Features Advanced Process Technology New Ultra Low On-Resistance 75 C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * AUTOMOTIVE GRADE Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 75 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and wide variety of other applications. Applications Electric Power Steering (EPS) Battery Switch Start/Stop Micro Hybrid Heavy Loads DC-DC Converter AUIRFR8405 AUIRFU8405 V DSS 40V R DS(on) typ..65m max..98m I D (Silicon Limited) 2A A I D (Package Limited) D G S D-Pak AUIRFR8405 S D G I-Pak AUIRFU8405 G D S Gate Drain Source D Base part number Package Type Standard Pack Form Quantity Orderable Part Number AUIRFU8405 I-Pak Tube 75 AUIRFU8405 AUIRFR8405 D-Pak Tube 75 AUIRFR8405 Tape and Reel Left 3000 AUIRFR8405TRL Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25 C, unless otherwise specified. Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 2 I D @ T C = C Continuous Drain Current, V GS @ V (Silicon Limited) 50 I D @ T C = 25 C Continuous Drain Current, V GS @ V (Package Limited) A I DM Pulsed Drain Current 804 P D @T C = 25 C Maximum Power Dissipation 63 W Linear Derating Factor. W/ C V GS Gate-to-Source Voltage ± 20 V T J Operating Junction and -55 to + 75 T STG Storage Temperature Range C Soldering Temperature, for seconds (.6mm from case) 300 Avalanche Characteristics E AS Single Pulse Avalanche Energy (Thermally Limited) 208 E AS (tested) Single Pulse Avalanche Energy (Tested Limited) 256 mj I AR Avalanche Current See Fig. 4, 5, 24a, 24b A E AR Repetitive Avalanche Energy mj Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case 0.92 R JA Junction-to-Ambient ( PCB Mount) 50 C/W R JA Junction-to-Ambient HEXFET is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 205--2

Static @ (unless otherwise specified) AUIRFR/U8405 Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 40 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.03 V/ C Reference to 25 C, I D = 5mA R DS(on) Static Drain-to-Source On-Resistance.65.98 m V GS = V, I D = 90A** V GS(th) Gate Threshold Voltage 2.2 3.0 3.9 V V DS = V GS, I D = µa I DSS Drain-to-Source Leakage Current.0 V µa DS = 40V, V GS = 0V 50 V DS = 40V,V GS = 0V,T J =25 C Gate-to-Source Forward Leakage V GS = 20V I GSS na Gate-to-Source Reverse Leakage - V GS = -20V R G Internal Gate Resistance 2.3 Dynamic Electrical Characteristics @ (unless otherwise specified) gfs Forward Trans conductance 294 S V DS = V, I D = 90A** Q g Total Gate Charge 3 55 I D = 90A** Q gs Gate-to-Source Charge 26 V DS = 20V nc Q gd Gate-to-Drain Charge 38 V GS = V Q sync Total Gate Charge Sync. (Q g - Q gd ) 65 t d(on) Turn-On Delay Time 2 V DD = 26V t r Rise Time 80 I D = 90A** ns t d(off) Turn-Off Delay Time 5 R G = 2.7 t f Fall Time 5 V GS = V C iss Input Capacitance 57 V GS = 0V C oss Output Capacitance 770 V DS = 25V C rss Reverse Transfer Capacitance 523 pf ƒ =.0MHz, See Fig. 5 C oss eff. (ER) Effective Output Capacitance (Energy Related) 939 V GS = 0V, V DS = 0V to 32V C oss eff. (TR) Effective Output Capacitance (Time Related) 54 V GS = 0V, V DS = 0V to 32V Diode Characteristics Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol I S 2 (Body Diode) showing the A Pulsed Source Current integral reverse I SM 804 (Body Diode) p-n junction diode. V SD Diode Forward Voltage 0.9.3 V,I S = 90A**,V GS = 0V dv/dt Peak Diode Recovery dv/dt 2. V/ns T J = 75 C,I S = 90A**,V DS = 40V t rr Reverse Recovery Time 28 ns 29 Q rr Reverse Recovery Charge 9 nc 20 I RRM Reverse Recovery Current. A V R = 34V, I F = 90A** di/dt = A/µs Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is A by source bonding technology. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-40) Repetitive rating; pulse width limited by max. junction temperature. (See fig. ) Limited by T Jmax, starting, L = 0.05mH, R G = 50, I AS = 90A, V GS =V. Part not recommended for use above this value. I SD 90A, di/dt 304A/µs, V DD V (BR)DSS, T J 75 C. Pulse width 400µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from 0 to 80% V DSS. When mounted on " square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at T J approximately 90 C. Pulse drain current is limited by source bonding technology. ** All AC and DC test condition based on old Package limitation current = 90A. 2 205--2

C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) AUIRFR/U8405 0 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.8V VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.8V 4.8V 4.8V 60µs PULSE WIDTH Tj = 25 C 0. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics 60µs PULSE WIDTH Tj = 75 C 0. V DS, Drain-to-Source Voltage (V) Fig. 2 Typical Output Characteristics 0 2.0 I D = 90A V GS = V T J = 75 C.6.2 0. V DS = V 60µs PULSE WIDTH 2 3 4 5 6 7 8 V GS, Gate-to-Source Voltage (V) 0.8 0.4-60 -20 20 60 40 80 T J, Junction Temperature ( C) Fig. 3 Typical Transfer Characteristics Fig. 4 Normalized On-Resistance vs. Temperature 000 00 V GS = 0V, f = MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C iss 4.0 2.0.0 8.0 I D = 90A V DS = 32V V DS = 20V 0 C oss C rss 6.0 4.0 2.0 0. V DS, Drain-to-Source Voltage (V) 0.0 0 20 40 60 80 20 40 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 205--2

Energy (µj) E AS, Single Pulse Avalanche Energy (mj) V (BR)DSS, I D, Drain Current (A) Drain-to-Source Breakdown Voltage (V) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) 0 00 AUIRFR/U8405 OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 75 C 0 µsec Limited by Package msec V GS = 0V 0. 0.2 0.6.0.4.8 V SD, Source-to-Drain Voltage (V) Tc = 25 C Tj = 75 C Single Pulse msec DC 0. 0. V DS, Drain-to-Source Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 240 2 Limited By Package 48 47 Fig 8. Maximum Safe Operating Area Id = 5.0mA 80 46 50 20 90 45 44 43 60 42 30 0 25 50 75 25 50 75 T C, Case Temperature ( C) 4 40-60 -20 20 60 40 80 T J, Temperature ( C ) Fig. 9 Maximum Drain Current vs. Case Temperature 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0. Fig. Drain-to-Source Breakdown Voltage 900 800 700 600 500 400 300 200 I D TOP 8A 37A BOTTOM 90A 0.0-5 0 5 5 20 25 30 35 40 45 V DS, Drain-to-Source Voltage (V) Fig. Typical COSS Stored Energy 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig 2. Maximum Avalanche Energy vs. Drain Current 4 205--2

E AR, Avalanche Energy (mj) AUIRFR/U8405 Thermal Response ( Z thjc ) C/W 0. 0.0 D = 0.50 0.20 0. 0.05 0.02 0.0 0.00 SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc 0.000 E-006 E-005 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) 0 Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case Duty Cycle = Single Pulse 0.0 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 50 C and Tstart =25 C (Single Pulse) Avalanche Current (A) 0.05 0. Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25 C and Tstart = 50 C..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) 250 200 50 50 TOP Single Pulse BOTTOM.0% Duty Cycle I D = 90A 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy Vs. Temperature Fig 4. Typical Avalanche Current Vs. Pulse width Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-5 at www.infineon.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 22a, 22b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25 C in Figure 3, 4). tav = Average time in avalanche. D = Duty cycle in avalanche = tav f ZthJC(D, tav) = Transient thermal resistance, see Figures 3) P D (ave) = /2 (.3 BV I av ) = T/ Z thjc I av = 2 T/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 5 205--2

I RRM (A) Q RR (nc) I RRM (A) Q RR (nc) V GS(th), Gate threshold Voltage (V) AUIRFR/U8405 8.0 4.5 I D = 90A 4.0 6.0 3.5 R DS(on), Drain-to -Source On Resistance (m ) 4.0 3.0 2.0 2.5 2.0.5 ID = µa ID = 250µA ID =.0mA ID =.0A 0.0 4 6 8 2 4 6 8 20 V GS, Gate -to -Source Voltage (V).0-75 -25 25 75 25 75 225 T J, Temperature ( C ) Fig 6. On-Resistance vs. Gate Voltage Fig. 7 - Threshold Voltage vs. Temperature 9 8 7 6 I F = 36A V R = 34V 20 90 80 70 I F = 36A V R = 34V 5 60 4 3 2 0 0 200 400 600 800 0 50 40 30 20 0 200 400 600 800 0 di F /dt (A/µs) di F /dt (A/µs) Fig. 8 - Typical Recovery Current vs. dif/dt Fig. 9 - Typical Stored Charge vs. dif/dt 8 7 6 5 I F = 90A V R = 34V 80 60 I F = 90A V R = 34V 4 3 40 2 20 0 0 200 400 600 800 0 di F /dt (A/µs) 0 0 200 400 600 800 0 di F /dt (A/µs) Fig. 20 - Typical Recovery Current vs. dif/dt Fig. 2 - Typical Stored Charge vs. dif/dt 6 205--2

AUIRFR/U8405 9.0 6.0 VGS = 5.5V VGS = 6.0V VGS = 7.0V VGS = 8.0V VGS = V R DS (on), Drain-to -Source On Resistance ( m ) 3.0 0.0 0 200 300 400 500 I D, Drain Current (A) Fig 22. Typical On-Resistance vs. Drain Current 7 205--2

AUIRFR/U8405 Fig 23. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 20V tp D.U.T I AS 0.0 + - V DD A I AS Fig 24a. Unclamped Inductive Test Circuit Fig 24b. Unclamped Inductive Waveforms Fig 25a. Switching Time Test Circuit Fig 25b. Switching Time Waveforms Vds Id Vgs Vgs(th) Qgs Qgs2 Qgd Qgodr Fig 26a. Gate Charge Test Circuit Fig 26b. Gate Charge Waveform 8 205--2

AUIRFR/U8405 D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) D-Pak (TO-252AA) Part Marking Information Part Number IR Logo AUFR8405 YWWA XX XX Date Code Y= Year WW= Work Week Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 205--2

AUIRFR/U8405 I-Pak (TO-25AA) Package Outline (Dimensions are shown in millimeters (inches) I-Pak (TO-25AA) Part Marking Information Part Number IR Logo AUFU8405 YWWA XX XX Date Code Y= Year WW= Work Week Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 205--2

AUIRFR/U8405 D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TR TRR TRL 6.3 (.64 ) 5.7 (.69 ) 6.3 (.64 ) 5.7 (.69 ) 2. (.476 ).9 (.469 ) FEED DIRECTION 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-48 & EIA-54. 3 INCH NOTES :. OUTLINE CONFORMS TO EIA-48. 6 mm Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 205--2

AUIRFR/U8405 Qualification Information Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model RoHS Compliant Automotive (per AEC-Q) Comments: This part number(s) passed Automotive qualification. Infineon s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D-Pak MSL I-Pak Class M3 (+/- 400V) AEC-Q-002 Class HC (+/- 2000V) AEC-Q-00 Class C5 (+/- 2000V) AEC-Q-005 Yes Highest passing voltage. Revision History Date Comments /7/204 Corrected label on SOA curve Fig 8 on page 4. Updated Package outline on page 9 & /2/205 Updated datasheet with corporate template Corrected ordering table on page. Published by Infineon Technologies AG 8726 München, Germany Infineon Technologies AG 205 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 2 205--2