Cypress Semiconductor Technology Qualification Report



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Cypress Semiconductor Technology Qualification Report QT# 012415 VERSION 1.2 November, 2002 TSMC 0.15um Technology, Fab TSMC CY7C1371B/CY7C1373B CY7C1381B/CY7C1383B CY7C1381BV25/CY7C1383BV25 CY7C1371BV25/CY7C1373BV25 CY7C1370B/CY7C1372B CY7C1380B/CY7C1382B CY7C1386B/CY7C1387B CY7C1380BV25/CY7C1382BV25 CY7C1386BV25/CY7C1387BV25 CY7C1370BV25/CY7C1372BV25 18Meg Synchronous SRAM 512K x 36 / 1M x 18 No Bus Latency and NoBL are trademark of Cypress Semiconductor Corporation. ZBT is a Trademark of Integrated Device Technology. CYRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Al Laxman Reliability Director Quality Engineering (408) 432 7069 (408) 942 2001

Cypress Semiconductor QT # 012415 V, 1.2 18Meg, Synchronous SRAM age 2 of 8 TECHNOLOGY QUALIFICATION HISTORY Qual Report 012415 Description of Qualification urpose New Technology TSMC 0.15um / 1 8Meg Synchronous SRAM Device, CY7C1380B and Device family. Date Comp Jun 01

Cypress Semiconductor QT # 012415 V, 1.2 18Meg, Synchronous SRAM age 3 of 8 RODUCT DESCRITION (for qualification) Qualification urpose: Qualify New Technology, TSMC 0.15um, TSMC Fab and CY7C1380B and device family. Marketing art #: Device Description: Cypress Division: CY7C1380B 2.5V, 3.3V, Industrial and Commercial available in 119-ball BGA and 100-pin TQF package. Cypress Semiconductor Corporation Memory roduct Division (MD) Overall Die (or Mask) REV Level (pre-requisite for qualification): What ID markings on Die: GVT71512C36Y Rev. B TECHNOLOGY/FAB ROCESS DESCRITION Number of Metal Layers: 8 Metal Composition: Metal 1: 3,000Å - TiN / Al Metal 2: 4,000Å - TiN / Al Metal 3: 8,000Å - TiN / Al assivation Type and Materials: 6,000Å Sn / 10,000Å Oxide Free hosphorus contents in top glass layer(%): 0% Number of Transistors in Device 120 million Number of Gates in Device 40 million Generic rocess Technology/Design Rule (µ-drawn): CMOS, 13M, 6T, 0.15 µm Gate Oxide Material/Thickness (MOS): Name/Location of Die Fab (prime) Facility: Die Fab Line ID/Wafer rocess ID: SiO2, 26Å ± 2Å TSMC, Taiwan TSMC, 015um Technology ACKAGE AVAILABILITY ACKAGE ASSEMBLY SITE FACILITY 119-ball FBGA 100-pin TQF ASE SIL Note: ackage Qualification details upon request

Cypress Semiconductor QT # 012415 V, 1.2 18Meg, Synchronous SRAM age 4 of 8 MAJOR ACKAGE INFORMATION USED IN THIS QUALIFICATION ackage Designation: A100 ackage Outline, Type, or Name: 100-pin, Thin Quad Flat ack (TQF) Mold Compound Name/Manufacturer: Hitachi CEL9200 Mold Compound Flammability Rating: V-O per UL94 Oxygen Rating Index: >28% Lead Frame Material: Copper Lead Finish, Composition / Thickness: Solder lated, 85%Sn, 15%b Die Backside reparation Method/Metallization: N/A Die Separation Method: Wafer Saw Die Attach Method: Epoxy Die Attach Supplier: Ablebond Die Attach Material: 8355F Bond Diagram Designation 10-04119 Wire Bond Method: Thermosonic Wire Material/Size: Au, 1.2um Thermal Resistance Theta JA C/W: 45 C/W ackage Cross Section Yes/No: N/A Assembly rocess Flow: 49-78002 (FL-2800 / 64-04-000-224) Name/Location of Assembly (prime) facility: SIL ELECTRICAL TEST / FINISH DESCRITION Test Location: Cypress, USA / CHIMOS Fault Coverage: 100%

Cypress Semiconductor QT # 012415 V, 1.2 18Meg, Synchronous SRAM age 5 of 8 RELIABILITY TESTS ERFORMED ER SECIFICATION REQUIREMENT Stress/Test High Temperature Operating Life Early Failure Rate Test Condition (Temp/Bias) Dynamic Operating Condition, Vcc Max = 3.8V, 125 C Result /F High Temperature Operating Life Latent Failure Rate Dynamic Operating Condition, Vcc Max=3.8V, 150 C High Temperature Steady State Life Static Operating Condition, Vcc Max=3.63V, 150 C High Accelerated Saturation Test 130 C, 3.63V,85%RH (HAST) recondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs, 30C/60%RH+3IR-Reflow, 235 C+5, 0 C Temperature Cycle MIL-STD-883C, Method 1010, Condition C, -65 C to 150 C recondition: JESD22 Moisture Sensitivity MSL 3 ressure Cooker 192 Hrs, 30C/60%RH+3IR-Reflow, 235 C+5, 0 C 121 C, 100%RH recondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs, 30C/60%RH+3IR-Reflow, 235 C+5, 0 C High Temperature Storage 150 C ± 5 C no bias Electrostatic Discharge Human Body Model (ESD-HBM) Electrostatic Discharge Charge Device Model (ESD-CDM) Age Bond Strength 1,500V MIL-STD-883, Method 3015.7 200V Cypress Spec. 25-00020 200C, 4HRS MIL-STD-883, Method 883-2011 SEM Analysis MIL-STD-883, Method 883-2018-2 / Cypress Spec. 22-00009 Low Temperature Operating Life -30ºC, 4.3V, 8MHZ Acoustic Microscopy, MSL 3 Cypress Spec. 25-00104 Current Density Cypress Spec 22-00029 Static Latchup 125ºC, 10V, ± 300mA In accordance with JEDEC 17. Cypress Spec. 01-00081

Cypress Semiconductor QT # 012415 V, 1.2 18Meg, Synchronous SRAM age 6 of 8 RELIABILITY FAILURE RATE SUMMARY Stress/Test Device Tested/ Device Hours # Fails Activation Energy Thermal AF 4 Failure Rate High Temperature Operating Life 3,007 1 N/A N/A 333 M Early Failure Rate 1 High Temperature Operating Life 1,2 Long Term Failure Rate 583,320 DHRs 2 0.7 170 31 FIT 1 A production burn-in of 15 Hrs at 125 C, 3.8V is required for the product. 2 Assuming an ambient temperature of 55 C and a junction temperature rise of 15 C. 3 Chi-squared 60% estimations used to calculate the failure rate.. 4 Thermal Acceleration Factor is calculated from the Arrhenius equation AF = exp E k A 1 T - 1 2 T1 where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 ev/kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions.

Cypress Semiconductor QT # 012415 V, 1.2 18Meg, Synchronous SRAM age 7 of 8 Reliability Test Data QT #: 012415 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism HIGH TEM DYNAMIC OERATING LIFE-EARLY FAILURE RATE (125C, 3.8V, Vcc Max) CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 96 1007 1 METAL2 DEFECT CY7C1380B-AC (7C1380B) C80457 C80453CA SIL 96 1006 0 CY7C1380B-AC (7C1380B) C80476 C80476AA SIL 96 993 0 HIGH TEM DYNAMIC OERATING LIFE-LATENT FAILURE RATE (150C, 3.8V, Vcc Max) CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 80 390 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 500 387 1 VIA/CONTAC SIKING CY7C1380B-AC (7C1380B) C80457 C80453CA SIL 80 390 0 CY7C1380B-AC (7C1380B) C80457 C80453CA SIL 500 389 1 METAL RESIDUE CY7C1380B-AC (7C1380B) C80476 C80476AA SIL 80 390 0 CY7C1380B-AC (7C1380B) C80476 C80476AA SIL 500 388 0 ESD-CHARGE DEVICE MODEL (200V) CY7C1380B-AC (7C1380B) C80458 C80458AA SIL COM 9 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL COM 9 0 CY7C1380B-AC (7C1380B) C80457 C80457CA SIL COM 9 0 ESD-HUMAN BODY CIRCUIT ER MIL STD 883, METHOD 3015 (1,500V) CY7C1380B-AC (7C1380B) C80458 C80458AA SIL COM 9 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL COM 9 0 CY7C1380B-AC (7C1380B) C80457 C80457CA SIL COM 9 0 DYNAMIC LATCH-U TESTING (2.65V) CY7C1380B-AC (7C1380B) C80453 C80453AB SIL COM 3 0 STATIC LATCH-U TESTING (125C, 10V, +/300mA) CY7C1380B-AC (7C1380B) C80458 C80458AA SIL COM 3 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL COM 3 0 CY7C1380B-AC (7C1380B) C80457 C80457CA SIL C0M 3 0 ACOUSTIC-MSL3 CY7C1380B-AC (7C1380B) C80458 C80458AA SIL COM 15 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL COM 15 0 CY7C1380B-AC (7C1380B) C80457 C80457CA SIL COM 15 0 AGE BOND STRENGTH CY7C1380B-AC (7C1380B) C80458 C80458AA SIL COM 3 0 CY7C1380B-AC (7C1380B) C80453 C80458AB SIL COM 3 0 CY7C1380B-AC (7C1380B) C80457 C80457CA SIL COM 3 0

Cypress Semiconductor QT # 012415 V, 1.2 18Meg, Synchronous SRAM age 8 of 8 Reliability Test Data QT #: 012415 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism HIGH TEMERATURE STORAGE, LASTIC, 150C CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 500 48 0 CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 1000 48 0 HIGH TEM STEADY STATE LIFE TEST (150C, 3.63V, Vcc MAX) CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 80 80 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 168 80 0 RESSURE COOKER TEST (121C, 100%RH), RE COND 192 HR 30C/60%RH CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 168 48 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 168 48 0 CY7C1380B-AC (7C1380B) C80457 C80457CA SIL 168 48 0 HI-ACCEL SATURATION TEST (130C, 85%RH, 3.63V), RE COND 192 HR 30C/60%RH CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 128 48 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 128 48 0 CY7C1380B-AC (7C1380B) C80457 C80457CA SIL 128 47 0 TC COND. C -65C TO 150C, RECONDITION 192 HRS 30C/60%RH (MSL3) CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 300 48 0 CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 500 48 0 CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 1000 48 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 430 48 0 CY7C1380B-AC (7C1380B) C80453 C80453AB SIL 1000 48 0 CY7C1380B-AC (7C1380B) C80457 C80457CA SIL 300 48 0 CY7C1380B-AC (7C1380B) C80453 C80453CA SIL 500 48 0 CY7C1380B-AC (7C1380B) C80453 C80453CA SIL 1000 48 0 LOW TEMERATURE OERATING LIFE (-30C, 4.3V) CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 500 45 0 CY7C1380B-AC (7C1380B) C80458 C80458AA SIL 1000 48 0