Introduction to the Plastic Ball Grid Array (PBGA)

Transcription

1 Introduction to the Plastic Ball Grid Array (PBGA) Q1, 2008 Terry Burnette Dec. 15, 2005

2 Presentation Outline PBGA Introduction and Package Description PC Board Design for PBGA PBGA Assembly PBGA Solder Joint Voids Rework Solder Joint Reliability Thermal Performance

3 Package Terminology PBGA >= 23x23 MAP <= 19x19 Package Terminology PBGA TEPBGA TEPBGA-2 MAP Plastic Ball Grid Array Thermally Enhanced PBGA Thermally Enhanced PBGA with Embedded Heatspreader Mold Array Package Can be either 2 layer or 4 layer substrates; BGA pitch range from mm; Body size >23mm x 23mm 4 layer substrate with 2oz Cu inner layers for increased thermal performance TEPBGA plus heatspreader over die A type of PBGA, except mold cap covers entire topside surface; BGA pitch range from mm; Body size <19mm x 19mm

4 PBGA Introduction and Package Description PBGA BGA Construction MAP Style PBGA Molded to Substrate Edge Die Attach Silicon Die Thermal and/or Ground Vias Au Bond Wires Epoxy Overmold Substrate with Soldermask Joint Stand-Off (Varies with Pad Sizes, Sphere Sizes and Solder Paste Volume) Motherboard Solder Sphere Ball Pitch Routing Vias Solder Pads (PBGA Package Pads - PCB Pad)

5 PBGA Introduction and Package Description Typical Plastic Ball Grid Array (416 Pin, 1.0 mm Pitch, 27x27 mm sq.)

6 MAP Introduction and Package Description Typical MAP Ball Grid Array (196 Pin, 1.0 mm Pitch, 15x15 mm sq.)

7 PBGA Introduction and Package Description PBGAs ship with one of several sphere compositions depending if they are Pb-free or lead-containing All PBGA spheres should collapse during assembly to PCB Collapse is controlled by pad geometries on package and PCB and solder surface tension Lead containing sphere compositions: The most common is 62Sn36Pb2Ag Some may contain 63Sn37Pb Lead-free sphere compositions: The most common is 95.5Sn4.0Ag0.5Cu, commonly called SAC405 Devices used in handheld applications may use SAC105 (98.5Sn1Ag0.5Cu) Some parts may contain 96.5Sn3.5Ag SnPbAg PBGA Sphere SAC405 PBGA Sphere

8 PBGA Introduction and Package Description Solder alloy melting temperatures: Composition (Weight %) 95.5Sn4.0Ag0.5Cu (SAC405) 98.5Sn1.0Ag0.5Cu (SAC105) 96.5Sn3.5Ag 62Sn36Pb2Ag 63Sn37Pb Solidus (ºC) Liquidus (ºC) References:

9 PBGA Advantages BGA: Ideal interconnect technology Using solder spheres as leads: Provides perfect self alignment Allows large tolerance in placement accuracy Eliminates lead coplanarity issues Allows high number of I/O connections with large pitch Large savings in board real-estate Offers electrical and thermal advantages SMT manufacturing processes simplified SMT manufacturing equipment demands less stringent SMT manufacturing yields dramatically improved versus fine pitch leaded parts

10 Presentation Outline PBGA Introduction and Package Description PC Board Design for PBGA Pad Diameter PBGA Assembly PBGA Solder Joint Voids Rework Solder Joint Reliability Thermal Performance

11 PC Board Design for PBGA For PBGA, both PC board solder pad and stencil aperture diameters should generally be made 1:1 with the package solder pad diameter Stencil thickness is typically dependent on other components on the PCB such as fine pitch leaded and discretes 0.10 to 0.20 mm thick stencils are commonly used with PBGA In some cases such as larger body size PBGAs, a thicker stencil may provide improved assembly robustness Package pad diameters are generally one half the pitch, but can vary slightly on some products check with Freescale or your distributor if there are questions Below is a table of some typical PBGA pad diameters: Ball Pitch Package Pad Dia. PCB Pad Dia. (1) Stencil Opening Dia. (2) to to to to to to to 0.3 Note: (1) Studies have shown that PCB pad diameters up to approximately 10% smaller than the package pad still provides good board-level thermal cycling reliability. A PC board solder pad that is of greater diameter than the package pad is not recommended (2) General industry practice for PBGA has stencil opening diameter equal to PCB pad diameter.

12 SMD vs NSMD PCB Pads for PBGA There are two types of PCB pad configurations for PBGA: SolderMask Defined pads (SMD) which are the type on the PBGA itself Non-SolderMask Defined (NSMD) or Cu defined pads are most commonly used on PC boards within the industry Soldermask Overlap Soldermask Clearance SMD Pad NSMD Pad Comparison of PC board SMD (left) and NSMD (right) pads shown with OSP (OSP or organic solderability protectant) surface finish. Besides the OSP shown above, there are many surface finishes available: HASL, Immersion Ag, ENIG, etc.

13 Trade-Offs Between SMD and NSMD PCB Pads for PBGA SMD = SolderMask Defined Advantage 1. Strongest smechanical strength 2. More copper, better heat spreading to board 3. More heat resistant - multiple rework Disadvantages 1. Potential stress point 2. Foreign matter entrapment on pad 3. Possible worse dimensional tolerance on solderable diameter versus NSMD NSMD = Non-SolderMask Defined Advantages 1. Most common pad configuration 2. Potentially the most solderable pad 3. No point of stress concentration at PC board 4. More copper to copper space to route traces between pads Disadvantages 1. Reduced pad to PCB adhesion strength 2. May be weak link in other mechanical testing, i.e. board bending, mechanical shock and vibration 3. Non-symmetrical joint fails at the package interface first in thermal cycling

14 PCB Pad Design Guidelines General PCB Pad Dimensions Pad solderable diameter equal to package pad diameter Smaller PC board pad diameter by approximately 10% may ease routing and still provide good reliability NSMD pads - soldermask opening mm > pad diameter SMD pads - Cu pad area mm > soldermask opening Surface finishes include: organic solderability protectant (OSP), HASL, electroless or electrolytic nickel/gold (NiAu), or immersion silver (Ag) PCB Routing Vias For 1.27, 1.0 and 0.8 mm pitches, via interstitial between BGA pads Via Cu capture pad set by drill size of via Capture pad usually tented with solder mask Trace between pad and capture pad should be covered with soldermask Too small a width of soldermask can lead to soldermask lift off the trace For 0.8, 0.65 and 0.50 mm pitches, via-in-pad structures Via is part of BGA pad Filled via best for void minimization of final solder-joint Contact PCB fabrication vendors for manufacturing capability Laser or mechanical drilling, as appropriate Size of drill hole for via Through-hole via or single layer via

15 PCB Pad Design Finished Plated Through Hole Annular Capture Pad Soldermask Via Top View Solder Pad Copper Solder Pad Via Solder Pad Via-in-Pad May be filled Top View Clearance Between Copper and Soldermask Via Solder Pad Cross Section Offset Via Example Soldermask Away From Copper Pad PCB Laminate Solder Pad Via Cross Section Via-in-Pad Example

16 Presentation Outline PBGA Introduction and Package Description PC Board Design for PBGA PBGA Assembly Pre-assembly Handling Placement and Reflow Secondary Reflow Cleaning and Inspection PBGA Solder Joint Voids Rework Solder Joint Reliability Thermal Performance

17 PBGA Pre-Assembly Handling: Moisture Sensitivity Similar to QFP and other leaded and leadless plastic packages, most PBGAs are generally moisture sensitive Follow moisture sensitivity guidelines printed on the package dry-pack label Check the label for maximum allowable reflow temperature for product Jedec Moisture Level Table MSL Level Floor Life Storage Condition 1 Unlimited 30C/85%RH 2 1 Year 30C/60%RH 2a 4 Weeks 30C/60%RH Hours 30C/60%RH 4 72 Hours 30C/60%RH 5 48 Hours 30C/60%RH Source: JEDEC JESD22-A113 Floor life is the time allowed out of dry-pack before a rebake is required.

18 PBGA Pre-Assembly Handling: Moisture Sensitivity Easy to avoid PBGA package delamination Follow instructions on shipping container Establish strict process control and procedures to insure safe operation conditions. Use dry nitrogen or dessicator cabinets to store devices after opening packages Rework boards within time allowed in room environment Failure to follow MSL guidelines can result in package failure.

19 Solder Paste Printing for PBGA Solder paste stencil thicknesses generally ranges from 0.10 to 0.20 mm Stencil thickness typically dictated by other components on the PCB such as fine pitch leaded and small discretes No minimum solder paste volume is typically required for PBGA since solder spheres completely melt and collapse during reflow Apertures same as PCB pad diameters generally provide the best gasketing In some cases, such as larger body size PBGAs, a thicker stencil may provide improved assembly robustness ± mm solder paste print to PC board registration is common paste should never touch any surrounding exposed metallization Round Apertures for PBGA Printing Wet Solder Paste on PBGA PCB Pads

20 Surface Mount Assembly of PBGA High and low mass components should be carefully profiled with a thermocouple in a corner and inner sphere on a fully populated profile PCB Most PBGA qualified to a maximum reflow temperature of 220 C for SnPb and 260 C for Pb-free Soldering profiles are solder paste dependent so follow guidelines recommended by Solder paste vendor, but here are some guidelines that can be used: SnPb soldering: Raise temperature of the joints to 100 C at between 1.5 and 3.0 C/sec Peak component temperature typically between 205 and 220 C Desirable dwell time above 183 C between 50 and 80 secs Pb-free soldering: Raise temperature of the joints to 100 C at between 1.5 and 3.0 C/sec Peak component temperature typically between 235 and 245 C Desirable dwell time above 217 C between 50 and 80 secs **Reference Application Note AN3300 for additional information

21 Soldering Pb-Free Spheres with SnPb Paste Soldering Pb-free spheres with SnPb solder paste is not recommended by Freescale If it is attempted, the entire Pb-free solder joint must reflow so that it collapses and mixes with the SnPb Peak Temp ( C) Comment Example Solder Joints* No sphere collapse - No alloy mixing - Poor assembly yield (opens) - Early failures in temp cycling - Minimal sphere collapse - Minimal alloy mixing - Poor assembly yield (opens) - Early failures in temp cycling - Partial sphere collapse - Partial alloy mixing - 100% assembly yield on small sample - Consistent interconnect reliability - Complete sphere collapse - Complete alloy mixing - Consistent 100% assembly yield - Excellent interconnect reliability Reflowed SnPb Solder Paste SnAgCu (Pb-free) Solder Sphere * Solder joints cross-sections shown are post-thermal cycling and show some evidence of typical fracturing

22 BGA Thermocouple Attachment Profiling thermocouples should preferably be placed inside a corner and center sphere alternately can be placed inside the package Hole can be drilled from the top of the package or bottom of the PCB Hole should be filled with thermally conductive high temperature epoxy Thermocouple inserted through the top of hole drilled into a PBGA (left) and from the bottom of a PCB (bottom)

23 Avoiding BGA Secondary Reflow Wave soldering is often required after BGA has been soldered on the board. Secondary reflow of BGA solder joints in this operation must be avoided The result can be open BGA solder joints PBGAs are low thermal mass packages (get hot fast) The large number of plated through holes transmit heat rapidly When heated from bottom only, PBGAs may warp Upward bowing due to expansion of the PBGA substrate Fully or partially molten solder joints separate PBGA Through-Hole Vias Plated through holes blocked SMT Mixed Technology Board

24 Avoiding BGA Secondary Reflow There are many ways to avoid secondary reflow of BGA: Optimize the wave solder operation (temperature, PCB contact time) to minimize heat to the BGA Implement a wave solder pallet to block solder from BGA area Block heat transfer through vias around the BGA by filling or tenting with solder mask on wave side of board May not be desirable from an in circuit test standpoint since it precludes using via pads as test points Apply polyimide tape under BGA area Undesirable hand operation Redesign board to eliminate the wave solder operation

25 PBGA Introduction and Package Description PC Board Design for PBGA PBGA Assembly PBGA Solder Joint Voids Rework Solder Joint Reliability Thermal Performance Presentation Outline

26 BGA Solder Joint Voiding Voids are common in BGA solder joints after PCB assembly They are typically found near the package interface Voids are caused by entrapped flux from the solder paste volatilizing and rising in the molten solder joint due to buoyancy Voids in X-ray Voids in Cross-Section

27 BGA Solder Joint Voiding The IPC-A-610D Standard 1 (Acceptability of Electronic Assemblies) categorizes >25% BGA joint voiding as a defect Voiding may be reduced by many factors including selecting a solder paste with a low volatile flux and using a longer dwell time below liquidus Some studies have shown voided joints to be just as or more reliable than non-voided joints: % Packages Failed Solder joints with almost no voids failed before voided joints in thermal cycling Voided Std Reflow Voided Modified Reflow Almost No Voids Flux Only 0 to 100ºC Thermal Cycles 1) Table of contents can be seen at: Voiding is covered in section

29 Avoiding PBGA Rework Due to high assembly yields, PBGA rework should rarely be required Key areas to focus on to maintain high assembly yield and avoid PBGA rework: Bare board quality - Ensure solderable pads with soldermask not encroaching onto the pads areas except the trace Solder paste printing Avoid solder paste skips Use 3D or visual paste inspection until the process is under control Solder reflow process - Carefully profile with a fully populated PCB and minimize the temperature delta between middle and corner PBGA joints Electrical test - Ensure that functional and in-circuit test programs do not falsely blame the PBGA as the cause for electrical failures Key points when PBGA rework must be undertaken: The rework process goal is joint structure, quality and reliability that is at least as good as the initial assembly Removing and replacing a PBGA is easier than a QFP PBGA rework can be accomplished with off-the-shelf equipment The entire rework process must be carefully characterized Re-use of reworked PBGAs after reballing is not recommended

30 PBGA Detailed Rework Steps Component Removal: First, the entire assembly must be baked for 4 hours minimum at the highest temperature that the most heat sensitive device on the PCB assembly can withstand (typically 80 to 125ºC) This is to remove moisture from the PBGA so that it will not delaminate or popcorn during removal PBGA can typically be removed and replaced with topside heat only For thicker boards with many internal planes use additional localized bottomside heat To reduce cycle time and minimize board warpage, preheat entire board to at least 80 C or higher, as permitted by the temperature rating of the other components that may be on the board To minimize the number of heat cycles the PCB experiences, this pre-heat can be the bake-out described in the first step Apply localized heat to PBGA package Lift package immediately with a vacuum wand or tweezers when solder is molten Excess Solder Removal from the PCB: Avoid an additional heat cycle by removing the excess solder from the PCB site immediately after package lift off, while board is still hot Can be removed quickly by a solder vacuum tool or solder wicking braid which requires heat and pressure and usually more time The goal is to end up with a solderable pad while avoiding damage the PCB or pads

31 PBGA Detailed Rework Steps - Continued Re-Applying Flux to the PCB For a PBGA with collapsing spheres, no additional solder is needed - flux only Flux should be compatible with production cleaning strategy and applied uniformly but sparingly Re-applying solder paste may increase rework yield / reliability by accounting for PCB warpage Placement and Reflow of Replacement PBGA Use the rework station or offline placement equipment As with removal, preheating of entire PCB may be advisable Characterize temperatures to provide uniform heat with ramp rates similar to reflow furnace Non uniform heat and fast ramp rates can cause PBGA to warp or cause non uniform collapse of solder balls Cleaning If cleaning is required, use the standard production cleaning method

33 PBGA Solder Joint Reliability PBGA construction influences solder joint reliability For PBGA, silicon die mismatched to other package materials causes solder joint strain from differential package/pcb expansion during thermal excursions Solder joints under die edge usually fail first in accelerated thermal cycling Silicon Die Die Attach Stand-Off (Varies with Pad Size and Solder Paste Vol.) Thermal and/or Ground Vias Au Bond Wires Epoxy Overmold Substrate w/ Soldermask Routing Vias Motherboard Ball Pitch Solder Sphere Solder Pads (SMD Pads on PBGA - Either SMD or NSMD on PCB)

34 Purpose Solder-Joint Reliability Experiments Determine life of package joined to PC Board Solder-joints limit the life of final assembly Availability Many new packages have data Not all products will have data Use existing data from similar package when available Experimental conditions Air temperature cycling (ATC) Automotive/industrial: -40/125C, 15 minute ramps and dwells Telecommunications/networking/desktop: 0/100C, 10 minute ramps and dwells Other conditions sometimes used for specific customer requirements Daisy chain package and boards Allow resistance to be monitored during cycling to detect failures Other Mechanical Tests Monotonic Bend, IPC-9702, limited availability JEDEC Shock, JESD22-B111, limited availability Ask your customer sales representative for experimental data.

35 PBGA Solder Joint Reliability Air temperature cycling is commonly performed on mounted PBGAs to assess solder joint integrity and suitability for intended applications Two common conditions are 0 to 100 C (networking, telecomm, computing) and -40 to 125 C (industrial, automotive) Testing typically continues until >50% of the packages failed to obtain the failure distribution Temperature (C) Board Air 100C 0C Chamber Air Board 125 C -40 C :20 06:40 10:00 13:20 16:40 20:00 23:20 26:40 30:00 33:20 36:40 40:00 Time (minutes) Time (minutes) Typical 0 to 100 C Profile Typical -40 to 125 C Profile

36 Example Solder-Joint Reliability Test Board Connection points for specialized daisy chain testing 8 sites for daisy chain packages (Design follows guidelines of IPC-9701A.) Edge fingers for monitoring

37 416 TEPBGA Solder Joint Reliability 27x27 mm sq., 1 mm Pitch Package

38 388 PBGA Solder-Joint Reliability 27x27 mm sq., 1 mm Pitch Package

39 Fracture Propagating Through Bulk Solder Near the PBGA Solder Pad PBGA Solder Joint Reliability Fractures in PBGA solder joints can initiate and propagate during extended board-mounted thermal cycling Typical fractures are through bulk solder (not intermetallic)

41 PBGA Thermal Performance Thermal performance is reported as thermal resistances determined per the JEDEC JESD51 series of specifications. PBGA packages typically have good thermal connection to the printed circuit board. Their performance will depend on the board construction, the thermal connection to the power and ground planes in the board, and other local heat sources. To highlight the effect of the local environment, thermal resistances are typically provided on both the single layer board and the 2s2p board (with two signal and two power planes). The planes are 1 oz copper. It is not unusual to see nearly a factor of two difference between the thermal resistances on the two boards. A good summary description is JESD51-12, Guidelines for Reporting and Using Electronics Package Thermal Information The next slide provides a cross reference to the various thermal resistances

42 Summary of Thermal Resistances Thermal Metric Junction to Ambient Junction to Ambient Junction to Board Junction to Case Junction to Package Top Symbol Condition Usage Specification RθJA Single Layer Board Tightly packed array of devices JESD51-2, JESD51-6 RθJA Four layer Most commonly JESD51-2, JESD51-6 board (2s2p) quoted thermal resistance RθJB Customer use in JESD51-8 modeling or when board temperature known RθJC Heat sinks MIL-SPEC883, ΨJT Natural Convection Determine junction temperature from thermocouple reading Method 1012 JESD51-2 Note: PBGA packages are tested on a board specified in JESD51-9 Jedec JESD specs are available at

43 Typical PBGA Power Capabilities R θja = (T J T A )/P => P = (T J T A )/ R θja 2.5 Power (watts) at (Tj-Ta)=35 C TEPBGA PBGA & MAP PBGA Body Size (mm) Assumptions: Multilayer application, lots of board area, only low power devices nearby, used junction to ambient thermal resistance on 2s2p test board in natural convection with maximum junction temperature 35 C higher than ambient temperature. Range in thermal performance caused by die size and substrate design features.

44 Thermal Data for Three Package Configurations PBGA x27 mm TEPBGA Planes in substrate Thermal Metric Test Board Symbol PBGA TEPBGA TEPBGA2 Unit Junction to Ambient Single layer board RθJA C/W Natural Convection (1s) Junction to Ambient Four layer board RθJA C/W Natural Convection (2s2p) Junction to Ambient Single layer board RθJMA C/W ft/min) (1s) Junction to Ambient Four layer board RθJMA C/W ft/min) (2s2p) Junction to Board RθJB C/W Junction to Case RθJC C/W Junction to Package Top TEPBGA2: spreader & planes in substrate Natural Convection ΨJT C/W

45 Effect of Die Size Thermal performance depends on package construction, package internal design, and die size. Theta-JC decreased 30% as die area increased by 75% for this x27 mm TEPBGA x27 TEPBGA2 Thermal Resistance (C/W) Theta-JC Die Area (mm^2) Theta-JB

46 Summary: PBGA Thermal Performance Thermal performance is typically available in the Data Sheets for the product For Networking products, it is in the hardware specification, for other products it will be in the product manual or datasheet. Data is usually in the electrical specifications section of the manual if there is not a separate thermal section. Thermal performance depends on die size and package design. Data should be obtained specific to the device. Thermal performance is determined per the JESD51 series of specifications with the PBGA mounted to a board. A good summary description is JESD51-12, Guidelines for Reporting and Using Electronics Package Thermal Information. These specifications are available at Temperature predictions using R θja have potential errors of 2X because of uncertainty in ambient conditions and effect of other power sources.