ARM Processor Evolution

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Transcription:

ARM Processor Evolution: Bringing High Performance to Mobile Devices Simon Segars EVP & GM, ARM August 18 th, 2011 1

2 1980 s mobile computing

HotChips 1981 4MHz Z80 Processor 64KB memory Floppy drives 5 screen 24.5 lbs $1,795 11,000 units sold Osbourne 1 image courtesy of www.oldcomputers.net 3

Hot Chips 1983 Motorola DynaTAC $3995 30 minutes talk time 10 hours charge time No texting or Bluetooth 4

30 Years later MacBook Air 1.7GHz Processor 8GB memory 256GB storage 13 screen 2.96 lbs $1,599 5

Your phone is a lot more useful too Samsung Galaxy S-II Android 2.3 4.3 screen 32GB memory Web, weather, Angry Birds ~1/20 th the DynaTAC cost 6

Connectivity driving computing Source: Morgan Stanley, 2009 7

Evolutionary Pressures Functionality Competition Cost Form Factor 8

9 1990-2011

A long time ago in a village far away. Acorn, Apple and VLSI formed a joint venture 13 engineers and a CEO ARM the company was born 21 years old in November Goal to design low power embedded 32b processors But never to manufacture them 10

1993: An early mobile computer 1.4lb Personal Applications Expansion socket Stylus interface 11

1992: ARM7TDMI thumb A small, low power 32 bit core for wireless baseband 74,000 transistors, 40MHz, 4.2mm 2 on 0.5µm 12

Early GSM phone 1 week battery life Contact list Calculator SMS Snake Not exactly a mobile computer 13

Evolution 14

Moore s law has helped a lot Cortex-M0 Subsystem M0. 1/10,000 th size Mali-400 Dual Cortex-A9 IO System Dec 2010 Cortex-M0 20nm 8k gates 0.07mm x 0.07mm 1985 ARM1 3µ 6k gates 7mm x 7mm Cortex-A9 SOC 40nm 100M gates 7.4mm x 6.9mm 15

The next decade There may be trouble ahead. 16

First the good news In 2010 280M smartphones were shipped Over 4 Billion people connected via mobile phones LTE Deployment starting During the 2010 Holiday period $230M was spent on EBay using smartphones Smartphones will leapfrog over the PC in the developing world Over 13 Billion smartphone apps downloaded in 2.5 years BIG NUMBERS! Smartphone data traffic will exceed PC traffic in 2014 17

Smartphone growing and growing 800 100 90 2x Cortex-A15 1.5GHz 700 Relative Performance 80 70 60 50 40 30 20 10 0 Phase 1 ARM 926 100 MHz ARM 926 200MHz Phase 2 ARM 11 500MHz Phase 3 Cortex-A8 650MHz Cortex-A8 1GHz 4x Cortex-A9 1GHz 2x Cortex-A9 1GHz Source: Gartner Q4 2010 Forecast 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 600 500 400 300 200 100 0 Smartphone Volume (Mu) 18

The Superphone for 2013 Device Vision Your primary internet access device Always connected broadband Enough compute power to replace your laptop Your content with you From HD to MP3 with cloud access Enabling Technology Multi-core processor Multi-core graphics processor Multi-core coherency 28nm implementation Security solution Visual Experience 12+MP Camera 1080p playback and capture 128 Gbyte of storage 45 hours of 1080p video HDMI video out Applications Full browser with HTML v5 & Flash Player New UI paradigms Voice, gestures, Augmented Reality supported by OpenCL Full office support Vibrant applications market HD Gaming on device or screen 19

Another 1Bn sub $100 Computers 1+ Billion Opportunity Consumers, OEMs & MNO all want smartphones Emerging markets to bypass the PC Full internet connectivity Growth controlled by retail price, target $100-$200 Requirement beyond ARM11 performance Device Features Full Android OS Access to full range of apps in Google Marketplace Full browser Flash Player 10 support Full HTML 5 support 3D UI accelerated with OpenGL ES 2.0 Access to full range of apps in Android Marketplace 20

A whole lot of software Application diversity delivers the personalized compute experience Apps & App Stores 100,000 s of Apps 15+ Billion Downloads Full connectivity to the Internet and the Cloud Web Technology support for all standards Flash Player 10 AIR <HTML> v5 Webkit Internet Explorer Google Chrome Mozilla Firefox Diversity and rapid mobile OS innovation Operating Systems innovating on a 6-12 month period 21

The center of your world 22

TrustZone in 3 Steps 1. Define secure hardware architecture Two separate domains:- normal and secure Extends across system:- Processor, display, keypad, memory, clock, radios 2. Implement in silicon system on chip (SoC) Physically enforcing secure/normal separation CPU NORMAL CPU SECURE 3. Combine SoC with Secure OS Separate but connected to main operating system Rich OS Secure OS Result: A Trusted Execution Environment Ready to develop and deploy trusted services Trusted Execution Environment 23

But there are challenges Modems Implementation Battery scaling Transistor scaling 24

Modem relative performance 0 100 200 300 400 500 600 4G 3.9G LTE 3G 2G 4G modem ~500x more complex than 2G Control processor Dedicated data processing engines More silicon area More power consumed 25

Batteries haven t helped Historical 11% capacity growth Not well matched to Moore's Law Continued innovation required just to maintain 11% New Si alloy materials or anode Carbon Nano Tubes may help 4.5 kcal 30g 255 kcal 49g x2.2 Capacity Assuming 12 hours of use per day 26

Challenge: Implementation Complexity ARM7TDMI 74K transistors 4.2 mm 2 in 0.5µm technology Largely hand-designed 3 corners, 1 voltage domain Cortex-A9 MP Dual Core >20M transistors 3.4 mm 2 in 28nm technology Complex timing sign-off 12+ corners, 3 voltage domains DFM, Variation modeling, 27

Disaggregation pros and cons Vertical Suppliers ASIC Vendors Fabless Semis IP Driven Design Design System Manufacturer Design & Distribution IP Fully Vertically Integrated EDA ASIC Vendor EDA Manufacture Manufacture Foundry 1970s 1980s 1990s Today 28

Fabs: not as popular as they used to be Al#s Semiconductor Dongbu Hitek Dongbu Hitek Freescale Freescale Fujitsu Fujitsu Globalfoundries Globalfoundries Freescale Grace Semiconductor Grace Semiconductor Fujitsu IBM IBM Globalfoundries Infineon Infineon IBM Intel Intel Infineon Fujitsu Panasonic Panasonic Intel Panasonic Renesas (NEC) Renesas (NEC) Panasonic Globalfoundries Samsung Samsung Renesas (NEC) IBM Seiko Epson Seiko Epson Samsung Intel SMIC SMIC SMIC Renesas (NEC) Globalfoundries Sony Sony Sony Samsung Intel ST Microelectronics ST Microelectronics ST Microelectronics SMIC Panasonic Globalfoundries Texas Instruments Texas Instruments Texas Instruments ST Microelectronics Samsung Intel Toshiba Toshiba Toshiba Toshiba ST Microelectronics Samsung TSMC TSMC TSMC TSMC TSMC ST Microelectronics UMC UMC UMC UMC UMC TSMC 130nm 90nm 65nm/55nm 45/40nm 32/28nm 22/20nm 29

Device Scaling 65nm 40nm Strain High-K 32nm 28nm 20nm 2x Patterning 3x Patterning? 14nm 10nm EUV?????? 8nm?nm 30

Think different! Web Multi-Gx Cortex-Big Multi-CPU Application Kernel Video Audio Hardware CPU-Audio Platform Runtime 5G WiFi Modem Modem Object Compiler 31

Advanced Processing Cortex-A15 for High-end, power-efficient processing 15-Stage Integer Pipeline 2 extra cycles for multiply, load/store 2-10 extra cycles for complex media instructions Integer pipeline Fetch Decode Rename Dispatch 5 stages 7 stages Issue Issue Int. Branch WB Multiply Load/Store WB Issue NEON FPU WB 32

Cortex-A15 System Scalability Introduces Cache Coherent Interconnect Processor to Processor Coherency and I/O coherency Memory and synchronization barriers Virtualization support with distributed virtual memory signaling GIC-400 Quad Cortex-A15 MPCore A15 A15 A15 A15 Processor Coherency (SCU) Up to 4MB L2 cache 128-bit AMBA 4 Quad Cortex-A15 MPCore A15 A15 A15 A15 Processor Coherency (SCU) Up to 4MB L2 cache 128-bit AMBA 4 IO coherent devices CoreLink CCI-400 Cache Coherent Interconnect MMU-400 System MMU 33

Fully coherent SoCs 2011 Devices Full coherency within CPU cluster Limited I/O coherency Software managed coherency for SoC 2013 Devices Full coherency for multiple CPU clusters I/O coherency with graphics and other Simpler software programming model 2015 Devices Full coherency on CPU, GPU and other True General Purpose Compute Greater Performance and interaction Lower energy per transaction Applications Processor 2x or 4x Cortex-A9 Fully Coherent Applications Processor >4x Cortex-A15 Fully Coherent Applications Processor Next generation Compute cluster CI CI Graphics and Video Mali-400 Video Non-coherent or Software Managed Graphics and Video Mali- T604 Video I/O Coherent Graphics and Video Next Gen Video Fully Coherent 34

The holistic SoC Designer IP Driven Design Architecture Design IP EDA Manufacture Foundry Implementation 35

Conclusion 30 years have delivered incredible gains Mobile computing now ubiquitous Smartphones, Superphones, Tablets Silicon scaling has driven PPA gains But it has to end somewhere, so get ready! The future is Hetrogeneous Multi-core CPU, multi-cpu, dedicated engines A new battery would help too! 36

37 Thank you.