Bi-Directional Inverter and Energy Storage System. Texas Instruments Analog Design Contest

Bi-Directional Inverter and Energy Storage System Submitted to fulfill the requirements of: Texas Instruments Analog Design Contest by Derik Trowler and Bret Whitaker May 2008 University of Arkansas College of Engineering Department of Electrical Engineering

ABSTRACT This report presents a scaled down energy storage system for peak load shaving applications. The design includes a bidirectional inverter along with a dc-dc converter capable of interfacing a battery bank with the ac power grid. The main goals of the project included the implementation of two modes of operation: a battery discharge mode where current is being fed into the grid and a battery charging mode in which current is pulled from the grid and put into the batteries. A secondary goal of the design was to ensure that the current being injected into grid was at or near unity power factor. The results of the project were successful as current was injected into the grid with near unity power factor by utilizing a hysteresis current control method. The current waveform was seen to be discontinuous, which was most likely caused by the inductance value used to filter the output current. Difficulty in designing the output filter was to be expected since hysteresis control has an inherent variable switching frequency. Regardless of this fact, the system maintained the desired RMS output current and thus proved the functionality of the system in discharge mode. The bidirectional capability of the system was also proven by recharging the battery bank with no hardware changes. Testing results showed that all the requirements were met as the system proved to function as a scaled down energy storage system. University of Arkansas Department of Electrical Engineering ii

TABLE OF CONTENTS. INTRODUCTION.... Motivation for an Energy Storage System....2 Scope of the Design... 3 2. THEORETICAL BACKGROUND... 4 2. Introduction... 4 2.2 Discharge Mode... 5 2.3 Charge Mode... 5 2.4 Concluding Remarks... 5 3. HARDWARE DESIGN OVERVIEW... 6 3. Introduction... 6 3.2 DSP... 6 3.3 Analog Signal Conditioning... 7 3.3. Current Sensors... 7 3.3.2 Voltage Sensors... 8 3.4 Digital Signal Interface... 9 3.5 Power Electronics... 0 3.5. Design of the dc-dc Converter... 0 4. SOFTWARE DESIGN OVERVIEW... 3 4. Introduction... 3 4.2 Discharge Mode Control... 3 4.2. Signal Conditioning... 4 4.2.2 PI Control... 5 4.2.3 Hysteresis Control... 6 4.3 Charge Mode Control... 8 4.3. Trickle Charge Control... 8 5. IMPLEMENTATION... 9 5. Introduction... 9 5.2 Main Power PCB... 9 University of Arkansas Department of Electrical Engineering iii

5.3 Gate Driver PCBs... 20 5.4 Signal Conditioning PCB... 20 5.5 Complete Build-Up... 22 6. RESULTS... 23 6. Introduction... 23 6.2 Charge Mode Results... 23 6.3 Discharge Mode Results... 24 6.4 Conclusion from Results... 26 6.5 Future Work... 26 REFERENCES... 28 ACKNOWLEDGEMENTS... 29 University of Arkansas Department of Electrical Engineering iv

LIST OF FIGURES Figure : Estimated Grid Load Profile.... 2 Figure 2: Estimated Grid Load Profile with BES Installed.... 2 Figure 3: System Block Diagram.... 4 Figure 4: Main Circuit Components.... 4 Figure 5: System Interface Block Diagram.... 6 Figure 6: DSP Evaluation Board.... 7 Figure 7: Current Sensing Network.... 8 Figure 8: Dc Voltage Sensor (left) and Ac Voltage Sensor (right).... 9 Figure 9: Digital Interface.... 9 Figure 0: Simulation Schematic.... Figure : Boost Converter Voltage with 35% Duty Cycle Simulation.... Figure 2: Battery Current during Charge Mode Simulation.... 2 Figure 3: Discharge Mode Control Block Diagram.... 3 Figure 4: Signal Conditioning Block Diagram.... 4 Figure 5: PI Control Block Diagram.... 5 Figure 6: Simulated Output of Boost Converter... 6 Figure 7: Hysteresis Control Block Diagram.... 7 Figure 8: Simulated Hysteresis Output Current with Reference and Band... 7 Figure 9: Trickle Charge Control.... 8 Figure 20: Populated Main Power Board.... 20 Figure 2: Signal Conditioning Board.... 2 Figure 22: Completed Project.... 22 Figure 23: Completed Project.... 22 Figure 24: Trickle Charge.... 23 Figure 25: Voltage and Current Waveform with Gate Signals.... 24 Figure 26: Voltage and Current Waveforms with Boost Converter Output.... 25 Figure 27: Grid Voltage and Current Waveform.... 26 University of Arkansas Department of Electrical Engineering v

. INTRODUCTION. Motivation for an Energy Storage System The demand for energy will continue to increase as long as world population increases and people continue to demand a higher standard of living. The challenge lies in providing this energy from dependable and sustainable sources while maintaining respect for the environment. Coal-fired power and other fossil fuel based energy sources are a proven source for the needed energy; however, they also cause undesirable effects on the environment. While it is clear that renewable energy is not the immediate answer to the problem, it can certainly play a role in the solution to global energy needs when used in conjunction with traditional sources of energy. Renewable energy currently faces several drawbacks on its track to become the sole source of electric power generation. One major drawback is its dependency on geographic location. For example, the best locations to harvest solar energy lie in the desert regions of earth s surface. However, most of the energy consumers do not reside in these arid regions. Wind power also faces the same geographic problem. The best available wind energy in the United States lies in the Midwestern and Great Plains states []. Again, these states are not where most of the nation s energy consumers are located. Another drawback that renewable energy suffers from is its intermittent nature. Wind energy has been known to cause major brown-outs because of unexpected drops in wind speed. When this happens, coal-fired power plants are expected to pick up the tab for the extra needed energy. However, coal-fired power plants cannot ramp up their generation fast enough to counteract the effects of a lack of sufficient wind. Therefore, an energy storage system is needed to work with renewable energy sources in order to counteract intermittent generation. Another issue that the electric power grid faces is peak demand loading periods. These periods of time are when energy demand is at its highest and generally happen during the hours of 5 PM to 7 PM as shown in Figure. During these hours, power plants must ramp up generation in order to keep up with demand. Energy is expensive for the power utility to produce during these hours because the increased generation may come from high cost processes. These increased prices are usually passed down to commercial and industrial customers. Most residential customers currently pay a flat rate; however, improved metering technologies will allow utility companies to start charging different rates at different time periods. In contrast, energy demand drops well below the baseline power generation during the late night and early morning hours. Energy during these hours is cheap to generate for the power utility and also cheap for consumers to purchase. It can be seen that a way to eliminate the peaks and troughs of the power consumption trend is needed in order to help make energy more economical. University of Arkansas Department of Electrical Engineering

Load, pu peak Load, pu peak 0.8 0.6 0.4 0.2 Grid Demand 0 2:00 AM 4:00 AM 8:00 AM 2:00 PM 4:00 PM 8:00 PM 2:00 AM Time, h Figure : Estimated Grid Load Profile. It is clear that an energy storage system is needed in order to solve the problems associated with both peak demand loading and the intermittent nature of renewable energy. An approximate view of the effects of a battery energy storage system (BES) can be seen in Figure 2. An effective BES system can provide the extra energy needed during the peak energy consumption periods as well as when renewable energy sources go offline. When used in conjunction with renewable and coal-fired power generation, distributed energy storage systems can help make the power grid more efficient and cost effective. 0.8 0.6 0.4 0.2 BES System Charge BES System Discharge Grid Demand Grid Demand After Peak Load Shaving 0 2:00 AM 4:00 AM 8:00 AM 2:00 PM 4:00 PM 8:00 PM 2:00 AM Time, h Figure 2: Estimated Grid Load Profile with BES Installed. University of Arkansas Department of Electrical Engineering 2

.2 Scope of the Design This senior design project was focused on building a scaled down battery energy storage system. The design was required to utilize power electronics to interface a battery bank with the grid. The system was required to operate in two modes, with a majority of the focus on the discharge mode in which power is drawn from the batteries and injected into the grid. The design was also required to recharge the battery bank from the grid without making any hardware changes during a charge mode of operation. The intent of the design was to provide a proof of concept for the system to allow later development in capacity and complexity. University of Arkansas Department of Electrical Engineering 3

2. THEORETICAL BACKGROUND 2. Introduction The design was specified to use the same hardware in two modes of operation and thus have bidirectional power flow functionality. The discharge mode was specified as the process of extracting energy from the battery bank and using it to supplement the grid. This was accomplished by boosting the battery bank voltage to the necessary level and then converting it to ac with the proper frequency and phase needed in order to inject current into the grid. This mode required a way to synchronize the inverter output current with the grid voltage in order to ensure a near unity power factor and thus minimize reactive power. Alternatively, the charge mode of operation utilizes the grid to recharge the battery bank and store energy. This is accomplished by rectifying the grid voltage and regulating the amount of current flowing into the batteries. The discharge mode is explained in greater detail in Section 2.2 while the charge mode is given in Section 2.3. Figure 3 shows a system block diagram while Figure 4 shows the general circuit schematic to be realized. Figure 3: System Block Diagram. Bidirectional Buck/Boost Converter H-Bridge Inverter G G3 GBuck Filter 2 5 VBAT 2 4 8 Vgrid GBoost G2 G4 0 Figure 4: Main Circuit Components. University of Arkansas Department of Electrical Engineering 4

2.2 Discharge Mode At the core of the design shown in Figure 4 is an H-Bridge inverter in series with a bidirectional dc-dc converter. In the discharge mode, the bidirectional buck/boost converter is used to boost the battery voltage to a level higher than the output of the transformer so that current will be allowed to flow from the batteries into the grid. The inverter is used to chop up the DC voltage from the batteries into an unfiltered ac voltage. The chopped ac voltage is then passed through an output filter in order to smooth out the current waveform passing into the grid. The current is finally passed through a step-up transformer which provides isolation while stepping the voltage up to 20 V RMS for direct interface with the grid. Since the voltage waveform is determined by the grid, the inverter will be of the current controlled type. A hysteresis control method was selected for this system because of its ease of implementation. This method works by setting a band around a reference signal and turning on and off switches according to when the current crosses the band boundary. Additionally, the boost converter was controlled by using a proportional-integral (PI) control strategy. 2.3 Charge Mode The benefit of the charge mode lies in the fact that it only adds one additional switch to those required for the discharge mode. The charge mode utilizes the freewheeling diodes on the inverter as a bridge rectifier while the dc-dc converter regulates the amount of current that is allowed to flow into the batteries. This aspect of the design was the easiest to implement since it only requires the modulation of a single switch and does not require any special phase locking considerations. This mode was considered a secondary goal to some extent for this reason. The battery charging was accomplished through a simple trickle charge method. 2.4 Concluding Remarks The design encompasses several aspects of electrical engineering including power electronics, signal processing, control systems, and digital systems. Various voltages and currents throughout the system had to be measured and conditioned into a form that could be read by an analog-to-digital converter (ADC). Furthermore, the design required several digital outputs in order to provide driving signals to the switches utilized in the design. The control system required several algorithms to work in conjunction to achieve the final result (i.e. the boost controller and inverter). The overall system presented an opportunity to explore the many aspects within the electrical engineering field and led to an increased array of knowledge and experience. University of Arkansas Department of Electrical Engineering 5

3. HARDWARE DESIGN OVERVIEW 3. Introduction Figure 5: System Interface Block Diagram. The major challenges presented in the hardware design of the project were brought out in interfacing the DSP with the power electronics. For example, when measuring the ac voltage, it was not sufficient to utilize a simple resistive voltage divider since most ADCs are not tolerant of negative voltages. Hence, a voltage level shifting circuit was required in order to remedy this problem. A similar problem occurs when measuring current levels as simple current sensing resistors are not an optimal choice for this application. Another issue that occurred with both current and voltage measurements was the need for electrical isolation between the power electronics and the digital system. The signal flow diagram for the overall system can be seen in Figure 5. The following sections are broken down as follows: Section 3.2 covers the DSP hardware interface, Section 3.3 overviews all analog measurements while Section 3.4 looks at the digital interface aspect of the design. Note that this section views the hardware from an on-paper approach while Section 5 views the actual printed circuit board (PCB) implementation of the system. 3.2 DSP The DSP chosen for the design was the TMS320F2808 manufactured by Texas Instruments, Inc. This particular DSP features a 00 MHz clock speed, built-in PLL, 6 enhanced PWM outputs, and two 8- channel 2-bit ADCs [2]. The combination of the PLL and enhanced PWM module sets this DSP apart from most DSPs. In addition, the DSP is sold as an evaluation board (Figure 6) which includes all the University of Arkansas Department of Electrical Engineering 6

external circuitry required for optimal functionality. The numerous functions of this DSP make it an ideal choice for grid-connected power systems. Figure 6: DSP Evaluation Board. 3.3 Analog Signal Conditioning Analog signal conditioning was a very important aspect of the design as it was the only means of communicating circuit behavior to the DSP. The signals received by the ADC module of the DSP must be conditioned so that they are between 0-3 V as this is the safe area of operation (SOA) for the ADC. Additionally, the measurement circuitry was required to electrically isolate the corresponding signal from the DSP. The design called for a voltage measurement on either side of the dc-dc converter as well as on either side of the transformer. In addition, current measurements were needed at the low voltage side of the dc-dc converter as well as at the grid interface. In summary, there are 4 voltage measurements and 2 current measurements throughout the system. The current sensors are described in detail in Section 3.3. while the voltage sensors are given in Section 3.3.2. 3.3. Current Sensors The current sensing circuitry utilized was an Allegro Microsystems, Inc. part number ACS72. This Hall-Effect current sensor and its external circuitry are capable of sensing a ±30 A current and University of Arkansas Department of Electrical Engineering 7

converting it into a 0-5 V isolated analog signal [3]. A simple voltage divider circuit was then used to convert the resulting signal into a 0-3 V signal to be used by the ADC. The current sensing network is given in Figure 7. I_IN VCC_+5V 2 3 4 I_OUT IP+ VCC 8 7 IP+2 VI 6 IP- FIL IP-2 GND 5 ACS72 C nf C2 0.uF R 6.8k R2 0k SIG_I A_GND Figure 7: Current Sensing Network. 3.3.2 Voltage Sensors The design included a total of 4 voltage measurements; two were dc measurements while the remaining sensors measured ac voltages. An isolating op-amp (Texas Instruments P/N: ISO22JP) was used to electrically isolate all voltage measurements from the DSP. This op-amp is a unity gain device that can measure up to a 50 khz bipolar signal, assuming the supply rails are not exceeded in which case the device will saturate [4]. All op-amps were powered by means of an isolated complementary ±5V dcdc converter (Texas Instruments P/N: DCH0055DN7). For dc measurements, the isolating op-amps were accompanied by the appropriate voltage dividers in order to scale the anticipated levels down to voltages usable by the ADC. The ac voltages required additional level shifting circuitry to insure that the ADC was never biased into the negative voltage levels. This was accomplished by injecting dc voltage into the inverting op-amp (Texas Instruments P/N: OPA23UA) configuration as shown in Figure 8 by means of a voltage reference IC (Texas Instruments, Inc. P/N: REF332AIDBZT). Figure 8 gives the details for both types of voltage transducers used in the design. University of Arkansas Department of Electrical Engineering 8

V_+5V V_-5V 2 U +Vs -Vs Gnd Vin 6 5 V_GND V V3_+5V V3_-5V 2 U3 +Vs -Vs Gnd Vin 6 5 V3_GND V3 A_GND 7 8 Vout -Vs2 Gnd2 +Vs2 ISO22 0 9 A_-5V A_+5V A_GND 7 8 Vout -Vs2 Gnd2 +Vs2 ISO22 0 9 A_-5V A_+5V R8 R 2k R2 3k TP Test Point SIG_V R5 4.99k R6 6.04k 3 U7 Gnd R7 0k 2 Out In 2.49k A_-5V 4 2 V- - OPA23UA OUT 3 + 8 U5- V+ A_+5V TP3 Test Point SIG_V3 A_GND A_GND REF332 A_+5V Figure 8: Dc Voltage Sensor (left) and Ac Voltage Sensor (right). 3.4 Digital Signal Interface The digital aspect of the design included interfacing the DSP with 6 gate driving circuits. This portion of the design was fairly straight-forward except that the TMS320F2808 is 3.3 V CMOS compatible while the gate driver ICs are +5 V logic level compatible. As a result, a 74LVX3245 logic level translator was used as a buffer between the two incompatible logic levels. Additional logic circuitry was also added for safety concerns arising from the possibility that two switches in the same H-bridge leg could be simultaneously turned on, causing a short circuit. The circuitry designed to eliminate this possibility is shown in Figure 9. In summary, the digital interface of the design gave a hardware safety feature which eliminated the possibility of causing a short circuit while still interfacing the DSP with gate driver circuitry. VCC ~ENABLE R3 U4A 3.3k 2 SIGNAL_ 7404 U5A 2 3 U7A 2 OUT_ 2 74 7404 SIGNAL_2 U6B 3 4 5 U7B 6 OUT_2 3 4 74 7404 Figure 9: Digital Interface. University of Arkansas Department of Electrical Engineering 9

3.5 Power Electronics The power electronics design of the project included the dc-dc converter, H-bridge inverter, and all other accompanying magnetic components. The dc voltage was chosen to be 36 V which required the use of three 2 V lead-acid batteries in series. The step-down transformer used gives a 36 V RMS value which equates to a 36 2 V PK or about 5 V. Therefore, the purpose of the dc-dc converter was to boost the battery voltage to a level higher than 5 V for proper discharge mode operation. In retrospect, the dcdc converter must then step down the 5 V dc rail in order to limit the battery charging current during the charge mode. Section 3.5. gives the design steps taken to design the dc-dc converter. 3.5. Design of the dc-dc Converter The dc-dc converter was required to boost 36 V up to 5 V during forward mode and perform the inverse during reverse mode. The topology used is basically a half-bridge converter with additional filtering circuitry. The design steps include solving the equations in [5] for the buck converter portion of the design. For a buck converter operating in the continuous region: The duty cycle is given by: The current at the continuous-discontinuous boundary is given by: Assuming that the switching frequency was given as 50 khz, the value of the inductance needed was approximately 36 μh. From this, the capacitance values can be calculated from: In this equation, f c signifies the cut-off frequency which was chosen to be about 2 orders of magnitude lower than the switching frequency. This yields the need for a 2700 μf capacitance for the low voltage side. The high voltage side of the dc-dc converter only depends on the amount of ripple allowed in the voltage output. For design simplicity, this value was oversized at 2700 μf so that identical parts could be used. Figures 0 through 2 show the dc-dc converter schematic used in simulations and their results. University of Arkansas Department of Electrical Engineering 0

RG Z V2 0 RBAT L 2 36uH C2 2700u V4 5VDC 0.03 VBAT 36VDC C 2700uF V3 RG2 0 Z2 0 Figure 0: Simulation Schematic. Figure : Boost Converter Voltage with 35% Duty Cycle Simulation. University of Arkansas Department of Electrical Engineering

Figure 2: Battery Current during Charge Mode Simulation. University of Arkansas Department of Electrical Engineering 2

4. SOFTWARE DESIGN OVERVIEW 4. Introduction The software controls for this system were developed using MATLAB/Simulink. The 2808 DSP selected for this project is compatible with the Target for TI C2000 library which allows ANSI C code to be generated directly from the Simulink model. Code Composer Studio interfaces directly with Simulink to provide a method for loading the code onto the DSP boards. The two modes of operation were designed as two separate sets of code which were independently loaded and run from the DSP s RAM. It should be noted that a dynamic control between operating modes is a feature that would be included in a fullscale system but is outside the scope of this project. 4.2 Discharge Mode Control The discharge mode can be characterized as having two independent algorithms operating simultaneously to control the system. The boost converter utilized a PI controller to regulate the increased voltage to a desired level. The H-bridge inverter used a hysteresis control to chop up the boosted voltage and regulate the current flowing into the grid. The PI control was initialized whenever the battery bank is connected and a voltage greater than 32 V was sensed by the DSP. The hysteresis control begins whenever the boost voltage becomes greater than 54 V. The system was designed to continue running until stopped manually by disconnecting the battery bank and grid. batt_v enable F2808 ezdsp Enable Boost C280 x V2_in pwm In Out WA Rate Transition Enabled PWM Control Signal Conditioning Saturation epwm epwm_2a boost_v enable 0 Constant buck gate enable gate 3 GPIOx C280 x C280A0 x V V_in batt _V_out Enable Hysteresis gate 6 GPIO DO Digital Output A V2 V2_in boost_v_out trigger pos_gates ADC ADC A3 A5 V4 I2 V4_in ref _out I2_in current_out Internal Signal Conditioning ref _sig current Hysteresis neg_gates gate 4 C280 x GPIOx GPIO DO Digital Output 2 gate 5 GPIOx C280 x GPIO DO Digital Output 4 Figure 3: Discharge Mode Control Block Diagram. University of Arkansas Department of Electrical Engineering 3

4.2. Signal Conditioning The first major subsystem in the discharge mode controls is the signal conditioning block which can be seen in Figure 4. This subsystem takes each ADC output and recreates the actual voltage or current corresponding to the specific measurement before the hardware signal conditioning alters it. The signal conditioning first converts the uint6 data to int32 so that it can contain negative values. A shift is implemented for V4 and I2 because these values represent AC measurements and this allows for the midpoint to again be zero. This data is then converted to a fixed point representation before being amplified back to the real world amplitude. An infinite impulse response filter (IIR) is used for the voltage signals to remove as much noise as possible but the same is not done for the current signal I2. This is because the frequency of this current is variable so the filter s 3-dB frequency would have to be quite large and thus negate any noise cancelling effects. The ADC outputs are now properly conditioned with real world amplitudes to be used by the subsequent blocks for controlling the system. V_in int 32 (SI) uint 6 to int 32 data conversion RE-SHIFTED In To Fixed Point Out In Out Recreate Battery Voltage In IIR Filter Out batt _V_out 2 V2_in int 32 (SI) uint 6 to int 32 data conversion RE-SHIFTED In Out To Fixed Point In Recreate Boost Voltage Out In Out IIR Filter 2 boost_v_out 2048 Eliminate Signal Conditioning Shift 3 V4_in int 32 (SI) uint 6 to int 32 data conversion 2 Add 3 RE-SHIFTED In Out To Fixed Point 2 FIXED POINT - PER UNIT In Normalize Signal To One Out In Out Set Reference Signal Amplitude In Out IIR Filter 2 3 ref_out 2048 Eliminate Signal Conditioning Shift 4 I2_in int 32 (SI) uint 6 to int 32 data conversion 3 Add RE-SHIFTED In Out To Fixed Point 3 In Out Recreate Output Current 4 current _out Figure 4: Signal Conditioning Block Diagram. University of Arkansas Department of Electrical Engineering 4

4.2.2 PI Control The PI Control of the boost converter utilizes the standard configuration for this type of control which can be seen in Figure 5. The voltage at the output of the boost converter is compared to a reference of 58V. The actual voltage is subtracted from the reference to create an error signal which is then propagated through the control system. The block labeled Gain 3 is the proportional term (P) and was selected to have a gain value of 0.0. The blocks labeled Discrete-Time Integrator and Gain 4 represent the integrated term (I) which has a gain value of 2. The P and I terms are then added together and conditioned before being sent to the epwm block. The conditioning transforms the data back into the uint6 data type and the saturation block limits the range of pulse widths. The epwm block accepts a value from 0 to 00 as an input which represents the duty cycle percentage and outputs the corresponding PWM signal. This control allows for a constant boost voltage to be maintained as the loading of the converter changes with the changing ac current output. The simulated output of the boost converter during full system operation can be seen in Figure 6. Enable V2_in Rate Transition In Out Gain 3 Error K Ts z- Discrete -Time Integrator In Out Gain 4 DC pwm 58 Vref IQmath A Y IQN Float to IQN Figure 5: PI Control Block Diagram. University of Arkansas Department of Electrical Engineering 5

Figure 6: Simulated Output of Boost Converter 4.2.3 Hysteresis Control The hysteresis control of the H-Bridge compares the current output of the system to a reference band. The block diagram for this system can be seen in Figure 7. The grid voltage was sampled and used as the reference signal so that the output current would be in phase with the grid voltage. This prevents the need for phase-locked loops and simplifies the controls and circuitry for the system. The reference band was set so that the upper limit was the reference signal plus one and the lower limit was the reference minus one. The system works so that the positive switches (S3 and S6) turn on whenever the output current becomes less than ref - and the negative switches (S4 and S5) turn on when the output current becomes greater than ref +. The AND gates in this subsystem force the outputs to be disabled until certain conditions are met. The first condition is the trigger for the hysteresis system. This occurs whenever the output of the boost converter exceeds 54 V. The second condition is the dead band for the system. This prevents any switches from turning on when the reference signal is within +/- 0.3 of zero amplitude. A simulated view of the hysteresis control and output can be seen in Figure 8 where the purple signal is the reference and the yellow is the output current. University of Arkansas Department of Electrical Engineering 6

< -.3 Constant IQmath A Y IQN Float to IQN Relational Operator trigger hysteresis width 2 ref_sig IQmath A Y IQN Float to IQN upper bound lower bound 3 current < Relational Operator < Relational Operator 3 OR Logical Operator 3 In Out Enabled Subsystem Logical NOT Operator 4 AND Logical Operator 2 neg _gates.3 Constant 2 IQmath A Y IQN Float to IQN 2 > Relational Operator 2 AND Logical Operator 2 pos_gates Figure 7: Hysteresis Control Block Diagram. Figure 8: Simulated Hysteresis Output Current with Reference and Band University of Arkansas Department of Electrical Engineering 7

4.3 Charge Mode Control The method of charging the battery was chosen to be trickle charging. This is neither an advanced nor an overly desired method of charging however it is easily implemented and acts as a proof of concept for the design. The main focus of the project has been on the discharging mode because of the fact that battery chargers are readily available commercially whereas a system that implements an equivalent discharging mode is less commonplace. 4.3. Trickle Charge Control The trickle charge control scheme is very simple compared to those previously mentioned. A block diagram for this control can be seen in Figure 9. This control scheme works by outputting a constant duty cycle signal to control the amount of current that flows into the battery. This system is enabled whenever the grid becomes connected and the DSP senses at least 40 V at the output of the grid voltage rectifier. This triggers the constant value to be sent to the epwm module which will then output a constant 50 khz waveform with a 0% duty cycle. This method allows current to slowly enter the battery and gradually build a charge. This control scheme is designed like most trickle battery chargers in that the battery and grid must be disconnected to stop the charging process. F2808 ezdsp C280 x ADC ADC A V2 Rate Transition V2_in Signal Conditioning 3 rect _V_out rect_v enable Enable Buck Enabled PWM Control pwm In Out Signal Conditioning Saturation WA epwm epwm _2A C280 x 0 Constant 2 enable = GPIO = header pin 0 boost gate = GPIO 2 GPIOx C280 x GPIO DO Digital Output gate 3 = GPIO 4 = header pin 3 gate 6 = GPIO 7 = header pin 2 C280 x 0 Constant GPIOx GPIO DO Digital Output 2 gate 4 = GPIO 27 = header pin 5 0 Constant 3 C280 x GPIOx GPIO DO Digital Output 4 gate 5 = GPIO 3 = header pin 7 Figure 9: Trickle Charge Control. University of Arkansas Department of Electrical Engineering 8

5. IMPLEMENTATION 5. Introduction Given the overall complexity of the system, the design included a total of 8 PCBs excluding the DSP board in order to distribute the various components. This included a main power board, a signal conditioning board, and 6 identical IGBT gate driver boards. Although the resulting design was somewhat bulky, separating the various components out on different PCBs significantly decreased troubleshooting time. This point was later reassured when it was determined that a second version of the signal conditioning board was required for EMI and safety concerns. Had all the parts been placed on a single PCB, then the construction would have basically restarted from scratch at that point. The components external to the PCBs were mounted as close as possible to PCB to decrease wire length. All in all, the system was built with testing and troubleshooting considerations in mind. The following sections briefly overview the actual hardware constructed for the design. The sections are broken down by the PCB that contains the part of the system in question. Section 5.2 covers the main power PCB which contains the power electronics devices and provides the foundation on which the rest of the design is built. Section 5.3 overviews the 6 identical gate driver boards used to interface with the IGBTs. The scope of Section 5.4 pertains to the signal conditioning board which serves the role of being a buffer stage for the DSP board. The DSP board was a purchased product therefore its design is not covered here. 5.2 Main Power PCB The main power PCB was used to house all the power devices included in the design. This included two +5 V power supplies used by the digital and analog circuitry. These power supplies were isolated via transformers in order to eliminate ground loops. Both power supplies were of the linear topology and utilized +5 V regulators (Texas Instruments P/N: UA7805CKCS). In addition, the signal conditioning PCB and all the gate driver boards were placed on the main board. This included all the IGBTs, freewheeling diodes, filter capacitors, and the dc-dc converter inductor. The current sensing circuitry was placed on the main board since the sensors must lie in the main current path. Also, the voltage dividers used by the voltage sensors were placed on this board in order to keep the high-voltage and high-current signals away from the signal conditioning board. The main board was basically designed to be a foundation for the power devices and as a mounting for the other PCBs. The populated main board can be seen in Figure 20. University of Arkansas Department of Electrical Engineering 9

Figure 20: Populated Main Power Board. 5.3 Gate Driver PCBs The gate driver PCBs were small.5 X.5 PCBs used to drive the IGBTs. Each gate driver was placed on its own board in order to ease replacement in case one was to fail. In addition, removing the gate driver boards from the main board allowed for easy testing of gate signals without actually switching a device. The six gate driver boards can easily be seen in Figure 20. In summary, the 6 gate driver boards were a small removable module that enabled easy testing and troubleshooting. 5.4 Signal Conditioning PCB The signal conditioning board housed the digital interface and the analog signal conditioning circuitry. It was built as a buffer for the DSP board by providing isolation with all analog circuitry and a +3.3 V to +5 V logic level translator. The signal PCB was designed to mount to the main board using stand-offs and header pins. The DSP board was connected to the signal board by a similar method. The signal board can be seen in Figure 2. University of Arkansas Department of Electrical Engineering 20

Figure 2: Signal Conditioning Board. University of Arkansas Department of Electrical Engineering 2

5.5 Complete Build-Up The complete circuit and component build-up can be seen in Figures 22 and 23. Figure 22: Completed Project. Figure 23: Completed Project. University of Arkansas Department of Electrical Engineering 22

6. RESULTS 6. Introduction This section gives the results of the project and then states some conclusions as to what was accomplished and what aspects could be improved upon. The results are broken down by the mode of operation: Section 6.2 shows the results for the charging mode while Section 6.3 gives the discharge mode results. Section 6.4 summarizes the conclusions gained from the project while Section 6.5 explores possibilities for future work. 6.2 Charge Mode Results As expected, the charging mode was easily implemented by modulating the dc-dc converter for buck mode. The switch was modulated using a constant duty cycle in order to slowly charge the battery bank from the grid. This method is similar to how a commercially available trickle battery charger functions. An illustration of trickle charging with a 0% duty cycle can be seen in Figure 24. Figure 24: Trickle Charge. University of Arkansas Department of Electrical Engineering 23

6.3 Discharge Mode Results The major challenge presented in the discharge mode was to modulate the H-bridge switches in such a way that the current injected into the grid was in phase with the grid voltage. This aspect of the design was successful as shown in Figure 26. The positive gate signals (O-Scope Ch2) are shown to only modulate during the positive cycle while the negative signals (O-Scope Ch3) modulated during the negative cycle only. Figure 25: Voltage and Current Waveform with Gate Signals. A non-ideal characteristic of the system can be seen in the output current waveform (O-Scope Ch4). The problem is that the filter inductor was operating in the discontinuous mode, evident by the choppy current waveform. The probable solution would be to increase the inductance value to help smooth the current waveform; however, the switching frequency for hysteresis control is variable and makes filter design difficult. Another possible cause for the large di/dt in the current waveform is the University of Arkansas Department of Electrical Engineering 24

difference in voltage between the transformer secondary and the output of the boost converter. The rectified voltage of the transformer secondary is 36 2 V or about 5 V dc. A higher differential voltage between this value and the output of the dc-dc converter yields a higher di/dt in the current waveform when a switch pair is turned on. Figure 26 shows the output voltage of the boost converter (O-Scope Ch2) and the inverter output current simultaneously while Figure 27 shows only the grid side voltage and current. Regardless of the discontinuous current, the desired RMS value for the output current was maintained throughout the operation of the discharge mode. In summary, the inverter successfully injected current in to the grid at near unity power factor thus proving the functionality of the system during this mode of operation. Figure 26: Voltage and Current Waveforms with Boost Converter Output. University of Arkansas Department of Electrical Engineering 25

Figure 27: Grid Voltage and Current Waveform. 6.4 Conclusion from Results The project was an overall success since all the goals were met in the end. Current was fed into the grid that was in phase with the ac mains voltage waveform. The current exhibited some non-ideal qualities; however, this distortion can most likely be fixed by simply replacing the output inductor. The project also proved the capability of recharging the batteries with no hardware changes and thus proved the capacity for bidirectional power flow through the system. The successful demonstration of operating modes shows that the system meets all the goals that were set at the beginning of the project. 6.5 Future Work Any project should always leave one with new knowledge and a desire to take that new knowledge to the next level. The characteristics of this system presented an opportunity to explore many aspects within electrical engineering and allowed the design team members to gain a diverse array of knowledge and experience. All in all, the project was a very challenging and complex project that turned University of Arkansas Department of Electrical Engineering 26

out to be very rewarding and successful in the end. The project also led to many more questions and ideas as to how to improve the system functionality. The most obvious future work pertaining to this project would be to redesign the output filter inductor. This will be a challenging task as a filter is more difficult to design for the variable switching frequencies inherent in a hysteresis control scheme. While hysteresis control is a proven method for grid connected inverters, the problems that arise from having a variable switching frequency make it less desirable. As a result, exploring other control methods would prove useful. In addition to new control methods, there are several other interesting topics to explore such as: Implementing a control that can dynamically switch between charge and discharge mode depending on the peak load demand. Eliminate the need for a step-up transformer by increasing the battery bank voltage. Perform system efficiency and reliability tests. University of Arkansas Department of Electrical Engineering 27

REFERENCES [] American Wind Energy Association, Top 20 States with Wind Energy Resource Potential, http://www.awea.org/pubs/factsheets/top_20_states.pdf. [2] Texas Instruments, Inc., TMS320F280x Data Manual, SPRS230J, Sept. 2007. [3] Allegro MicroSystems, Inc., AC72 Datasheet, ACS72-DS, Rev. 7, 2007. [4] Texas Instruments, Inc., ISO22 Datasheet, PDS-857F, Nov. 993. [5] Ned Mohan, Tore M. Undeland, and William P. Robbins, Power Electronics: Converters, Applications, and Design, 3rd ed. Hoboken: John Wiley & Sons, Inc., 2003. University of Arkansas Department of Electrical Engineering 28

ACKNOWLEDGEMENTS We would like to thank Diogenes Molina of the University of Arkansas for assistance in programming. We would also like to thank Mr. Ray Hayes and American Electric Power for their financial support of this project. University of Arkansas Department of Electrical Engineering 29