Performance Optimization of a DC-DC Converter with Series-Parallel Resonant Circuit

Transcription

1 AGH Univerity of Science nd Technology Performnce Otimiztion of DC-DC Converter with Serie-Prllel eonnt Circuit M.Sc. fł Widórek Dierttion ubmitted to the Fculty of Comuter Science, Electronic nd Telecommuniction t AGH Univerity of Science nd Technology in rtil fulfillment of the requirement for the degree of Doktor nuk technicznych w dycylinie Elektronik Promoter: Prof. dr hb. inż. Stniłw Kut Keyword: Sequentil Cycle Steling SCS, CC reonnt converter, digitl control Krkow, My 6,

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3 Akdemi Górniczo-Hutnicz im. Stniłw Stzic Otymlizcj Prmetrów Prcy Przetwornicy DC-DC z zeregowo-równoległym obwodem rezonnowym Mgr inż. fł Widórek Dyertcj złożon n Wydził Informtyki, Elektroniki i Telekomunikcji, Ktedr Elektroniki n Akdemii Górniczo-Hutniczej im. Stniłw Stzic jko ełnienie części wymgń niezbędnych do uzykni tytułu Doktor nuk technicznych w dycylinie Elektronik Promotor: Prof. dr hb. inż. Stniłw Kut Słow kluczowe: Sequentil Cycle Steling SCS, rzetwornic rezonnow CC, cyfrowe terownie Krkow, My 6,

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5 ACKNOWEDGEMENTS I would like to thnk Dr Cezry Worek for hi hel nd guidnce during my tudie. Hi exerience roved to be very helful to me nd my work. It h been leure to work with uch cretive eron. I m gretly indebted to Prof. dr hb. inż. Stniłw Kut for hi gret inight in my work nd for hi invlueble remrk. Hi contnt uort contributed vtly to hing my chrcter of reercher. I m lo grteful to mgr inż. Słwomir igenz for hi uort in technicl roblem. I hve lerned lot while working with him. 5 of 7

6 Content Introduction... 5 Toologie for DC-DC eonnt Power Converter eonnt inverter toologie C erie loded inverter Hlf-bridge rllel loded reonnt converter..... Hlf-bridge erie reonnt CC converter..... Hlf-bridge erie C converter Hlf-bridge erie-rllel CC converter Common Filure Cue in eonnt Converter ectifier toologie Hlf-wve rectifier Trnformer center-ted rectifier Bridge rectifier.... Summry... Control Method for SMPS.... Pule Width Modultion.... Phe Shift Modultion.... Burt Mode Pule Denity Modultion.... Frequency Modultion Aymmetricl Pule Width Modultion control eonnt Current Phe Control Summry... Novel Control Method of eonnt Power Converter Sequentil Cycle Steling.... Oertion of the SCS Control Scheme.... Ste reone of erie-rllel CC reonnt circuit.... Summry Tet Pltform Active Power Fctor Correction Module CC eonnt DC-DC Converter Univerl Control Bord for eonnt Converter Meurement Circuit of 7

7 5.. Outut Prmeter Meurement Circuit eonnt Current Meurement Summry Digitl Control Imlementtion Digitl Frequency Modultion Digitl SCS Summry Meurement nd Exerimentl Verifiction Oertion Wveform Outut Voltge nd Outut Voltge ile od Ste eone Efficiency Efficiency meurement for V uly voltge Efficiency meurement for 9V uly voltge from PFC rectifier Conducted EMI meurement Summry Concluion Bibliogrhy Aendix A - Schemtic.... PFC Module Schemtic.... CC eonnt Converter Schemtic.... Control Bord Schemtic of 7

8 Performnce Otimiztion of DC-DC Converter with Serie-Prllel eonnt Circuit M.Sc. fł Widórek Abtrct: The demnd for high erformnce i contntly reenting reure for develoment of more efficient ower converter. The trend for mller device e.g. TV et, cr bttery chrger ut high contrint on hyicl volume of the ower uly. By imroving converter efficiency it i oible to ve ce on ower comonent i.e. ower witche, inductor, trnformer nd het diition comonent i.e. rditor. A trditionl hrd-witching olution roduce inufficient reult, the ttention hift towrd reonnt converter. Thee converter by lying oft-witching technique llow for higher efficiencie. Since the reonnt converter introduce their own roblem to the deign, the reercher focued on develoing vriou toologie of the reonnt tnk. The develoment of higher order CC, C nd CC toologie heled in mitigting of ome roblem in deigning reonnt converter. Concurrently, the mot oulr control method for reonnt converter h been the FM control. Thi method i ey to undertnd nd imlement, which i why it i ued o widely. However, the FM control h oor efficiency t lod lower thn %. Since mny of the ower ulie don t work contntly t hevy lod condition, there i need for efficiency imrovement t lower lod. The toic of reonnt control method i being reerched very hevily. Mny olution hve been reented in ltet er, however there i till room for imrovement. The Sequentil Cycle Steling Control SCSC SC bed on tented olution PCT/EP/679 h not been reerched yet. Therefore, the thei i focued of reerch nd develoment of the SCSC. The method imrove efficiency by introducing elective teling of converter witching cycle. During the time when the witching imule re generted, the ZVS condition re enured. During the time when witching imule re not generted i.e. tolen, one of the hlf-bridge witche ty contntly turned on, while the other i turned off. Thi reduce the reitnce in the reonnt tnk nd llow for longer free ocilltion of the reonnt tnk, thu conerving energy in the converter. An imortnt rt of the SCSC i the ynchroniztion of the firt witch event fter the free ocilltion eriod with the current of the reonnt tnk. By lying uch control mechnim, the ower comonent re better utilized, which directly led to imrovement of reonnt converter erformnce. The thei rovide hort introduction to reonnt converter toologie nd cover elected tte- of-the-rt control method. The focu i then directed t deign conidertion for SCSC dedicted to CC reonnt converter. The te reone of CC reonnt tnk i nlyzed nd rcticl imlementtion of SCS controller i reented. The reulting hyicl model i then verified by meurement. 8 of 7

9 Otymlizcj rmetrów rcy rzetwornicy DC-Dz zeregowo-równoległym równoległym obwodem rezonnowym Mgr inż. fł Widórek Strezczenie: Zotrzebownie n rzetwornice mocy o wyokiej rwności ciągle wzrt. Trend ciągłej minituryzcji urządzeń użytkowych rwi, że dotęne miejce dl zilcz jet toniowo ogrniczne. Zwiękzenie rwności energetycznej zilcz umożliwi użycie mniejzych elementów mocy n. trnzytory mocy, indukcyjności, dłwiki, trnformtory orz mniejzych rditorów. Mjąc n uwdze ronące ceny energii elektrycznej orw rwności energetycznej zilcz o % koztem jego wyżzej ceny tje ię corz brdzie trkcyjnym rozwiązniem, gdyż inwetycj t jet w tnie ię zwrócić o roku ciągłego użytkowni urządzeni. Trdycyjne rozwiązni toujące twrde rzełącznie corz częściej nie ą w tnie dć tyfkcjonujących wyników, dltego zintereownie kieruje ię w tronę rezonnowych nowych rzetwornic energii. Porzez wykorzytnie technik miękkiego rzełączni, rezonnowe rzetwornice ą w tnie oiągć wyżze rwności. Z owodu wytęowni roblemów związnych z rezonnowymi rzetwornicmi, ottnie bdni kuiły ię n orcowniu nowych toologii obwodów rezonnowych orz metod ich rojektowni. Orcownie toologii wyżzych rzędów tkich jk CC, C czy CC rozwiązło niektóre wdy rzetwornic rezonnowych. ównolegle, jedną z njbrdziej rozowzechnionych metod terowni rzetwornicmi jet modulcj czętotliwości FM. Metod t jet reltywnie łtw w nlizie i imlementcji i dltego jet zeroko toown. Nietety, terownie FM chrkteryzuje ię łbą rwnością dl obciążeń oniżej %. Potrzeb orwy rwności w tym zkreie wynik bezośrednio z fktu, że zilcz rzdko rcuje od ciągłym ełnym obciążeniem. Temtyk terowni rezonnowymi rzetwornicmi jet ztem brdzo trkcyjnym olem do bdń nukowych. Wiele rozwiązń oublikownych w ottnich ltch okzuje, że temt ten nie zotł rzebdny wytrczjąco dokłdnie. Jedno z ottnich rozwiązń Sequentil Cycle Steling SCS bzujące n tencie PCT/EP/679 nie zotło jezcze rzebdne. W związku z tym fktem, niniejz dyertcj kui ię n zbdniu włściwości i orcowniu ierwzej werji kontroler SCS. Oiywn metod olez rwność energetyczną orzez elektywne wygznie imulów terujących kluczmi. W czie kiedy imuly terujące ą generowne, kontroler zewni wrunki rzełączni z zerowym nięciem. Ntomit, w czie wygzeni imulów terujących jeden z kluczy w rzydku ółmotk ozotje włączony w celu umożliwieni wobodnych ocylcji obwodu rezonnowego. Zmniejz to rezytncję zeregową widziną rzez obwód rezonnowy i ozwl n wydłużeni czu wobodnych ocylcji, co bezośrednio rzekłd ię n zmniejzenie trt mocy w rzetwornicy. Wżnym elementem kontroler SCS jet włściw ynchronizcj ierwzego imulu terującego z rądem rezonnowym, o okreie wygzeni. Stoując wyżej oiną metodę, wykorzytnie elementów mocy rzetwornicy jet wydjniejze, co bezośrednio rzekłd ię n orwę rmetrów rzetwornicy. Dyertcj zwier wrowdzenie w temtykę rezonnowych owych rzetwornic orz oiuje wybrne njnowze oiągnięci w dziedzinie terowni rzetwornicmi rezonnowymi. Ntęnie oine ą roblemy związne z imlementcją terowni SCS dedykownego dl obwodu rezonnowego CC. Po nlizie teoretycznej kokowej odowiedzi obwodu rezonnowego oin jet roozycj imlementcji kontroler SCS. Otrzymny model fizyczny jet ntęnie weryfikowny orzez 9 of 7

10 omiry odtwowych rmetrów zilcz tkich jk: tbilność nięci wyjściowego, rwność, odowiedź n kokową zminę obciążeni orz zburzeni rzewodzone. Wyniki oiywnej metody terowni SCS ą orównne z wynikmi otrzymnymi rzy ztoowniu klycznego terowni FM. of 7

11 it of Symbol α β φ μ Ψ A B k C B C f C GD C P C S D f f o Δf o f r Steinmetz eqution frequency coefficient Steinmetz etz eqution mgnetic flux denity coefficient he hift between two bridge leg mgnetic ermebility of free ce he hift between reonnt current nd fundmentl comonent of inut voltge coil cro ection re ek mgnetic flux denity blocking ccitor outut filter ccitnce trnitor ritic ccitnce between gte nd drin reonnt tnk rllel ccitnce reonnt tnk erie ccitnce duty cycle reonnt tnk corner frequency oerting frequency oerting frequency devition lod deendent reonnt frequency i, i r reonnt current i I COUT I lod I m K K, K, K K D K I llce trnform for reonnt current outut ccitor current lod outut current rectifier current fundmentl comonent mlitude Steinmetz eqution mteril loe coeffcient PID trnoed form coefficient PID derivtive coefficient PID integrl coefficient of 7

12 K P f P rim Qlimit S ec l e n N P lo Q ON, DSON T m v AB V DS V e V m V out V out_high V out_low V V m x MS [n] PID roortionl coefficient outut filter inductnce reonnt tnk rllel inductnce rimry winding inductnce qulity limiter winding inductnce reonnt tnk erie inductnce econdry winding inductnce effective coil mgnetic th length trnformer turn rtio number of coil turn converter ower loe reonnt tnk loded qulity fctor lod reitnce trnitor chnnel reitnce in ON tte mling eriod rectifier filter inut voltge trnitor drin ource voltge ferrite core effective volume hlf-bridge voltge fundmentl comonent mlitude outut voltge outut voltge high threhold outut voltge low threhold rectifier voltge fundmentl comonent rectifier voltge fundmentl comonent mlitude MS vlue of dicrete ignl of 7

13 it of Acronym AD APWM BJT CMS DC EMC EMI FM FMC FPGA IC ED MOSFET PCB PDM PFC PID P PSM PWM MS SCS SCSC SMPS SPS SSOC Anlog to Digitl Aymmetricl Pule Width Modultion Biolr Junction Trnitor Cyclic oot Men Squre Direct Current Electromgnetic Comtibility Electromgnetic Interference Frequency Modultion Frequency Modultion Control Field Progrmmble Gte Arry Integrted Circuit ight Emitting Diode Metl Oxide Semiconductor Field Effect Trnitor Printed Circuit Bord Pule Denity Modultion Power Fctor Correction Proortionl-Integrl-Derivtive Phe ocked oo Phe Shift Modultion Pule Width Modultion oot Men Squre Sequentil Cycle Steling Sequentil Cycle Steling Control Switch-Mode Power Suly Smle er Second Self-Sutined Sutined Ocilltion Control of 7

14 ZCS ZVS Zero Current Switching Zero Voltge Switching of 7

15 . Introduction Introduction Almot ll of the electric device ued nowdy need ome ort of ower converter for roer oertion. The liction cn rnge from conumer electronic e.g. TV et ower ulie, lto ower ulie, bttery chrger through lighting e.g. ED lm to utomotive e.g. electric cr bttery chrger. All of thee field reent demnd for better erformnce ower converter. Higher efficiency, mller volume, le weight, better relibility, trict EMC comlince re only everl of the requirement ut on ower converter deign. The trditionl hrd-witching toologie e.g. buck, uh-ull, ull, flybck hve limited erformnce due to exceive witching loe. ecent develoment [],[],[][] try to reduce thee witching by introducing qui-reonnt toologie where ome degree of oft-witching witching cn be emloyed. While thee technique imrove the erformnce of hrd witching converter, even better reult cn be chieved by emloying the reonnt converter. The imlet toologie for the reonnt converter, i.e. erie C or rllel C reonnt converter, uffer from mny drwbck, uch wide frequency vrition for the whole lod rnge or filure t lod hort-circuit or oen-circuit reectively. The mot widely lied reonnt toology i the C erie reonnt converter. While it imrove the erformnce over the C erie reonnt converter it i till rone to filure t lod hort-circuit. Thi i where the CC erie-rllel reonnt converter imrove over the former. Hving n embedded lod hort-circuit rotection with elf outut current limiting i deired feture in mny liction. However, the CC erie-rllel converter uffer from reltively oor efficiency t light lod. Thi i where n ide for chnging the control method ered. The Frequency Modultion FM h oor efficiency t light lod nd roduce high mlitude nrrow EMI ike. Additionlly, the CC erie-rllel converter cn be imroved with mgnetic comonent integrtion technique [],[5],[6]. The toic of the thei Performnce otimiztion of DC-DC converter with erie-rllel reonnt circuit contin theoreticl nlyi, tte-of-rt rt in reonnt converter control method nlyi, followed by deign nd imlementtion of novel control method, Sequentil Cycle Steling SCS, tht enure roer condition for ZVS witching in ll oerting condition. Additionlly, in order to imrove the energy converion efficiency in light lod condition, the rooed method introduce elective teling of converter witching cycle. The rooed olution hll imrove reonnt converter erformnce nd reduce it ize. The innovtion of the thei i the liction of unique control lgorithm, dedicted to reonnt converter, bed on elective teling of the witching cycle on following mnner. During the time when the witching imule re generted, the ZVS condition re enured. During the time when witching imule re not generted i.e. tolen, one of the hlf-bridge witche ty contntly turned on, while the other i turned off. Thi reduce the reitnce in the reonnt tnk nd llow for longer free ocilltion of the reonnt tnk, thu conerving energy in the converter. An imortnt rt of the SCSC i the ynchroniztion of the firt witch event fter the free ocilltion eriod with the current of the reonnt tnk. By lying uch control mechnim, the ower comonent re better utilized, which directly led to imrovement of reonnt converter erformnce. The SCSC decribed bove i bed on control method reented in [7] nd [8] owned by AGH Univerity of Science nd Technology. The reerch h been conducted rt of grnt 65 Innowcyjny zilcz rezonnowy dużej mocy do ojzdów hybrydowych i elektrycznych directed by Slwomir igenz from Fideltronik Polnd S. z o.o.. The reerch rt of the roject h been conducted by the uthor t AGH Univerity of Science 5 of 7

16 . Introduction nd Technology, while the develoment rt h tken lce t Fideltronik Polnd S. z o.o.. It hould be tted tht the uthor i both tudent t AGH UST nd n emloyee of Fideltronik Polnd S. z o.o.. The coe of the thei goe long worldwide reerch of DC-DC reonnt ower converter nd reonnt converter control method. Aide from theoreticl ect, the reented method h high otentil in liction in modern DC-DC converter. Therefore, e, the thei h three objective to fulfill: - The rooed control method dedicted to reonnt converter, bed on equentil teling of witching cycle hll imrove converter energy efficiency - The rooed control lgorithm hll llow for better integrtion of converter functionl block - The SCSC lied to reonnt converter hll reduce the conducted EMI emiion The dierttion i orgnized with eight chter, with the firt nd current being the introduction. Chter two nd three will give the tte of the rt in reonnt converter nd reonnt converter control method. Chter four will reent the concet of the novel SCSC method. The tet ltform i decribed in chter five followed by the decrition of the digitl imlementtion of FM Control nd SCSC in chter ix. The meurement reult re reented in chter even nd the dierttion conclude in chter eight. 6 of 7

17 . Toologie for DC-DC eonnt Power Converter Toologie for DC-DC eonnt Power Converter In the lt coule of yer the electronic indutry exerienced rid develoment in ower electronic liction uch ED lm ower ulie W-W, bttery chrger 5W 5W, electric motor drive ytem nd mny more. High efficiency, lightweight, mll ize nd low rice hve lwy been the rmeter with contnt demnd for imrovement. In n increing number of liction the erformnce of clic hrd-witching converter i inufficient. Although the reonnt energy converion technique h been known ince 959 [9], it h been minly ued in ecific tye of liction e.g. olid-tte tte electronic bllt for fluorecent lm or high frequency inductive heting. Nowdy, the reonnt converter re lied in wider re. In thi chter the mot common reonnt toologie will be dicued. Subchter. will focu on reonnt inverter toologie, followed by brief decrition of mot common filure cue in reonnt converter in ubchter.. Finlly, n introduction of bic rectifier circuit will be reented in ubchter... eonnt inverter toologie There re everl clifiction for the reonnt inverter toologie. The uthor h decided to ue the element count the min feture. Thu, there cn be two element toologie nd order, three element toologie rd order, four element toologie th order nd higher []. A hort decrition of nd order erie loded, nd order rllel loded, rd order CC, rd order C nd th order CC inverter will be given in the following ection... C erie loded inverter The circuit for the cl D voltge witching erie loded reonnt inverter for both hlf-bridge nd full-bridge configurtion i reented in Fig... b Q D Q A Q D D A V in i S C S V in i S C S Q D V DS Q D D A Q A Fig.. Cl D voltge witching erie reonnt circuit. Hlf-bridge configurtion, b Full-bridge configurtion The following nlyi will be erformed only for hlf-bridge configurtion, ince the behvior of the full-bridge configurtion i nlogou. The reonnt circuit, formed by inductor S nd ccitor C S connected in erie, i driven by rectngulr wveform, creted by two bidirectionl witche Q,D nd Q,D. The lod, rereented by reitor, i connected in erie with the reonnt circuit. The witche re driven by rectngulr wveform with ded time, tht uully h fixed vlue. 7 of 7

18 . Toologie for DC-DC eonnt Power Converter Fig.. reent wveform tht how the oertion of the reonnt inverter t vriou witching frequencie. A qure wve voltge V DS i driving the erie reonnt circuit. Auming tht the lod reitnce in t too high the qulity fctor i high enough, the hlf-bridge outut current i cn be roximted with ine wve. At the reonnt frequency equl to: the hlf-bridge outut current i in he with the hlf-bridge outut voltge. In uch condition, the trnitor witch t zero current which reult in zero witching loe. However, mny liction ue vrying oertionl frequency to control outut rmeter e.g. outut voltge. Thi cn reult in oertion either below or bove the oerting frequency. For f < f the erie reonnt circuit i een ccitive lod for the hlf-bridge. In uch condition the current i flowing through the reonnt circuit i hed in he of the fundmentl comonent of the V DS voltge by the he Ψ, where Ψ <.. Becue of thi, the current in the witch, t intnt jut fter turn on, i oitive nd i negtive jut before the turn off. The conduction equence i follow. Conider tht witch Q i ON nd conduct oitive current. Q i then being turned off fter certin time fter the current goe negtive. At thi time the nti- rllel diode D trt to conduct, becue the witch Q i till turned off. When the witch Q i turned on, the voltge V DS trt to decree, cuing the voltge cro Q V DS to incree. Thi turn the diode D off nd divert the current to Q. The cycle finihe when Q turn off t negtive current nd the current i trt to flow through D. A new cycle begin when Q turn on. In oertion below reonnt frequency ome undeired effect occur t turn on of the ech trnitor. The firt one i the revere recovery of the nti-rllel diode of the ooite witch. Suoe we re in tte when Q i turned off nd D conduct the current i.. When trnitor Q turn on the voltge on the D chnge it olrity nd trt to turn off the diode. However, the diode D turn off t high di/dt which will crete lrge revere recovery current ike. Thi current ike will flow through the bottom trnitor which h jut turned on, becue the inductor in the erie reonnt circuit won t llow rid current chnge. Thee current ike ut trnitor under evere tre, which cn led to trnitor detruction. A econd detrimentl effect t trnitor turn on i the dichrge of the trnitor outut ccitnce nd in cl DE converter, the dditionl witch ccitnce, which further incree the current ike. Thi effect occur becue the trnitor re turned on t high V DS voltge, which i equl to V IN. Another effect to conider i the Miller effect. Becue the V GS incree while the V DS decree, the trnitor behve like inverting mlifier. Therefore, the C GD will incree the trnitor inut ccitnce ignificntly, which will require higher ower to drive the gte. The effect decribed bove ugget tht in liction uing MOSFET oertion below reonnce hould be voided. The lt region to cover i the oertion bove the reonnt frequency. For f > f the erie reonnt circuit rereent n inductive lod for the hlf-bridge. The current i flowing through the reonnt circuit lg in he with the fundmentl comonent of the V DS voltge by the he Ψ, where Ψ >. Prior to witch turn on the current flowing through witch i negtive, where before turn off it i oitive. The current conduction equence i follow. et ume the trnitor Q i lredy conducting oitive current. After the gte drive turn the trnitor off, the current divert to the bottom diode D. The voltge V DS trt to decree u to the vlue when it reche the vlue 8 of 7

19 . Toologie for DC-DC eonnt Power Converter of the D diode forwrd voltge bi. Next, the trnitor Q turn on while the current till flow through the diode D i.e. the witch S current i negtive. b c V GS f<f V GS ff V GS f>f???t???t???t V GS V GS V GS V DS V DS V DS V IN V IN V IN V DS V DS V DS V m V m V m i i i? I m I m? I m I S I S I S I m I m I m I S I S I S I m I m I m Fig.. Wveform in hlf-bridge erie reonnt inverter for different frequencie. Oertion below reonnce. b Oertion t reonnt frequency. c Oertion bove reonnce.[] 9 of 7

20 . Toologie for DC-DC eonnt Power Converter When Q turn on the reonnt current i divert to Q from D. The trnitor Q will turn off when it i till conducting oitive current. After the turn off, the current i diverted to diode D nd the voltge V DS rie to vlue lightly le thn the inut uly voltge. A new cycle trt when the trnitor Q turn on, while the current i w till flowing through the diode D. A cn be een, the trnitor re turned on t nerly zero voltge which i equl to the diode forwrd voltge dro. Becue the V DS voltge i cloe to zero, the Miller effect i bent nd the inut ccitnce nce i not increed. Thi led to nerly zero loe t turn on for the trnitor. For f > f the turn on loe i nerly zero, but there i turn off lo in the trnitor. Both the trnitor voltge nd trnitor current overl during turn off, reulting in witch lo. The behvior of the C reonnt circuit to the lod chnge will be dicued. If the lod incree towrd infinity, i.e. oen circuit, the reonnt current i decree to zero, which cn led to lo of zero-voltge witching nd oibly cn led to dmging the witch. On the other hnd, the circuit behve well under hort circuit or ner hort circuit condition. The loded qulity fctor i high nd the current i i nerly inuoidl. However, cre mut be tken not to llow the oerting frequency to go too cloe to the reonnt frequency, becue in thi condition the current i will be only limited by ritic reitnce of the S, C S nd on of the witche. Becue the qulity fctor i high, the reulting high mlitude of current nd voltge cn led to dmging either the witche or one of the reonnt circuit comonent... Hlf-bridge rllel loded reonnt converter Fig.. how the circuit for cl D rllel loded reonnt inverter. The reonnt circuit i creted by P nd C P. A lrge ccitor C B i inerted in erie with to revent DC current from flowing to the lod. The verge voltge on C B i V IN /. The two witche S nd S crete voltge qure wve tht drive the rllel reonnt circuit. In ON tte the witche cn conduct both oitive nd negtive current, while in OFF tte the witche cn only conduct negtive current. Both witche re driven by non-overling overling voltge qure wve i.e. the duty cycle i le thn 5%. Q D V in P C B Q D C P Fig.. Cl D voltge witching hlf-bridge rllel reonnt circuit The reonnt frequency equl to: of 7.

21 . Toologie for DC-DC eonnt Power Converter Fig.. how the current nd voltge wveform for different oerting frequencie, with the umtion tht the loded qulity fctor i ufficiently high e.g. Q >.5. b c f<f ff f>f V GS V GS V GS???t???t???t V GS V GS V GS V DS V DS V DS V IN V IN V IN V DS V DS V DS V m V m V m i i i? I m I m? I m I S I S I S I m I m I m I S I S I S I m I m I m Fig.. Wveform in hlf-bridge rllel reonnt inverter for different frequencie. Oertion below reonnce. b Oertion t reonnt frequency. c Oertion bove reonnce.[] of 7

22 . Toologie for DC-DC eonnt Power Converter For the oerting frequency f < f r the rllel reonnt circuit rereent ccitive lod nd the he hift between the inductor current i nd the fundmentl comonent of the voltge V DS i negtive Ψ <. Thi mode of oertion i not recommended for the me reon decribed in erie reonnt inverter. For f > f r the he hift i oitive Ψ > nd the reonnt circuit rereent n inductive lod to the hlf-bridge. The inductor current i lg behind the fundmentl comonent of the voltge V DS. The witche turn on while they conduct negtive current nd turn off when they conduct oitive current. The witching equence i follow. Conider tht the witch S i conducting oitive current. When the trnitor Q turn off the voltge V DS trt to incree. Thi cue voltge V DS to decree until it reche negtive voltge ufficiently high to turn on the diode D. The current divert from Q to D. The trnitor Q i being turned on while the diode D i till conducting current i.e. the witch S i conducting negtive current. The current then divert to Q. The turn off of the trnitor Q i nlogou to the turn off of the Q. The trnitor re turned on t low V DS voltge, mking the turn on loe negligible. At turn off both the trnitor voltge nd trnitor current overl reulting in witch lo. A cn be een, the witching equence i exctly the me in C erie reonnt converter. The C rllel reonnt circuit lod chnge behvior differ to erie reonnt circuit lod chnge behvior. When the outut reitnce i decreing towrd hort circuit the ccitor C P nd C B re connected in rllel. The current in C P i zero becue C P << C B. The witche re loded by the inductor P which limit the hort circuit current unle the inductor turte. When the lod i cloe to infinity the loded qulity fctor i very high nd the voltge cro the ccitor nd the inductor re inuoidl. A the oerting frequency roche the reonnt frequency, the inductor current nd ccitor voltge cn rech very high vlue, which cn led to inductor or ccitor filure becue of exceive tre... Hlf-bridge erie reonnt CC converter In reviou ubchter erie nd rllel loded reonnt inverter hve been dicued. The erie-rllel reonnt inverter i hybrid between the erie loded reonnt inverter nd rllel loded reonnt inverter [], [], [], []. The ide i to lit the reonnt ccitnce into two erte ccitor. The lod i connected to one of thee ccitor. Fig..5 reent the circuit for the cl D hlf-bridge erie reonnt inverter. The reonnt circuit i formed by the element, C, C,. The ccitor C i connected in erie with inductor, while ccitor C i connected in rllel with lod reitor. The witche S nd S cn conduct both oitive nd negtive current in ON tte nd only negtive current in OFF tte. The reonnt circuit i driven by qure wve voltge creted by the hlf-bridge. The witche re driven by voltge qure wve with duty cycle le thn 5%, to revent cro conduction. If the ccitor C become very lrge the circuit will trnform into rllel loded reonnt inverter. ikewie, if the ccitor C i removed C the circuit trnform into erie loded reonnt inverter. of 7

23 Q D. Toologie for DC-DC eonnt Power Converter V in C Q D C Fig..5 Cl D voltge witching hlf-bridge erie-rllel CC reonnt circuit. When the lod reitnce roche zero, the ccitor C i hort circuited. The reonnt circuit conit of nd C tht form erie reonnt circuit. A long the witching frequency i fr enough from reonnt frequency of the -C circuit, the converter will oerte under fe condition. Otherwie, the high voltge nd current t the -C reonnt frequency my dmge the circuit. Similrly, when lod reitnce incree towrd infinity, the reonnt circuit form unloded rllel reonnt circuit, cuit, where erie connection of C nd C form the reonnt ccitnce. The reonnt frequency i equl to the corner frequency Oertion t light lod t f led to exceive voltge nd current in the reonnt circuit tht my cue mlfunction. An exmle of CC reonnt tnk imednce lot v frequency i reented in Fig..6. CC Tnk Imednce [Ω] Oerting rnge Full od Short Circuit No od Fig..6 Exmle of CC C reonnt tnk imednce-v frequency chrcteritic for vriou lod condition of 7

24 . Toologie for DC-DC eonnt Power Converter.. Hlf-bridge erie C converter Currently the mot commonly lied toology for reonnt converter i the C reonnt circuit. There re few reon for uch oulrity. The min dvntge re: nrrow frequency bnd to fully cover the lod vrition, reltively good deign rocedure mny commercil comnie uort the C toology [],[5],[6] nd the oibility of integrtion of the two inductor into one hyicl comonent [7][8][9], [], []. A it cn be een on Fig..7 the lod i connected in rllel to one of the inductnce. In mot liction glvnic ertion between inut nd outut i deired. If we ue trnformer, then it lekge nd mgnetizing inductnce cn be ued to form reonnt inductnce. Thi roch i ued very commonly, becue it reduced the comonent count, thu reducing the cot of the converter. Comred to C erie circuit, the C toology doen t incree the cot uming tht the glvnic ertion i necery, but imrove the converter erformnce. Q D Vin C Q D Fig..7 Cl D voltge witching hlf-bridge erie C reonnt circuit The C reonnt circuit h otentil didvntge. If the lod of the reonnt circuit i horted, the reonnt frequency of the reonnt circuit will ignificntly hift towrd higher frequencie cn be een on Fig..8.. Suoe the converter i oerting t khz. If hort-circuit occur, the reonnt frequency will hift to c.. 5kHz. It men tht unle the oerting frequency i increed the converter cn enter ccitive region oertion. Additionlly, the qulity fctor i ignificntly increed end even if the converter oerte in inductive region, the exceive mlitude of voltge nd current cn led to criticl filure of the converter if dditionl rotection circuitry i not introduced. of 7

25 . Toologie for DC-DC eonnt Power Converter C Tnk Imednce [Ω] Oerting rnge Full od No od Short Circuit Fig..8 Exmle of C reonnt tnk imednce-v frequency chrcteritic for vriou lod condition..5 Hlf-bridge erie-rllel CC converter The C converter h one didvntge not mentioned before. If the trnformer winding hve lrge number of turn, the formed ritic ccitnce re dded in rllel to the winding inductnce. If the trnformer deign i not mde crefully, the ritic ccitnce will introduce dditionl reonnt frequencie, which cn led to criticl filure t certin oerting condition. Thi roblem cn be removed by the ddition of ccitor in rllel to the trnformer winding, forming the CC reonnt circuit reented in Fig..9. The toology i well known, however it i difficult in deign. Thi i the min reon for it rre liction. Q C Q C C Q Q V IN A rim C B Q C Q C Q Q Fig..9 Cl DE voltge witching full-bridge erie rllel CC reonnt converter The emloyed CC toology h everl dvntge []. If roer comonent vlue re elected, the converter will be elf-rotected from the lod hort-circuit. Thi i becue the reonnt frequency of the reonnt circuit hift towrd lower frequencie when hort-circuit occur. Fig.. reent exmle imednce v frequency chrcteritic of CC reonnt circuit t different lod vlue. Suoe the converter oerte t 6kHz. If hort circuit uddenly occur, we cn 5 of 7

26 . Toologie for DC-DC eonnt Power Converter oberve tht the reonnt frequency will hift to round 85kHz. The converter remin within the inductive region of oertion nd cn oerte fely. CC Tnk Imednce [Ω] Oerting rnge Full od Short Circuit No od Fig.. CC reonnt tnk imednce-frequency chrcteritic for vriou lod condition Moreover, the loded qulity fctor i reduced, thu the converter will nturlly limit the outut current nd the current in reonnt circuit. An dditionl dvntge of thi toology i nrrow bnd for the FM to cover the whole rnge of the lod vrition from oen to hort circuit. It i worth noting tht there re two mode of oertion for thi toology. If the lod reitnce i higher thn the mximum outut ower reitnce the reitnce vlue t which the converter deliver the mximum ower, the converter will regulte the deired outut rmeter. When the outut current reche the mximum vlue induced by the reonnt circuit deign it will not rie ny further will ty t contnt vlue for lod reitnce below the mximum outut ower reitnce.. Common Filure Cue in eonnt Converter Uully the mot vulnerble comonent in reonnt converter re the emiconductor device inverter nd rectifier witche nd tend to fil in the firt lce. There re two mot common mechnim leding to filure: cretion of unwnted genertor circuit nd econd brekdown. Should ny of thee henomen occur, the witche re rone to dmge in very hort time. The genertor i creted by ingle witch in the reonnt inverter, however the econd witch of the hlf-bridge lo ly role in thi henomenon. The genertor i excited by lrge current ike flowing into the drin of the MOSFET. Prt of thi current ike will flow into the gte through the ritic ccitnce C GD of the witch. If the genertion condition re met or nerly met the trnitor will trt to ocillte t reltively high frequency with high voltge lied to it. Thi tte will inevitbly detroy the witch due to exceeding the fe temerture of the device junction. 6 of 7

27 . Toologie for DC-DC eonnt Power Converter If the genertor filure i not reent, the high current ike cn till trigger the econd brekdown mechnim. The energy from thi ike cn either ccumulte in ingle cell of the ower device nd led to locl therml filure, which i followed by overll filure of the inverter, or cn turn on the ritic BJT reent in the MOSFET witche yielding the me reult. A more in deth nlyi of thi henomenon cn be found in [], [], [],[5],[6]. Fig.. to Fig.. how n exmle of witch ocilltion tht will led to comonent filure. Notice the degrded gte drive voltge nd exceive ocilltion of the V DS voltge in Fig... Fig.. Exmle of uncontrolled witch ocilltion; To wveform: gte voltge, Bottom wveform: V DS voltge Notice tht the ocilltion nd hoot-through current cn even chrge the gte nd cue turn on of the ooing witch wveform A nd B in Fig... Fig.. Exmle of uncontrolled witch ocilltion; A,B gte voltge, C reonnt current, D V DS voltge Both, the uncontrolled ocilltion nd econd brekdown cn occur in one of the following condition. The inverter i oerting in ccitive mode or the converter i oerting in the inductive region, but the energy in the reonnt circuit i too mll to chrge/dichrge the hlf-bridge outut ccitnce. Thu, when witch turn on there re two detrimentl condition: there i till 7 of 7

28 . Toologie for DC-DC eonnt Power Converter ignificnt voltge cro the witch nd/or there i current flow in the ntirllel diode of the ooite trnitor. Thee two condition will reult in very lrge current ike in the witch tht turn on, ince it h to dichrge the ccitnce in rllel to the witch nd dditionlly h to turn off the diode of the ooite witch. The current ike i bigger the lower i the diode in the trnitor or the lrger i the totl ccitnce connected in rllel to the witch i.e. trnitor outut ccitnce or externl ccitor reent in cl DE witching. Fig.. Exmle of uncontrolled witch ocilltion; A gte voltge, B V DS voltge, C outut current, D witch drin current Other, more obviou, filure cue i exceeding the voltge nd current rting of the reonnt circuit cuit comonent i.e. witche, ccitor, inductor, trnformer. Thi filure cn occur when the converter i oerting in region where the reonnt tnk h high qulity fctor e.g. reonnt frequency oertion t light lod. ectifier toologie To crete DC-DC reonnt converter reonnt inverter loded with high frequency rectifier i necery. The toologie for the reonnt inverter hve been reented in ubchter.. Here, clic toologie for voltge-driven rectifier will be briefly dicued []... Hlf-wve rectifier Fig.. reent circuit for hlf-wve voltge driven rectifier. It conit of trnformer, diode D nd D nd econd order outut filter. n: V D D f C f V o 8 of 7 Fig.. Circuit of hlf-wve rectifier

29 . Toologie for DC-DC eonnt Power Converter The rectifier i driven by inuoidl voltge ource. Auming tht the f i lrge enough, it rile current i mll nd the inductor current i roximtely equl to the outut current I o. In uch condition the outut filter nd the lod reitnce cn be relced with current ink. Auming the trnformer i idel, the inut voltge ource V cn be reflected from the rimry to the econdry ide of the trnformer to become V /n. When V > the diode D i on nd the diode D i off. When V < the diode D i off nd the diode D i on. If the rectifier i driven by n idel voltge ource with the mlitude V m, which i much higher thn diode forwrd voltge dro, then the inut voltge i inuoidl cn be written : where V m i the mlitude of V. The voltge t the inut of the filter i V m inωt/n for <ωt<π nd for π<ωt<π. The verge voltge cro the filter inductor i zero, mking the voltge t the inut of the filter equl to the outut voltge. Thu, the outut voltge cn be written : Thi men, tht the dc outut voltge i directly roortionl to the inut voltge V m. Therefore, V o cn be regulted by controlling V m... Trnformer center-ted rectifier Fig..5 how circuit of trnformer center ted voltge driven rectifier. Here, we ue two identicl econdry winding in the trnformer with rectifier diode in erie to ech winding. Hving two econdry winding give u the bility to deliver energy to the outut during the whole witching eriod. A didvntge of thi olution i tht if the inductnce of the two econdry winding cn lightly differ between ech other, which cn led to unymmetricl lod to the voltge ource V. Thi will led to non-equl current ditribution between the winding nd will degrde the rectifier erformnce. Notice tht in thi circuit the freewheeling diode tht ered in hlf wve rectifier i not necery t ll. n: D f C f V o V D Fig..5 Circuit of center-ted ted rectifier ike in hlf wve rectifier the verge voltge cro the filter inductor i zero. Thu, the dc voltge t the inut of the filter i equl to the outut voltge V o, nd i equl to: Thi men, tht the dc outut voltge i directly roortionl to the inut voltge V m. Therefore, V o cn be regulted by controlling V m. 9 of 7

30 . Toologie for DC-DC eonnt Power Converter.. Bridge rectifier Fig..6 reent the circuit for the bridge voltge driven rectifier. Here we ue ingle trnformer econdry winding connected to diode bridge. Uing the rectifier bridge give u two benefit. The energy cn be delivered to the outut during both hlve of the witching eriod. Additionlly, only one econdry winding i reent, which imlifie the trnformer deign nd eliminte the non-ymmetricl current ditribution roblem reent ent in center-ted rectifier. However, there re two diode in erie in the conduction th, which will double the emiconductor conduction loe, reulting in lower efficiency. n: D D f C f V o V D D Fig..6 Circuit for full bridge rectifier ike in trnformer center-tedted rectifier the verge voltge cro the filter inductor i zero. Thu, the dc voltge t the inut of the filter i equl to the outut voltge V o nd cn be written : Thi men, tht the dc outut voltge i directly roortionl to the inut voltge V m. Therefore, V o cn be regulted by controlling V m.. Summry In the chter mot common toologie for reonnt inverter nd three clic toologie for voltge driven rectifier hve been introduced. The following reonnt inverter toologie hve been dicued: erie loded reonnt inverter, rllel loded reonnt inverter, erie reonnt CC nd C inverter nd erie-rllel CC reonnt inverter. The erie loded reonnt inverter cnnot oerte fely t hort circuit t the reonnt frequency nd h oor erformnce t light lod, due to high witching frequency needed for mintining regultion. ikewie, the rllel reonnt inverter cnnot oerte fely t light lod t the corner frequency nd h oor erformnce t hort circuit. Thi how tht both of thee toologie hve roblem when the regultion mut be enured for wide lod rnge. Thi roblem cn be olved by uing more comlex higher order reonnt inverter toologie. Both CC nd C toologie imrove inverter erformnce over the nd order circuit. However, the CC toology incree the cot becue of the dditionl reonnt ccitor reent in the reonnt circuit, where e the C toology cn reerve the cot by emloying integrtion of the reonnt inductnce into the trnformer lekge inductnce. Thi i one of the reon why C reonnt inverter i more commonly lied toology. However, the C reonnt inverter i rone to lod hort-circuit filure nd trnformer winding ritic ccitnce cn led to unexected behvior of the inverter. To reolve thee iue, the CC of 7

31 . Toologie for DC-DC eonnt Power Converter reonnt inverter toology h been introduced. The CC reonnt inverter toology i not enitive to trnformer winding ritic ccitnce due to externl ccitor lredy connected rllel to trnformer. Additionlly, the CC reonnt tnk cn be deigned in uch wy, tht it will hve intrinic lod hort-circuit rotection. Next the mot common filure of the reonnt converter hve been dicued. Not only the oertion in ccitive region cn detroy the inverter, but lo oertion with inufficient energy necery to chrge the trnitor outut ccitnce cn led to filure of the inverter. The chter end with brief introduction to three clic voltge driven rectifier circuit. All of thee circuit ue econd order F -C F outut filter. The hlf wve rectifier i the imlet one thu, i the cheet, but lo h the lowet efficiency. The trnformer center-ted ted h the highet efficiency, but h two trnformer econdry winding, which cn be difficult to deign for mot erformnce. The bridge rectifier i comromie between the hlf wve nd trnformer center ted rectifier. It efficiency i between the two other rectifier nd it ue only one trnformer econdry winding. However it ue twice much emiconductor device, but the voltge tre i reduced by hlf. All of thee rectifier cn be converted to ynchronou rectifier, by relcing the diode with low DSon reitnce MOSFET, which cn further imrove the rectifier efficiency. of 7

32 . Control Method for SMPS Control Method for SMPS A the demnd for Switching Mode Power Sulie SMPS erformnce nd functionlity incree, there i need for more robut nd flexible method for feedbck loo control. Modern ower ulie often lredy hve n on-bord microcontroller dedicted to monitoring the oerting rmeter e.g. outut current, oerting temerture nd for communiction with externl device. Concurrently, lying digitl control method for SMPS h been toic of intene reerch[7], [8],[9], [], [],[],[], [],[5]. By imlementing the feedbck loo in digitl circuit i.e. microcontroller or FPGA IC we receive much more freedom in the deign of the control loo. Another dvntge of digitl control i the reduction of ce tht i needed on PCB in comrion to trditionl nlog control method nd the bility to eily modify nd reue the olution. Digitl control cn be lredy found in mny clic hrd-witching PWM ower uly liction [6]. Thi chter will reent the tte-of-the-rt in ower uly control ol technique with reonnt converter in mind. The covered method include: Pule Width Modultion PWM, bridge leg Phe Shift Modultion PSM, Pule Denity Modultion PDM, Frequency Modultion FM, Aymmetricl Pule Width Modultion APWM nd eonnt Current Phe Modultion ulement for other method.. Pule Width Modultion One of the mot widely emloyed control cheme in ower converter i the ule width modultion PWM. A the nme tte, the regultion i chieved by vrition of the ule width tht drive the witching device, i.e. vrition of the witch duty cycle. Tyicl wveform for PWM re hown in Fig... T on T off ON OFF t V I V I -V O -V O t I mx I vg. I min D*T T t Fig.. Pule width modultion oertion wveform of 7

33 . Control Method for SMPS The PWM uully oerte t fixed frequency, however mny ytem combine frequency vrition well [7], [8]. The vrible frequency cn be ued for reding of the EMI ectrum, or for more dvnced witching technique e.g. boundry or criticl mode in PFC rectifier. PWM i widely ued in hrd-witching converter due to the imlicity of controller deign nd imlicity of clcultion. Unfortuntely, direct PWM i not well uited for reonnt converter, becue oft-witching condition re not lwy enured. A reented lter, thi method cn be modified for reonnt converter.. Phe Shift Modultion Another commonly method ued i the Phe Shift Modultion. Thi cheme i ued in bridge toologie tht hve t let leg. For imlicity, let conider clic four witch bridge. The ide i to oerte the two bridge leg with he ngle hift φ. The mximum ower i chieved when φ8ᵒ, where minimum ower i chieved when φᵒ. o V IN V IN Q A QA V AB OAD V A V B Q B Q B V A V B V AB V IN t 9o 8o V A V IN V A V IN V B V IN V B V IN V IN V IN V AB -V IN t V AB -V IN t Fig.. Phe hift modultion oertion wveform The regultion i chieved by vrition of the he ngle. The method i widely ued in high ower hrd-witching liction, becue it require t let four ower witche for the rimry ide. With light modifiction, the he hift modultion cn be ued in oft-witching witching converter including reonnt converter [9],[].. Burt Mode Pule Denity Modultion A imle nd common method of regultion i the Burt Mode method, ubcl of Pule Denity Modultion PDM[], [], []. By kiing witching cycle, we ut on hold the trnfer of the energy from the ource to the lod. Thu, by regulting the duty cycle of the witching time to of 7

34 . Control Method for SMPS non-witching time the outut regultion cn be chieved. The method cn be eily imlemented uing voltge comrtor with hyterei. If the outut voltge i bove the threhold the ule genertion for the witche i ceed. If the outut voltge dro below the threhold, ule genertion i reumed, llowing the converter to deliver energy to the outut. Thi method will roduce higher voltge rile t the outut of the converter, comred to method decribed erlier. The witching frequency of the generted ule i often ket contnt. Fig.. reent tyicl wveform for Burt Mode oertion S b t V mx V o V min t Fig.. Burt Mode oertion t rtil lod condition. Switch drive ignl, b converter outut voltge Thi method i often ued n ddition to the PWM or FM to imrove efficiency t light lod. The PDM method i not only limited to burt mode oertion. In [], [5], [6], [7] n intereting roch, tht ue the Delt-Sigm converter, i reented. A -bit Delt-Sigm modultor Fig.. i ued to drive the hlf-bridge reonnt inverter witche directly. The min dvntge of thi method over clic burt mode i the lck of ub-hrmonic in the outut voltge. ower outut voltge ub-hrmonic llow to decree the ize of the outut filter needed to chieve the deired rile voltge. Thi method cn lo otentilly reduce the udible ound generted by the converter. IN - Quntizer OUT Z - G Z - Fig..t order delt-igm modultor controller [] of 7

35 . Control Method for SMPS Deending on the outut vlue of the quntizer in the delt-igm modultor the hlf-bridge i driven follow. While the outut i the witche re driven normlly. When the outut i the witche re off. The Burt Mode i ometime imlemented in controller dedicted for reonnt converter. It i due to the fct tht in ome ce e.g. nd order erie loded reonnt converter the witching frequency would hve to be increed ignificntly to mintin regultion. The ddition of Burt Mode llow for outut regultion t light nd no lod condition. It hould be noted, tht in reonnt converter, the next witching cycle hould trt when the reonnt current mlitude fll cloe to zero. Otherwie, the witche my be dmged if turned on when the reonnt current i in wrong he. Thi will reent condition imilr to oertion in ccitive region, which cn crete condition for one of the filure decribed in chter.. Becue of thi the frequency of the Burt Mode i limited to reltively low vlue round everl hundred of Hz.. Frequency Modultion The mot common method lied in reonnt converter, tht llow for outut regultion, i the Frequency Modultion FM. By vrying the oerting frequency the mlitude of the reonnt current chnge ccording to the imednce of the reonnt tnk [8]. Thi regulte the mount of ower trnferred to the outut. Uully hlf-bridge or full-bridge i ued to roduce ymmetricl voltge qure wve, which i fed into reonnt nt tnk. The frequency of thi voltge wveform will ffect the current nd voltge level in the reonnt circuit, well, the he difference between the fundmentl comonent of the voltge roduced by the witche nd reonnt tnk current. Chter h hown, tht the deired oerting region for reonnt inverter i the region bove the reonnt frequency of the reonnt tnk. Fig..5 how the voltge trnfer function for cl D erie-rllel CC reonnt inverter. It cn be een tht the voltge trnfer function i highly nonliner nd chnge with vrying inverter lod nd oerting frequency. At full lod the witching frequency roche the reonnt frequency nd the lod decree the frequency rie. However, the frequency cnnot rie indefinitely, becue the limited erformnce of witche nd witch driver imoe limit for the mximum witching frequency. Thi men tht for ome reonnt tnk deign, the converter cn loe regultion t light or no lod condition. Another roblemtic re i the oertion ner the reonnt frequency. Deending on the inductive nd ccitive comonent tolernce, the reonnt frequency of the tnk cn vry. To void entering the region below reonnce i. e. ccitive lod for the witche, limit for minimum witching frequency mut be et. The limit hould be et in uch wy, tht it leve enough of mrgin for the reonnt frequency vrition from iece to iece nd in different oerting temerture. Otherwie, if the converter cn into ccitive region oertion nd the witche re likely to brek down. 5 of 7

36 . Control Method for SMPS M V CC Voltge Trnfer Function Zoom ight od Hlf od Full od Short Circuit Oerting rnge Fig..5 Voltge trnfer function of the reonnt CC inverter in function of the witching frequency for different lod The imednce of the erie-rllel reonnt tnk v frequency i reented in Fig..6. To mintin roer witching condition the converter hould oerte bove the reonnt frequency mrked with curve in Fig..6.. Another roblem ocited with reonnt converter i the vrition of the trnfer function with the oerting oint. Thi mke hrder to deign the feedbck loo becue t vriou oerting oint the reonnt tnk gin chnge, which cn mke the converter untble. CC eonnt Tnk Imednce Short Circuit Oerting rnge Full od Hlf od ight od Zoom Fig..6 CC reonnt tnk current mgnitude in function of the witching frequency for different lod 6 of 7

37 . Control Method for SMPS A hown bove the FM method h mny drwbck, thu there i need for better olution. However, one undenible dvntge of thi method i it imle imlementtion nd low cot which i why it i the mot widely red control method for reonnt converter..5 Aymmetricl Pule Width Modultion control Another control method for the reonnt converter i the Aymmetricl Pule Width Modultion APWM reented in[9]. Since the efficiency of the reonnt inverter dro the witching frequency i increed, the uthor rooe n ymmetricl PWM control trtegy. Fig..7 reent the wveform for APWM oertion. The outut ower i regulted by regulting the rtio of the ontime of the high nd low ide witche. Fig..7 Oerting wveform for ymmetricl PWM cheme [9] When the high witch i being turned on for time DT eriod, the low ide witch will be turned on for time -DT eriod. Thi will reult in chnge of the ower delivered to the outut, thu regultion cn be chieved by chnging the rmeter D. Fig..8 how the he of how the outut voltge chnge in regrd to duty cycle D. 7 of 7

38 . Control Method for SMPS Fig..8 Outut voltge control for the APWM cheme [9] It cn be een tht the mximum voltge er when D.5 i.e the driving ignl re ymmetricl. If the oerting frequency i ket contnt, the llowed devition from D.5 i mll, due to rik of loing ZVS condition. In order to kee the ZVS for the whole lod rnge, the oerting frequency cn be vried. In [5] the uthor how rool of uch imlementtion. By dding he locked loo P, the oerting frequency cn be controlled with high reciion by mintining contnt he hift between reonnt current nd hlf-bridge current. Fig..9 Sytem configurtion for APWM with frequency trcking [7] Thi llow to kee ZVS condition over wider lod rnge thn contnt frequency method. Alo the witching frequency i being chnged on nrrower rnge thn in FM method..6 eonnt Current Phe Control A mentioned in reviou ubchter, the he of the reonnt current relted to hlf-bridge voltge cn be regulted to enure ZVS. It i oible to modulte only the reonnt current he to chieve outut regultion, however the reult will be very imilr to FM. Thi i why the reonnt 8 of 7

39 . Control Method for SMPS current he modultion i rther ued ulementing technique for enuring the ZVS. In uch liction control loo i generlly ued for reonnt current he regultion in order to kee it t contnt vlue. By doing thi, the zero-voltge witching cn be enured in mot ce. However, ince the he vlue i being regulted to hve contnt vlue, there i need of n dditionl method for ower regultion. In [] the uthor how conjunction of reonnt current he tbiliztion with full-bridge he hift to chieve voltge regultion, clled Self-Sutined Ocilltion. Fig.. Simlified chemtic of Self-Sutined Ocilltion Controller [] A cn be een in Fig.. the controller conit of two control loo, one for reonnt current he tbiliztion nd one for outut voltge tbiliztion. The he tbiliztion loo meure the time between the zero-croing of the reonnt current nd the intnt when one of the witche in ingle bridge leg i turned off. By uing thi informtion the oerting frequency i modified in order to counter ny chnge of the meured he. Thu, the roer condition for Zero-Voltge Switching cn be mintined throughout the whole lod rnge. Since the oerting frequency i ued to regulte the he, nother rmeter mut be modulted in order to mintin outut ower regultion. The uthor rooed to ue the he hift modultion decribed in.. Fig.. reent the oerting wveform for the Self-Sutined Sutined Ocilltion Control SSOC control. The i S i the reonnt current, V c nd V c re threhold for reonnt current he loo nd bridge he hift loo reectively, V o nd V bo re the outut voltge of ech hlf-bridge nd V b i the voltge cro the reonnt circuit. 9 of 7

40 . Control Method for SMPS Fig.. Bic wveform of the Self-Sutined Sutined Ocilltion Controller [] The dvntge of thi kind of control re: enuring the ZVS in whole oertion rnge, reduced conduction loe in witche, reduced current ek vlue in witche nd reduced witching frequency bndwidth. Thi feture will imrove the converter efficiency nd relibility..7 Summry In thi chter everl control method hve been dicued. The two mot commonly ued PWM nd he hift modultion cnnot be directly lied to reonnt converter becue of the rik of loing the ZVS condition. Thu the imlet nd mot brodly lied method i the FM. The controller for the FM i imle nd che to build nd doen t need ny dditionl meurement circuit rt from the regulted outut vlue. However, the FM i not idel nd h it drwbck e.g. oor efficiency t light lod. In order to imrove the reonnt converter erformnce more dvnced control method re being reerched. APWM nd SSOC re the two exmle of uch method. Thee method enure ZVS in the whole oerting region nd llow for better converter erformnce. Thi come t cot of dditionl l meurement circuitry, however in liction where erformnce i to riority it in t big didvntge. of 7

41 . Novel Control Method of eonnt Power Converter Sequentil Cycle Steling Novel Control Method of eonnt Power Converter Sequentil Cycle Steling ecently there h been lot of reerch in PDM control cheme,, leding to quite intereting reult [9], [5], [5], [5], [5]. However, mot of the reerch focued motly on econd-order C reonnt circuit nd in ome ce third-order C reonnt circuit. Since, the PDM control cheme h given uch good reult, rool h been mde to try to ly uch method for the fourthorder CC reonnt circuit. The rooed method i bed on control method reented in [7] nd [8] owned by AGH Univerity of Science nd Technology. The reerch h been conducted rt of grnt 65 Innowcyjny zilcz rezonnowy dużej mocy do ojzdów hybrydowych i elektrycznych directed by Slwomir igenz from Fideltronik Polnd S. z o.o. Thi chter will focu on reenting the min ide of the method which i nmed Sequentil Cycle Steling.. Oertion of the SCS Control Scheme The min ide i to regulte the deired outut rmeter e.g. voltge, current, ower, etc. by teling or cncelling witching cycle of the reonnt converter. The more witching cycle re tolen the le ower i delivered to the reonnt circuit nd to the outut of the converter. The min difference between thi method nd the other i tht during eriod when the converter to witching, the lt turned on witche re ket turned on. By doing o, the reonnt current i llowed to through low reitnce chnnel of the trnitor inted through the body diode. Thi reduce the overll ower loe nd llow the reonnt circuit to reonte freely for longer eriod of time. During free ocilltion the mlitude nd frequency of the reonnt current i mller thn it would be with FM. Thi led to lower coer loe due to reduced high frequency effect i.e. kin effect nd roximity effect nd to lower core loe due to lower mlitude of mgnetic flux denity B k nd lower frequency. Uully the core loe re roximted with the Steinmetz eqution: P lo V K f e α B β k where V e i the effective core volume, f i the oerting frequency, B k i the mgnetic flux denity. And K, α nd β re mteril coefficient. Uully the α term i round.5 nd β term i round.5. Thu, even mll reduction in f or B k cn ve lot of ower. In ddition to thee ving, the overll witching loe both rimry nd econdry ide nd trnitor driver loe re reduced becue the verge witching frequency i reduced. The control cheme hould gurntee the roer witching condition for the trnitor to void roblem decribed in chter.. Fig.. reent n exmle of SCS oertion. The drive ignl V gte i lied to trnitor Q nd Q nd V gte to trnitor Q nd Q. The wveform i r rereent the reonnt current, while V out rereent the rectified outut voltge rectifier i not hown in the chemtic. It hould be ointed out, tht during the time when the converter i witching, the frequency of the reonnt circuit i different when the witching to. Thi i due to the fct tht during witching the reonnt circuit ocillte with the forced frequency while during idle time the reonnt circuit ocillte with it own reonnt frequency. Additionlly, the elf reonnt frequency vrie with lod, temerture, etc. In order to enure the roer witching of 7

42 . Novel Control Method of eonnt Power Converter Sequentil Cycle Steling condition, eecilly when the witching retrt, it i necery to meure the reonnt current i r. Thi give u the informtion bout the direction i.e. ign of the current well the intntneou vlue. Thnk to thi, roer time intnt cn be choen for the witch to turn on, i.e. the current in the witch i negtive nd it vlue i high enough to wing the voltge in the hlf-bridge cl DE witching. Otherwie, the witche my brek down due to exceive current when the ZVS condition re lot. The SCS oertion i follow. Suoe tht the converter i witching. Thi men tht the outut voltge V out i tedily riing until it reche the uer threhold V out_high. Uon croing thi threhold the converter to witching, but kee the witche tht were turned on in on tte. The reonnt circuit cuit trt to ocillte with elf reonnt frequency nd the reonnt current mlitude well the outut voltge tedily decree. When the outut voltge fll to low threhold V out_low, the converter ynchronize with the reonnt current nd retrt witching. V gte, V gte Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q i r V A V B V AB V out V out_high V out_low b Q C Q C C Q Q V IN A r rim C i r B Q C Q C Q Q Fig.. Bic oertion of the SCS in cl DE full-bridge CC reonnt converter; oerting wveform, b Cl DE full-bridge CC DC-DC reonnt converter of 7

43 . Novel Control Method of eonnt Power Converter Sequentil Cycle Steling There i rik tht during the non-witching eriod the reonnt current mlitude will fll to level where it i not oible to either ynchronize or to fully wing the hlf-bridge voltge when the witching retrt. To revent uch cenrio, mechnim h been imlemented to kee the reonnt current bove reet level. The reonnt current MS vlue i oberved nd if it fll below et threhold the converter will trt witching until the MS vlue of the reonnt current rie bove the threhold. The witching intnce re ynchronized with the reonnt current to revent imroer witching condition. It i worth to note tht it i not otiml to kee the me ir of witche turned on during the elf ocilltion eriod. Conider itution of light lod. The converter will be witching for time T ON nd will to witching for T OFF. If the me witch ir w contntly choen for the T OFF eriod it would conduct the reonnt current for ignificntly longer time thn the ooite ir. Thi would reult in higher witch temerture which h reult in higher conduction loe in ce of MOSFET nd reduced relibility. To blnce the conduction time, we cn elect the ooite witch ir ech time the converter enter the T OFF eriod. Such mechnim will blnce the conduction time of the witche nd reduce the witch junction oerting temerture.. Ste reone of erie-rllel CC reonnt circuit In order to hve better inight in the behvior of the reonnt converter, te reone for the erie C circuit nd erie-rllel llel CC circuit will be derived. Conider erie C reonnt circuit reented in Fig... V C i Fig.. Serie reonnt C circuit The inut voltge cn be written : V i i i C V i C Thu, the reonnt current i equl to: of 7

44 . Novel Control Method of eonnt Power Converter of 7 C V i C C C V i Inerting the trnmittnce of the te function for V condition we get: C C C i C C C i C i C i C i Auming tht: C > C i Knowing tht in r t A Ae ω t α. Novel Control Method of eonnt Power Converter Sequentil Cycle Steling Inerting the trnmittnce of the te function for V, V IN, nd uming zero initil C C C r r ω α ω nd uming zero initil

45 . Novel Control Method of eonnt Power Converter Sequentil Cycle Steling We cn clculte the coefficient A, α, ω: α ω r C A ω r It cn be een tht long > hold, the te reone of C circuit h form of fding C ocilltion. The reulting reonnt current he cn be oberved in Fig.., which i the reult of SPICE imultion. Fig.. Serie loded C reonnt tnk te reone for vriou vlue A imilr nlyi will be erformed for the CC circuit which i reented in Fig... C U IN I C Fig.. Serie-rllel CC reonnt circuit 5 of 7

46 . Novel Control Method of eonnt Power Converter 6 of 7 After clcultion we cn derive the following eqution: 5 5 IN IN C C C C C C U C C C C C U I In order to clrify the eqution we hll ubtitute the olynomil coefficient : 5 b b C C C C b C M C C b C C b C C M C C b C C C C C C M C C Thu, the eqution trnform into: 5 5 b b b U I IN To clculte the te reone we ubtitute: 5 5 b b b U I Auming tht the couling coefficient M. Novel Control Method of eonnt Power Converter Sequentil Cycle Steling After clcultion we cn derive the following eqution: C C C M C C M C C C C C M C C C C C C C M C C C M C C M C C C C C C M C C C C C C C C M In order to clrify the eqution we hll ubtitute the olynomil coefficient : C C C C M C C C Thu, the eqution trnform into: b b b b To clculte the te reone we ubtitute: U U IN 5 5 b b b b U b b b Auming tht the couling coefficient M i equl to we get: In order to clrify the eqution we hll ubtitute the olynomil coefficient : b b

47 . Novel Control Method of e 5 b b C C C b C b C C b b C C C C Thu, the eqution reduce to: b b b U I A we cn ee in eqution bove th order olynomil root i quite comlex, it cn be een tht it will be influence of the comonent vlue on the te reone. We hll derive generl olution inted, uming tht the denomintor olynomil root re known. et th order olynomil. U U b b b U I The,, nd cn be derived uing the reidue theorem. i i i I I I. Novel Control Method of eonnt Power Converter Sequentil Cycle Steling b b b b U b bove, the denomintor olynomil order i. Since, the olution for the order olynomil root i quite comlex, it cn be een tht it will be hrd to determine the influence of the comonent vlue on the te reone. We hll derive generl olution inted, uming tht the denomintor olynomil root re known. et,, nd d c c U M U b cn be derived uing the reidue theorem. i i i i i M M M 7 of 7, the denomintor olynomil order i. Since, the olution for the hrd to determine the influence of the comonent vlue on the te reone. We hll derive generl olution inted, nd be the root of the d i n

48 . Novel Control Method of eonnt Power Converter 8 of 7 I I Subtituting for,, nd U I The te reone in time domin i equl to: t t t e e e t i If, nd, re conjugted reectively, they will form two ir of conjugted ole. nd Im e nd j Im e nd j The te reone eqution cn be then written : ˆ Im e Im e j U j U d c c U I. Novel Control Method of eonnt Power Converter Sequentil Cycle Steling M M we get: U The te reone in time domin i equl to: t t t t t e e e e e re conjugted reectively, they will form two ir of conjugted ole. Im e j Im e j tion cn be then written : ˆ ˆ ˆ e Im e Im e Im e Im e Im e j j j j j d re conjugted reectively, they will form two ir of conjugted ole. Im Im j

49 . Novel Control Method of e where: [ e Im e Im Im e e Im e ˆ j j j j j I [ Im e Im e e Im e ˆ j j j j j I e Im e Im Im e Im e Im e ˆ j j j j j I Im e Im e Im e Im e ˆ j j j j j I ˆ Im e Im e j e U j U I jψ Uing the invere lce trnform: φ ω σ t t Ae t co. Novel Control Method of eonnt Power Converter Sequentil Cycle Steling ] Im e Im e Im e Im e Im e Im e Im e Im Im e Im e j j j j j j j j j ] Im e Im e Im e Im e Im e Im e Im e Im Im e Im e j j j j j j j j j Im e Im e Im e Im e Im e Im e Im e Im Im e Im e j j j j j j j j j Im e Im e Im e Im e Im e Im e Im e Im Im e Im e j j j j j j j j j ˆ ˆ Im e Im e Im e Im e j e j e j j j j ψ ψ Uing the invere lce trnform: ω σ ω σ φ φ j Ae j Ae j j 9 of 7 Im e Im j e j j ψ Im e Im j e j j ψ Im e Im j e j j ψ Im e Im j e j ψ ˆ Im e Im e j e j jψ

50 {. Novel Control Method of eonnt Power Converter Sequentil Cycle Steling jψ e jψ jψ jψ e e e I U e jim e jim e jim e jim We get um of two fding ocilltion: e t et i t U e co Imt ψ e co Imt ψ The reulting reonnt current he cn be oberved in Fig..5, which i the reult of SPICE imultion. } Fig..5 Serie-rllel CC reonnt tnk te reone for vriou lod vlue It i worth noting tht the reulting eqution for te reone of imle C circuit i quite comlex nd only becue the coefficient re groued it i oible to undertnd the imct of ech of the comonent vlue to the reonnt circuit reone. In ce of the CC reonnt tnk, even if the formul for the te reone w fully derived, the reulting eqution would be o comlex tht it would be of no rcticl ue. Thi ugget t tht redictive control ytem will be hrd to develo nd rective control i more referred.. Summry In the chter new concet of SCS control method h been introduced. The method imrove light lod efficiency by reducing the mount of witching cycle witching loe reduction nd the verge frequency nd mlitude of the reonnt current coer nd core lo reduction. The imlified oertion i dicued nd everl roblem hve been highlighted reonnt current utin nd ynchroniztion with reonnt current. The mot difficult tk i roer ynchroniztion with the reonnt current ince the te reone i um of two fding ocilltion. Thi fct i confirmed by imlified nlyi nd imultion reult. 5 of 7

51 5. Tet Pltform 5 Tet Pltform In order to vlidte the rooed control method tet ltform h been rered. The block chemtic of the tet ltform i reented in Fig. 5.. ine Voltge Inut Filter PFC ectifier CC eonnt Converter Outut Voltge Drive Signl Meurement Signl Auxiliry Power Suly Univerl Control Bord PFC Module Fig. 5. Block chemtic of the tet ltform It conit of kw ower uly nd erte univerl control bord. A hotogrh of the tet t ltform etu i reented in Fig. 5.. Fig. 5. Tet ltform etu The ower uly conit of PFC rectifier including n EMI inut filter nd DC-DC full-bridge cl DE CC reonnt converter. Thi chter will briefly dicu the rmeter of the tet ltform. 5. Active Power Fctor Correction Module In order to the current EN6-- EMC regultion nd rovide wide inut voltge rnge it i necery to include Power Fctor Correction rectifier. Aiming for high efficiency, two-he interleved toology h been choen. The bic rmeter re reented in TABE of 7

52 5. Tet Pltform TABE 5. Bic rmeter of the PFC rectifier Inut Voltge 85VAC-6VAC PFC ectifier Outut Voltge 9VDC PFC ectifier Outut Power W Switching Frequency 8kHz-kHz Pek Efficiency 97% including the inut filter The PFC rectifier i built uing the Tex Intrument UCC87 two-he interleved PFC controller. A imlified chemtic of two he interleving boot converter i reented in Fig. 5.. I IN I D I OUT V IN S I CO C O V OUT I D S Fig. 5. Simlified chemtic of two-he interleving PFC boot converter. The interleved boot converter i creted from two clic boot converter connected in rllel nd oerting with 8ᵒ he hift. A it i hown in Fig. 5., the inut current i um of two inductor current I nd I. Since the two boot oerte with 8ᵒ he hift, the mximum of the I i t the me time the minimum of I nd vice ver. If the current re ummed u, the inut current rile will be reduced in comrion to the ingle boot contruction. The bet cncelltion occur t 5% duty cycle oertion. A imilr behvior occur with the outut rile current. Becue of the 8ᵒ he hift oertion the outut ccitor rile current i reduced from the um of the outut current I D, I D. An exmle of oerting wveform re deicted in Fig of 7

53 5. Tet Pltform S ON OFF S ON OFF I I IN / I I IN / I I I COUT I I - I OUT t Fig. 5. Tyicl wveform for two-he interleved boot converter The bove mentioned feture llow to reduce the ize of the inut filter nd outut ccitor. Thi will imrove the overll efficiency of the PFC rectifier. The reult of the PFC rectifier efficiency meurement re reented in Fig The meurement hve been erformed uing the Yokogw WT reciion ower nlyzer Efficiency [%] Outut Power[W] Fig. 5.5 PFC rectifier efficiency v outut ower including the inut filter 5 of 7

54 5. Tet Pltform The PFC rectifier chieve 96.85% ek efficiency, including the inut filter nd uxiliry ower uly. 5. CC eonnt DC-DC Converter The choen toology for the DC-DC converter i the cl DE full-bridge CC reonnt converter. The bic informtion i rovided in TABE 5. nd the imlified chemtic i reented in Fig TABE 5. Bic rmeter of the DC-DC reonnt converter Inut Voltge Outut Voltge Outut Current Outut Power Switching Frequency 7VDC-VDC 8VDC 6ADC W 5kHz - 9kHz V IN Q A C Q r Qlimit C rim C Q C ec B Q Q C Q C Q Q f C f Fig. 5.6 Simlified chemtic of Cl DE Full-bridge CC reonnt DC-DC converter. The diode D Q, D Q, D Q, D Q long with the winding Qlimit form rotection circuit tht reduced the qulity fctor of the reonnt tnk in unwnted re of oertion e.g. light lod oertion with low oerting frequency. The ide i, tht when to voltge cro Qlimit will be lrger thn the uly voltge, the diode bridge will trt to conduct nd the exce energy exiting in the reonnt tnk will be returned to the uly ccitor. Thi enure tht the voltge cro the reonnt tnk comonent will ty in the fe oerting re, thu rotecting the circuit. The outut tge i center-ted rectifier, which will hel in chieving higher efficiencie nd will lo reduce the number of required rectifier diode. TABE 5. eonnt converter comonent vlue Q, Q, Q, Q C Q, C Q, C Q, C Q C C r 5 of 7 SPW5N6CFD.nF 5nF 5nF 7uH

55 5. Tet Pltform rim 6uH nec / nq /6 DO, DO DSA9CHB Cout 5uF The reonnt tnk comonent re reented in Fig The reonnt inductor hve been contructed uing the Integrted Mgnetic Comonent technique. Thi kind of contruction hel in comonent ize reduction nd imrove efficiency. A detiled decrition of thi comonent cn be found in [], [5], [6]. The reonnt tnk inductnce nd ccitnce re reented in Fig Fig. 5.7 eonnt tnk inductor left eft nd ccitor right The imulted imednce chrcteritic of the built CC reonnt tnk re reented in Fig CC Tnk Imednce [Ω] Oerting rnge Full od Short Circuit No od Fig. 5.8 Imednce v frequency of CC reonnt tnk 55 of 7

56 5. Tet Pltform The reulting CC reonnt tnk imednce i deigned in uch wy tht it will reduce the reonnt current during lod hort circuit, thu limiting the outut current to contnt vlue. The reulting oerting frequency i khz to 9kHz. 5. Univerl Control Bord for eonnt Converter In order to verify different control method rool univerl control bord h been deigned nd contructed. The deign h been bed on reviou work [55], however the hrdwre h been modified nd oftwre h been rewritten comletely. The min rt of the univerl control bord i Cyclone III FPGA with three ADC bit MSPS chnnel nd two ADC bit 5kSPS chnnel. A imlified block chemtic of the univerl control bord i reented in Fig x S85 Gte outut x bit MSPS ADC AD9 PC Communiction S Cortex M STMFZET6 Cyclone III EPCE chnnel bit 5kSPS ADC AD7 Anlog comrtor MV79 bit MSPS DAC DAC85 Fig. 5.9 Univerl control bord block chemtic In ddition to thee reource there re lo 8 S85 chnnel for trnitor gte driving ignl, one bit DAC nd one ft comrtor. To mke uerviion nd externl communiction eier AM microcontroller h been lo included. 5. Meurement Circuit Severl rmeter of the reonnt converter re meured. Thee include: outut voltge, outut current, reonnt current, reonnt current derivtive nd reonnt current cyclic MS vlue. The meurement circuit for the mentioned rmeter will be reented in thi ubchter. 5.. Outut Prmeter Meurement Circuit The outut voltge i meured uing bit 5kS ADC. In order to reduce liing effect econd-order low filter i inerted t the inut of the nlog to digitl converter. The chemtic for the outut voltge meurement th i reented in Fig. 5.. The outut voltge, divided by D nd D, i fed into nd order Butterworth low filter. The low filter i contructed uing Sllen-Key toology. 56 of 7

57 5. Tet Pltform C F C out D F F D C F Fig. 5. Outut voltge meurement circuit The filter cutoff frequency h been et to round khz. The meurement th AC trnfer chrcteritic i reented in Fig. 5. Fig. 5. Outut voltge meurement th AC trnfer chrcteritic v frequency In order to void liing for bit reolution, -7dB ttenution i needed t Nyquit frequency. The reulting comonent vlue re reented in TABE 5.. TABE 5. Voltge meurement comonent vlue D D F F CF CF 7kΩ kω 8.kΩ 5kΩ.nF nf 57 of 7

58 5. Tet Pltform The outut current i meured uing SH mω hunt reitor. The voltge i mlified nd then fed into b 5kS ADC through identicl low filter in the outut voltge meurement th. The chemtic for the current meurement th i reented in Fig. 5.. C G C F SH I I C I C I G k F F C F Fig. 5. Outut current meurement circuit The filter vlue re the me in the voltge meurement trck. The meurement th AC trnfer chrcteritic i reented in Fig. 5.. Fig. 5. Outut current meurement th AC trnfer chrcteritic v frequency Since we hve informtion bout the outut voltge nd outut current it i oible to etimte the intntneou outut ower uing tright multiliction of thee two vlue. The reult bit length will be twice the length of the inut vlue. Becue of thi only the mot ignificnt bit of the reulting ower re tored. 5.. eonnt Current Meurement A mentioned in chter. it i necery to meure the intntneou vlue of the reonnt current. The reonnt current h qui-inuoidl inuoidl he nd h no DC comonent. Becue of 58 of 7

59 5. Tet Pltform thi, current trnformer i fitting meuring device. Additionlly ditionlly the current trnformer rovide the necery ioltion from high voltge exiting on the rimry ide. The chemtic for the meurement th i reented in Fig. 5.. wire A To reonnt current CT : CT C F F C F wire A 5Ω 5Ω A To ADC Inut A Fig. 5. eonnt current meurement circuit The reonnt current i mled with bit MS AD converter. The cutoff frequency h been et to MHz in order to reduce the effect of liing. Fig. 5.5 eonnt current trnfer function nd grou dely v frequency Art from the reonnt current vlue, the reonnt current derivtive i lo meured. In current liction it i chieved by uing cutom mde ogowki coil. The voltge cro the ogowki coil terminl i roortionl to the rte of chnge of the current flow through the inide of the coil. In other word, the voltge cro the coil i roortionl to the time derivtive of the meured current. A hotogrh of the contructed ogowki coil i hown in Fig. 5.6 nd the chemtic for the meurement th i hown in Fig of 7

60 5. Tet Pltform Fig. 5.6 Current trnformer left, ogowki coil right F wire A To reonnt current rogovky :8 ST C F C F wire A 5Ω 5Ω A To ADC Inut F A Fig. 5.7 eonnt current derivtive meurement circuit The reonnt current derivtive i mled uing bit MS AD converter. In future develoment, digitl roch to obtin the reonnt current derivtive hould be conidered. The trnfer function nd grou dely of the meurement th i hown in Fig The circuit give roer derivtive informtion for ignl u to round MHz, which hould be ufficient for the ued liction. Fig. 5.8 eonnt current derivtive trnfer function nd grou dely v frequency 6 of 7

61 5. Tet Pltform The voltge cro the ogowki coil terminl i given by: ANµ di v t l dt e where A i the re of one coil turn, N i the number of turn, μ i the mgnetic ermebility, l e i the toroidl coil effective length nd i i the meured current. The contructed coil h 8 turn nd for khz A inuoidl inut ignl hll roduce.6mv outut voltge. Another meured rmeter i the CMS vlue of the reonnt current. Thi rmeter i clculted directly from the mled reonnt current vlue. Thi informtion i ued for determining whether the reonnt current mlitude h fllen below ccetble vlue, o tht roer ction cn be erformed i.e. erform everl witching cycle in order to incree the reonnt current mlitude. The block chemtic for the FPGA circuit for CMS clcultion i reented in Fig x re [n] x re [n] Z -k x re [n-k] x re [n] Σx re [n] Z - Fig. 5.9 Cyclic MS clcultion chemtic From the definition of the CMS of mled function we hve: x MS [ n] x[ n] x[ n ] K x n k k [ n] x[ n] x[ n ] k xms K x n k Alo: k x MS [ ] [ ] [ n ] x[ n ] x[ n] K x[ n k ] [ n ] x[ n ] x[ ] [ ] [ ] [ ] k xms n K x n k x n k x n k [ n ] x[ n ] k xms k x x MS [ n ] x[ n k] 6 of 7

62 5. Tet Pltform Since the CMS vlue i only ued for level comrion nd the reference vlue i contnt it i eier to cle the vlue of the reference inted of erforming diviion by k nd then the qure root oertion which conume reltively lrge mount of reource. Thu, we cn comute the necery informtion uing only one multilier, two dder nd imle hift buffer. Art from the CMS vlue, the frequency of the reonnt current i ened. Currently thi informtion i ued only n indictor. The frequency vlue i obtined by the detection of the time between the reonnt current zero croing. By hving the informtion bout the length of the hlf- eriod, the frequency cn be eily comuted. There re four control ignl generted from the reonnt current meurement: - eonnt Current Poitive, - eonnt Current Negtive, - eonnt Current Derivtive Poitive, - eonnt Current Derivtive Negtive. Thee ignl re ued for the ynchroniztion with the reonnt current. The eonnt Current Poitive ignl i creted by comring the reonnt current vlue with reet threhold. Additionlly, cutomizble hyterei h been imlemented to reduce ringing during the trnition. The ret of the ignl re generted in the me wy, with reect, tht ech of them h it own threhold vlue. 5.5 Summry In the chter the tet ltform h been reented to verify the rooed method. The tet ltform conit of kw reonnt ower uly nd univerl control bord. The ower uly conit of EMI inut filter, PFC rectifier, uxiliry ower uly nd DC-DC reonnt ower converter. The bic rmeter of the min block re reented. Since the univerl control bord need ome informtion bout the tte of the DC-DC reonnt converter, everl rmeter re meured. The required rmeter re: outut voltge, outut current, reonnt current nd reonnt current derivtive. The meurement th for ech rmeter i reented nd briefly nlyzed. 6 of 7

63 6. Digitl Control Imlementtion 6 Digitl Control Imlementtion In order to verify the novel control method concet nd rovide benchmrk reference, two lgorithm hve been imlemented in the FPGA, i.e.: Digitl Frequency Modultion Control nd Digitl Sequentil Cycle Steling Control SCSC. In the chter the digitl imlementtion of thee two control lgorithm re reented nd dicued. 6. Digitl Frequency Modultion The nlog FM control i by fr mot common technique ued in tody reonnt converter [56], [57],[58],[59], [6]. Since thi method i o widely red it feel nturl to ue it benchmrk for comrion. To enure the me oerting condition for both FM Control nd SCSC, frequency modultion controller h been imlemented in the FPGA. The block chemtic for thi imlementtion i hown in Fig. 6.. Anlog Switch Driver eg A High eg A ow eg B High eg B ow DC-DC eonnt Converter V out Outut Voltge Meurement ADC IN High Gte Digitl Gte Signl Genertor ow Gte N be Oerting Period Clcultion PID outut[n] PID Error[n] Error Clcultion Vout[n] ADC ef[n] Fig. 6. Block chemtic of FPGA Digitl FM Controller The regulted rmeter i the rectified outut voltge of the converter. The whole feedbck loo i fully imlemented in digitl form. The ened outut voltge vlue i ubtrcted from reference vlue in order to get the current voltge error vlue. The error vlue i being inut into PID regultor nd then the new vlue of the oerting eriod rereented by the number of clock cycle i clculted from outut of the PID regultor. Thi new eriod vlue N be i then ued by the witch gte ignl genertor, which will then inert the deired ded time into the gte drive ignl. The chemtic of clic PID regultor in rllel form i reented in Fig of 7

64 6. Digitl Control Imlementtion K P b error[n] K outut[n] errort K I oututt error[n-] z - K z - outut[n-] K D z - K error[n-] Fig. 6. PID regultor chemtic: continuou time imlementtion, b converted dicrete time imlementtion From Fig. 6. we cn write the tndrd PID regultor eqution in rllel form: outut t K error t K Uing the lce trnform: I G KP P K K D I d error τ dτ K D error t dt If we wnt to go to the dicrete time domin we mut find the eqution for dicrete integrl nd dicrete derivtive. The difference eqution for the integrl i: u n u n f n T m Moving to z domin: U z U z z F z T m U z U z F z Tm F z T m z z Which yield the formul for integrl in z domin. Similrly with derivtive: u n f n f n T m U z F z F z z T m 6 of 7

65 6. Digitl Control Imlementtion U z F z z T m Yielding the formul for the derivtive in z domin. Uing nd we cn write the PID difference eqution in z domin: KIT U z K P z m K T D m z E z K U z P K T I m K T D m K z P K T D m z K T D m z E z We cn define the following coefficient K K K K P K K T D P m K T I m K T D m K T D m From nd we cn write: U z U z z KE z K E z z K E z z outut n outut n K error n K error n Kerror n The difference eqution bove will be ued to imlement the dicrete time PID regultor in the FPGA. The chemtic of thi imlementtion i hown in Fig. 6.b. The imlementtion revent the regultor from overflow by incororting the turtion rithmetic. Since the outut of the PID cnnot be ued directly to drive the witch gte ignl genertor it hould be cled firt into ueful vlue. Uully, reonnt converter oerte within defined rnge of frequencie i.e. minimum nd mximum oerting frequency. Alo, we cn oberve tht the reonnt converter deliver more energy t lower frequencie nd le energy if the oerting frequency rie. Thu, it eem nturl to cle the PID outut in uch wy, tht when it reche it miniml boundry i.e. the outut voltge i too low, the converter hould oerte t miniml frequency. Similrly, when the PID outut i t it mximum i.e. the outut voltge i too high the converter hould oerte t it mximum frequency. 65 of 7

66 6. Digitl Control Imlementtion The lt iece of the control loo i the witch gte ignl genertor. It i four tte mchine tht rereent the oible tte of the witching hlf- or full-bridge. The tte re: Active High Switch, Ded Time After High Switch, Active ow Switch nd Ded Time After ow Switch. Deending on the current tte, roer gte ignl re driven to the witche. The tte mchine grh i reented in Fig. 6.. SWITCH Active High DT After High DT Timer End DT Timer End DT After ow Active ow SWITCH Fig. 6. Switch gte ignl genertor tte mchine grh The tte mchine i driven by two timer. One i ued for generting hlf of the oerting eriod nd the other for ded time genertion. The oerting eriod timer cycliclly count u to vlue nd when finihed it et the SWITCH ignl to for ingle clock cycle. The tte mchine then trnition into one of the ded time tte nd concurrently the ded time counter trt. After reching reet ded time clock tick the ignl DT TIME END i et to for ingle clock cycle. The tte mchine then roceed into one of the ctive tte. The block chemtic of the comlete ignl genertor i reented in Fig. 6.. From PID regultor N ctive N dedtime Active Time Timer Ded Time Timer Switch DT Timer End Stte Mchine A B A B Fig. 6. Switch gte ignl genertor block chemtic The frequency reolution of uch ytem vrie with the oerting frequency. For certin generted oerting frequency we cn write: f o N T eriod clk 66 of 7

67 6. Digitl Control Imlementtion However the genertor h to generte the control ignl for both witche, which men tht in relity it i generting hlf eriod tick. Hence: f o N ctive T clk If we wnt to clculte the frequency reolution, we cn write: f o N ctive Tclk Nctive ctive T clk f o N N ctive ctive Nctive N ctive T clk N ctive T clk f o T clk In the contructed genertor the T clk MHz, nd the converter oerting frequency rnge i roughly from 5kHz to 9kHz. Thu, the frequency reolution of the ytem chnge from.5hz t low frequency to 8.5Hz t high frequency. In [] uthor how tht in reonnt converter with digitl FM there i rik of limit cycle henomenon occurrence. Thi henomenon mnifet itelf ocilltion t the outut of the converter nd indirectly in the reonnt current mlitude level ocilltion. Such ocilltion cn occur when the vrition of the outut due to the SB chnge of the control i lrger thn the reolution of the AD converter ued to meure the outut vlue. Since the ocilltion only incree the outut rile nd revent from tedy oertion, cre hould be tken when deigning the control loo. 6. Digitl SCS In chter. concet for SCS h been reented. Thi chter will focu on the digitl imlementtion detil. The controller conit of comrtor, SCS tte mchine nd witch gte ignl genertor. A imlified chemtic for the reonnt ower uly with digitl SCS controller i reented in Fig The comrtor or i ued to generte the control ignl STOP. The ignl i et to when the outut voltge exceed the reference level nd i et to otherwie. When STOP the converter i witching nd when STOP the converter cee to witch leving one of the witche turned on two witche in ce of full-bridge to llow free ocilltion of the reonnt circuit. There re four control ignl necery for roer controller oertion. Thee re: ecurpo reonnt current oitive, ecurneg reonnt current negtive, DerCurPo reonnt current derivtive oitive nd DerCurNeg reonnt current derivtive negtive. Thee control ignl re generted by comrtor with djutble level nd hyterei. The meurement th for thee ignl hve been decribed in chter of 7

68 6. Digitl Control Imlementtion Anlog Switch Driver eg A High eg A ow eg B High eg B ow DC-DC eonnt Converter I re di re /dt V out eonnt Current Meurement eonnt Current Derivtive Meurement Outut Voltge Meurement High Gte ow Gte I re [n] di re [n] Vout[n] Digitl Comrtor with hyterei Comrtor with hyterei ecurpo ecurneg DerCurPo DerCurPo Gte Signl Genertor SWITCH Sequentil Cycle Steling Stte Mchine Sto[n] Comrtor with hyterei ef[n] Fig. 6.5 Block chemtic of FPGA Digitl SCS Controller The grh for the SCS Stte Mchine h been reented in Fig There re 6 tte vilble: - un, - Sto, - Sync, - etrt, - Sutin, - Timeout. In un tte the controller r witche t reelected contnt frequency, thu delivering energy to the outut. When the outut voltge rie bove comrtor threhold the ignl STOP chnge to nd the controller enter Sto tte. In thi tte the controller cee to witch nd one of the witche two in ce of full-bridge i continuouly turned on to llow for free ocilltion in order to conerve energy. There re two oible condition to leve thi tte. One i when the outut voltge fll below the comrtor threhold nd the econd i when the meure cyclic MS vlue of the reonnt current fll below redefined level. In both ce the controller enter the Sync tte. In thi tte the controller wit for roer witch condition. Conider hlf-bridge toology nd trnition from low witch conduction to high witch conduction. The criteri choen for roer oft witching in thi ce re follow. The reonnt current bolute vlue i bove reet threhold nd the reonnt current derivtive i negtive for low-high trnition or i oitive for high-low trnition. In other word, for low-high trnition the reonnt current hould be flling nd it vlue hould be below the negtive threhold. Similrly, for high-low trnition the reonnt current rent hould be riing nd it vlue hould be bove oitive threhold. If thee condition re met, 68 of 7

69 6. Digitl Control Imlementtion then the controller enter either etrt tte or Sutin tte deending on the STOP ignl vlue. In etrt tte the controller cn erform deending ng on the etting everl ynchronized witche or reet ttern of witche. Thi i done in order to enure roer witching condition during the retrt equence. Should thi equence be omitted, ome hrd-witching my occur due to the nture of the te reone of the CC reonnt tnk which h been decribed in chter.. After the retrt equence finihed the controller enter un tte nd i witching contntly t fixed frequency until STOP ignl chnge to gin. In the utin tte the controller cn erform imilr ttern to thi decribed in etrt tte, however ingle witch give the bet reult. Thi i due to the fct tht during Sutin tte we don t wnt to deliver too much energy into the reonnt circuit, becue thi will led to overvoltge t the outut of the converter t light lod. The lt oible tte to cover i the Timeout tte. Thi tte h been introduced in order to revent from locku of the converter hould it fil to ynchronize. In norml oertion the controller houldn t enter thi tte. etrt equence finihed Timeout etrt un Sync nd Sto Sto or Sutin Sto Timeout Sync Sto Timeout Sync nd Sto Sutin Sutin equence finihed Fig. 6.6 Digitl SCS Stte Mchine The min iue in thi control cheme i the roer ynchroniztion with the reonnt current. In order to clrify thi condition exemlry oertion wveform re reented in Fig of 7

70 6. Digitl Control Imlementtion V gte V gte Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q i r I th_o I th_neg ecurpo ecurneg DerCurPo DerCurNeg STOP V out V out_high V out low Fig. 6.7 Digitl SCS Oerting Wveform If we look cloer t the intnt when the ignl STOP goe to, we cn oberve tht the reonnt current derivtive i in fct negtive, however the bolute vlue i too low. The controller wit for the bolute vlue of the reonnt current to rie bove the threhold nd then erform the witch. 6. Summry The digitl imlementtion of two ued control lgorithm hve been introduced in thi chter. The FM h been imlemented for reference uroe. In order to chieve good outut regultion nd revent from limit cycle ocilltion the demnd for the frequency reolution i quite high. Hence, the digitl form of the FM require reltively high reource in term of clock frequency ued for gte ignl genertion. On the other hnd, the deign of the control loo in digitl form i retty trightforwrd nd enble ey modifiction of the PID rmeter in rel time. The econd imlemented control method i the SCS. The imlementtion detil nd roblem ocited with it hve been dicued. The tte mchine for the control lgorithm i decribed nd individul controller block re decribed in detil. The mot imortnt mechnim for the SCS Controller re the reonnt current ynchroniztion mechnim nd the reonnt current utin mechnim. Without, the firt the controller would not be ble to retrt witching roerly, nd the witche would be exoed to high current tre due to imroer witching. The reonnt current utin mechnim exit to revent the fding of the reonnt current to uch vlue tht the ynchroniztion i no longer oible. 7 of 7

71 7. Meurement nd Exerimentl Verifiction 7 Meurement nd Exerimentl Verifiction On the be of imlemented controller, which h been ued to control the reonnt ower converter, everl erformnce rmeter hve been meured. The mot intereting meurement re the verifiction of oft witching condition, oerting wveform, the qulity of the outut voltge, lod chnge te reone, the overll efficiency of the converter nd the conducted electromgnetic interference. Thee meurement hve been erformed for both FM nd SCS for comrion uroe. All of the meurement hve been erformed on the kw CC reonnt converter decribed in chter 5... To ee to locliztion of the meurement oint imlified chemtic for the full-bridge reonnt converter i reented in Fig. 7.. V IN Q A C Q r I reonnt C rim ec C Q C B Q Q C Q C Q Q I OUT f C f V OUT Fig. 7.kW Cl DE full-bridge reonnt ower converter The current robe ued in the following meurement h been et to V/A enitivity. 7. Oertion Wveform The oertion wveform meurement hve been erformed t V DC uly voltge. Thi i due to the fct tht V imroer oertion would detroy the reonnt converter. The develoed controller i till t it reliminry tge nd full relibility cnnot yet be enured. Becue of thi fct, the meurement hve been mde t fer voltge. Thi limit the voltge nd current to more mngeble level nd the reonnt converter cn withtnd occionl eriod of imroer oertion. Additionlly, meurement with the PFC rectifier re not referred due to the exitence of the Hz line rile voltge which i clerly viible on the meurement wveform. An dditionl fctor i the oibility of interference with the ower converter oertion when connecting ocillocoe robe to enitive re of the circuit. Hence the V DC uly voltge h been choen for the following meurement. A exerience how, the converter t V behve very cloely to the oertion t V uly voltge. In order to rovide imilr oerting condition t V, the outut voltge h been cled down roortionlly from 8V to V. The outut current i lo cled down from 6A to A nd the reulting outut ower reduce four time from W to 75W. 7 of 7

72 7. Meurement nd Exerimentl Verifiction The mot imortnt meurement i the verifiction of the oft witching condition for the MOSFET. No hrd witching hould ever occur, ince decribed in chter., ingle hrd witching event my led to the cttrohic filure of the converter. Fig. 7. to Fig. 7.6 how the riing nd flling edge of leg A of the full-bridge reonnt converter oint A in Fig. 7. in the SCS control cheme. Fig. 7. SCS riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod A % lod, V out 5.9V Fig. 7. SCS riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod 7.8A 5% lod, Vout.5V 7 of 7

73 7. Meurement nd Exerimentl Verifiction Fig. 7. SCS riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod 5.6A 5% lod, Vout.9V Fig. 7.5 SCS riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod.a 75% lod, Vout.6V Fig. 7.6 SCS riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod 6.6A 85% lod, Vout.V A cn be een, the vt mjority of the witching i oft witching, with the voltge cro the MOSFET fully chnged. Only mll mount of witching i done with the voltge not chnged to the ooite vlue, however thi event re rre nd only round % of the uly voltge i hrd 7 of 7

74 7. Meurement nd Exerimentl Verifiction witched. It how tht the condition for oft witching i mintined throughout the whole oerting region of the converter. For comrion uroe the meured wveform for the hlf-bridge witching in FM control cheme re lo included. Fig. 7.7 to Fig. 7.how the riing nd flling edge of leg A of the full- bridge reonnt converter oint A in Fig. 7. in the FM control cheme. Fig. 7.7 FM riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod A % lod, Vout.5V Fig. 7.8 FM riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod 7.8A 5% lod, Vout.5V 7 of 7

75 7. Meurement nd Exerimentl Verifiction Fig. 7.9 FM riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod 5.6A 5% lod, Vout.55V Fig. 7. FM riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod.a 75% lod, Vout.56V Fig. 7. FM riing left nd flling right edge of one of the full-bridge leg middle voltge t outut condition: I lod 6.6A 85% lod, Vout.57V A exected, in FM control cheme the MOSFEET re oft-witching witching long the converter oerte in the inductive re nd there i ufficient energy in the reonnt circuit to chrge the bridge outut ccitnce. 75 of 7

76 7. Meurement nd Exerimentl Verifiction The two mot intereting wveform for converter oertion in SCS control cheme re the hlfbridge outut voltge nd the reonnt current. In ce of the full bridge configurtion it i ufficient to meure the outut voltge of only one of the full-bridge leg, ince the other voltge will be comlementry uming tht the leg re ymmetricl. The oerting wveform for the SCS control cheme re reented in Fig. 7. to Fig In ech figure the to-left rt reent ortion of the oerting wveform while the ret re zoomed in rt of it. In the firt figure Fig. 7. itution with no lod i reented. Since there i lmot no energy flowing t the outut of the converter, er, the only mechnim tht i ctive i the reonnt current utin mechnim. The controller eriodiclly erform witching in order to revent the reonnt current from flling below the deired threhold. A cn be een, the verge witching frequency i t round hlf of the oerting frequency. Thi i till quite lrge vlue, nd idelly thi frequency during no lod hould be more round / th to / th of the oerting frequency. However, due to the comlex te reone of the reonnt circuit cuit thi etting roved to give ccetble reult. In the future, more comlex roch to current utin hould be conidered. Fig. 7. SCS oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod A % lod, Vout 6.8V The oerting wveform for 5% lod re reented in Fig There re few intereting oint to notice. In the to-left rt n overview of the oertion cn be een. The oertion conit of two ditinguihble tte. One with lower reonnt current mlitude i the eriod when the ignl STOP nd either no witching occur or the reonnt current utin mechnim i working. The other i when the reonnt current mlitude i lrger. The ignl STOP in thi ce i equl to nd the converter witche with fixed frequency. Thu, we get cket of higher current mlitude interleved with cket of lower mlitude with frequency of round few kilohertz. 76 of 7

77 7. Meurement nd Exerimentl Verifiction The to-right rt reent the intnt of retrt of the witching STOP goe to. Notice tht ech of the witch event i oft-witched. witched. The bottom-left rt reent the intnt when ignl STOP goe to nd the converter cee to witch. Fig. 7. SCS oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod 7.8A 5% lod, Vout.5V 77 of 7

78 7. Meurement nd Exerimentl Verifiction Fig. 7. SCS oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod 5.6A 5% lod, Vout.5V Fig. 7.5 SCS oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod.a 75% lod, Vout.5V 78 of 7

79 7. Meurement nd Exerimentl Verifiction Fig. 7.6 SCS oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod 6.6A 85% lod, Vout.V A the lod incree the length of the witching eriod incree nd the verge frequency of the cket decree. Agin, for comrion uroe the oerting wveform for the FM control cheme re reented in Fig. 7.7 Fig It i worth mentioning tht in CC reonnt converter the reonnt current mlitude vrie only lightly with the lod chnge. Fig. 7.7 FM oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod A % lod, Vout.5V 79 of 7

80 7. Meurement nd Exerimentl Verifiction Fig. 7.8 FM oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod 7.8A 5% lod, Vout.5V Fig. 7.9 FM oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod 5.6A 5% lod, Vout.55V Fig. 7. FM oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod.a 75% lod, Vout.56V 8 of 7

81 7. Meurement nd Exerimentl Verifiction Fig. 7. FM oerting wveform: hlf-bridge outut voltge t oint A, reonnt current t outut condition: I lod 6.6A 85% lod, Vout.57V 7. Outut Voltge nd Outut Voltge ile Another imortnt rmeter of ny voltge ower uly i the qulity of the outut voltge. In thi chter the meurement of the outut voltge rile for vriou lod condition re reented. The meured outut voltge v outut ower i reented in Fig. 7.. VINV Sequentil Cycle Steling Frequency Modultion VIN8V Sequentil Cycle Steling Frequency Modultion Outut Voltge [V] Outut Voltge [V] Outut Power [W] Outut Power [W] Fig. 7. Outut voltge v outut ower chrcteritic comrion between SCS nd FM for V uly voltge left nd PFC 9V uly voltge right The FM mintin better regultion of the outut voltge where the SCS uffer from tedy voltge dro with increing outut ower. TABE 7. contin the reult for both SCS nd FM control cheme. 8 of 7

82 7. Meurement nd Exerimentl Verifiction TABE 7. Outut voltge rile meurement reult Sequentil Cycle Steling I lod A %, V out 5.V Frequency Modultion I lod A %, V out.5v I lod 7.8A 5%, V out.5v I lod 7.8A 5%, V out.5v I lod 5.6A 5%, V out.5v I lod 5.6A 5%, V out.55v 8 of 7

83 7. Meurement nd Exerimentl Verifiction I lod.a 75%, V out.6v I lod.a 75%, V out.56v I lod 6.6A 85%, V out.7v I lod 6.6A 85%, V out.58v A cn be een from the meurement reult the SCS control reult in round time higher rile voltge. Thi i drwbck of thi method, however the outut rile voltge could be reduced by modifying the etting for the control cheme or by lying more dvnced technique for determining the STOP ignl. Currently, the STOP ignl i obtined by imle comrion of the outut voltge with reference rence vlue. It i then nturl tht the control cheme inherit the feture of ytem controlled by comrtor. 7. od Ste eone An intereting toic i the lod te outut voltge reone of the ower converter. Hence, the meurement for two ce hve been mde. Thee re %-85% lod te nd 6%-85%. The two condition hve been necery in order to how the roer oertion of the SCS controller nd highlight roblem tht i connected with the reonnt current mechnim. At no lod, due to the reonnt current utin mechnim, the outut voltge i c.. V higher thn the deired voltge. Thi led to kewed te reone reult nd i the reon for the 6%-85% meurement. The meurement reult of the outut voltge lod te reone for both ce nd for SCS nd FM control cheme re reented in TABE 7. The firt figure row give the overview of the te reone while the next two row re zoomed in view of the lod riing nd flling edge. 8 of 7

84 7. Meurement nd Exerimentl Verifiction TABE 7. Outut voltge lod te reone meurement reult. outut current, outut voltge Sequentil Cycle Steling I lod A -> 6.6A Frequency Modultion 8 of 7

85 7. Meurement nd Exerimentl Verifiction I lod A -> 6.6A A cn be een from the meurement reult, the te reone of the SCS control cheme i rther oor for the %-85% lod chnge condition. Thi i due to the fct mentioned bove. If the lod te condition re chnged to 6%-85%, the behvior imrove ignificntly. The effect of the lod te chnge do not influence the level of the outut voltge nd only the he of the outut voltge rile i chnging. With the digitl imlementtion of the FM it i oible to chieve ft lod te reone, but the min dvntge of the FM i it lower rile voltge. 7. Efficiency One of the mot imortnt rmeter i the efficiency of the ower converter. Thi rmeter h been meured in two condition. One h been with the PFC rectifier er omitted nd the DC-DC converter ulied form V DC ower uly nd the econd h been with the PFC rectifier ulied from V AC line nd the DC-DC converter ulied with 9V directly from the PFC 85 of 7

86 7. Meurement nd Exerimentl Verifiction rectifier outut. Both meurement include the uly of the uxiliry ower uly necery for the MOSFET driver nd other comonent, but exclude the ower drwn by the Univerl Control Bord. In ce of the V uly voltge the meurement of both inut nd outut ower h been mde with the Yokogw WT reciion ower nlyzer, while the ce with PFC rectifier uly voltge the inut ower h been meured with the Yokogw WT nd the outut ower h been meured uing voltge meter nd current meter. 7.. Efficiency meurement for V uly voltge Since the uly voltge i cled down from V to V the outut vlue hould lo be cled down by the fctor of. Hence the outut voltge i cled down to V from 8V nd the outut current i cled down to A from 6A. TABE 7. nd TABE 7. contin the meurement reult for SCS nd FM control cheme reectively. TABE 7. SCS efficiency meurement reult for vriou lod V in [V] I in [A] V out [V] I out [A] P in [W] P out [W] P lo [W] Eff [%] TABE 7. FM efficiency meurement reult for vriou lod V in [V] I in [A] V out [V] I out [A] P in [W] P out [W] P lo [W] Eff [%] of 7

87 7. Meurement nd Exerimentl Verifiction The comrion between the SCS nd FM ower loe nd efficiencie i reented in Fig. 7. VINV Sequentil Cycle Steling Frequency Modultion Power oe [W] Outut Power [W] Fig. 7. Power loe v outut ower chrcteritic comrion between SCS nd FM It cn be een tht for light lod the ower loe re lmot two time mller for SCS thn for FM. The ower loe gin decree the outut ower roche roche full ower, where the loe re omewht equl. Thi i exected, ince t full ower the duty cycle for cket length i %, thu the wveform between SCS nd FM re identicl. The efficiency chrcteritic v outut ower for both control cheme i reented in Fig. 7.. The SCS imrove the efficiency ignificntly to round 5% of outut ower. Thi i deired feture becue one of the min didvntge of the FM control i oor efficiency t light lod. Alying SCS give noticeble reult in thi region. 87 of 7

88 7. Meurement nd Exerimentl Verifiction VINV Sequentil Cycle Steling Frequency Modultion Efficiency [%] Outut Power [W] Fig. 7. Efficiency v outut ower chrcteritic comrion between SCS blue nd FM green control cheme. The efficiency of whole ower uly i reented 7.. Efficiency meurement for 9V uly voltge from PFC rectifier Mot of the high ower converter oerte with PFC rectifier circuit. To verify roer oertion with thi circuit efficiencie hve been meured nd the reult re reented in TABE 7.5 nd TABE 7.6 for SCS nd FM control cheme reectively. TABE 7.5 SCS efficiency meurement reult for vriou lod V in [V] I in [A] V out [V] I out [A] P in [W] P out [W] P lo [W] Eff [%] of 7

89 7. Meurement nd Exerimentl Verifiction TABE 7.6 FM efficiency meurement reult for vriou lod V in [V] I in [A] V out [V] I out [A] P in [W] P out [W] P lo [W] Eff [%] The comrion between the SCS nd FM ower loe nd efficiencie i reented in Fig VIN8V Sequentil Cycle Steling Frequency Modultion Power oe [W] Outut Power [W] Fig. 7.5 Power loe v outut ower chrcteritic comrion between SCS nd FM 89 of 7

90 7. Meurement nd Exerimentl Verifiction Similrly for V uly voltge, the ower loe for SCS re c.. time mller thn for FM. In our ce the ower ved t light lod i round W. The efficiency chrcteritic v outut ower for both control cheme i reented in Fig VIN8V Sequentil Cycle Steling Frequency Modultion Efficiency [%] Outut Power [W] Fig. 7.6 Efficiency v outut ower chrcteritic comrion between SCS blue nd FM green control cheme. The efficiency of whole ower uly i reented. Agin, the SCS imrove the efficiency ignificntly to round 5% of outut ower. In ce of higher uly voltge the efficiency ficiency imrovement i even higher nd reche 8% t 5W outut ower. 7.5 Conducted EMI meurement The ower ulie connected to V line voltge mut the necery EMC regultion. The trictne of thee regultion vry with the liction but the meurement of conducted EMI hould give n overview of the control method erformnce. The meurement hve been mde t % lod with the uly from V line voltge. Both the PFC rectifier nd DC-DC reonnt converter hve been oerting. A EMI filter i rovided on the ower uly PCB, however the filter h not been otimized. Thu, t higher frequency region everl reonnce cn be een, tht re the reult of the unotimized inut filter. A method for filter otimiztion h been reented in [6]. The meurement reult re reented in Fig. 7.7nd Fig. 7.8 for SCS nd FM reectively. 9 of 7

91 7. Meurement nd Exerimentl Verifiction EN 55 Cl A Conducted Emiion Cl A QP Cl A AV 6 5 evel dbuv 5k Frequency Hz M M M Fig. 7.7 SCS conducted EMI meurement reult EN 55 Cl A Conducted Emiion Cl A QP Cl A AV 6 5 evel dbuv 5k Frequency Hz M M M Fig. 7.8 FM conducted EMI meurement Notice, tht SCS h lightly higher ek level for frequencie below MHz, but much lower ek level for frequencie bove MHz. Additionlly, the verge level i more evenly red for the SCS for frequencie below MHz. Thi i n imrovement, becue it i eier to contruct filter for frequencie below everl MHz thn for everl ten of MHz. 7.6 Summry The chter contin the meurement reult of the rototye ower uly rmeter. The reult comre the erformnce in re uch outut voltge regultion nd rile, te reone, efficiency nd conducted EMI emiion. Additionlly, the oerting wveform re reented, to verify roer witching condition. The reliminry verion of the SCS give romiing 9 of 7

92 7. Meurement nd Exerimentl Verifiction reult. The witche oerte in ZVS condition nd only mll frction of witching i not idel. The SCS control give ignificnt imrovement in efficiency t le thn % lod re nd the level of the conducted EMI emiion i lower thn in FM control. However, the FM control give better reult in term of outut voltge rile level nd outut voltge regultion. Both control method give imilr reult in ce of lod te reone. 9 of 7

93 8. Concluion 8 Concluion The thei h been focued on finding control method which would imrove the erformnce of reonnt ower converter, with erie-rllel CC reonnt converter the min liction. However, to derive control ol method, it i necery to undertnd the nture of the reonnt converter, which behve differently from clic hrd witching converter. Severl, mot common reonnt converter tye hve been reented long with le common but ttrctive erierllel CC reonnt converter. Since the reonnt converter re rone to filure when oerted not roerly, brief dicuion bout mot common filure cue h been included. The next toic cover vriou control method emloyed in tody liction. liction. Clic PWM method re briefly dicued long with more dvnced method like Aymmetricl PWM dedicted to reonnt converter. However mot of the method uffer from either low efficiency t low lod, or oerte trictly in nrrow frequency bnd, which cn led to roblem with meeting the EMC regultion. Thu, the next toic introduce the concet of novel control method Sequentil Cycle Steling. The method i bed on Pule Denity Modultion. In current verion the converter i witching when the outut voltge i bove deired threhold nd cee to witch otherwie. The criticl rt of the control method i the roer ynchroniztion with the reonnt current in order to revent imroer witching without ZVS. In order to hve better inight in CC reonnt converter behvior, generlized nlyi of the te reone of the CC reonnt tnk h been erformed. It h hown tht the rediction of the behvior of the reonnt tnk i not trivil nd the bet roch for ynchroniztion lgorithm would be rel time meurement nd rection inted of rediction. Thnk to reduced verge witching frequency, the control method cn reduce ower loe in re uch witching loe eecilly the outut rectifier, er, ferrite core loe nd coer loe. In order to verify the rooed SCS control method, tet ltform h been built. The ltform conit of kw full bridge CC reonnt ower converter with PFC rectifier. Additionlly, univerl control bord cn be ttched to llow for ey lgorithm imlementtion nd teting. Two digitl lgorithm hve been imlemented: FM nd SCS. The detil of the imlementtion re decribed for both lgorithm. The meurement reult how tht the tted initil objective re fulfilled. The digitl imlementtion of the control lgorithm chieve one of the objective. The converter oerting with SCS cn gin u to % incree in efficiency t light lod, nd till hve % better efficiency u to round 85% of the lod. Additionlly, the conducted EMI emiion i lower nd eier to filter thn in FM Control. The te reone of both control method i quite imilr nd the only field where the SCS loe to FM i the outut voltge regultion nd rile. During meurement of the reonnt converter with SCSC roblem h been dicovered. While the converter oerted with SCS, udible noie from inductive comonent h been oberved. Thi i the direct reult of the he of the STOP ignl tht control the witching of the converter. The reulting eriod of the STOP ignl i round μ c...khz which i well within the udible bnd. However, the current verion i reliminry deign nd there i till ce to imrove the erformnce of the SCS. One 9 of 7

94 8. Concluion ide i to relce the outut voltge comrtor with Sigm-Delt converter. Thi cn otentilly red the witching cket reulting in mller outut rile. Additionlly, thi hould lo reduce the level of the generted udible noie. Another field for imrovement i the reonnt current utin lgorithm nd the ynchroniztion lgorithm. The imrovement in thee re hould reduce the reonnt current mlitude during the to eriod, wht reult in further imroving efficiency. A erte toic for further reerch i finding the miniml reolution nd mling frequency requirement for roer lgorithm oertion. Summrizing, ll thei objective, which hve been to develo digitl control method tht would imrove the erformnce nd EMI emiion of the erie-rllel CC reonnt converter, hve been uccefully fulfilled. 9 of 7

95 9. Bibliogrhy 9 Bibliogrhy [] H. Youn, K. Prk, H. Seong, G. Moon nd M. Youn, PWM Poitive Buck-Boot Boot Converter with educed Switching o emloying Qui-eonnt Oertion, in IEEE Energy Converion Congre nd Exoition ECCE', Atlnt,. [] G. Hung, T. ing nd K. Chen, oe Anlyi nd ow Stndby oe Qui-eonnt Flybck Converter Deign, in IEEE Interntionl Symoium on Circuit nd Sytem ISCAS', Seoul,. [] I. Brbi, J. Bolcell, D. Mrtin nd F. ibno, "Buck Qui-eonnt Converter Oerting t Contnt Frequency: Anlyi, Deign nd Exerimenttion," in Power Electronic Secilit Conference PESC'89,, Milwukee, 99. [] C. Worek,. Widórek nd S. igenz, Integrted Mgnetic Comonent in kw eonnt Power Suly, in Euroen Conference on Power Electronic nd Aliction EPE', ille,. [5]. Widorek nd S. igenz, Modeling of 5W DCDC Serie-Prllel eonnt Converter with Integrted Mgnetic Comonent, in Interntionl Conference on Signl nd Electronic Sytem ICSES',, Wroclw,. [6]. Widorek nd S. igenz, Integrted mgnetic comonent in W reonnt ower uly dedicted for lighting liction, liction, Elektronik - kontrukcje, technologie, ztoowni,. - 6,. [7] C. Worek, A method for controlling reonnt-mode ower uly nd reonnt-mode ower uly with controller. Interntionl Ptent PCT/EP/679,. [8] C. Worek, Adtcyjn metod z wykrdniem imulów orz monitorowniem czętotliwości włnej. Polnd Ptent P958,. [9] P. J. Bxndll, Trnitor Sine-Wve C Ocilltor, in Proceeding of the IEE - Prt B: Electronic nd Communiction Engineering Vol. 6 Iue: 6, 959. [] M. Kzimierczuk nd M. Czrkowki, eonnt Power Converter, John Wiley & Son, 995. []. P. Severn, Toologie for Three-Element eonnt Converter, in IEEE Trnction on Power Electronic 99, 99. [] M. Kzimierczuk, F Power Amlifier, John Wiley & Son, td., 8. [] B. C. Pollrd nd. M. Nelm, "Uing the Serie-Prllel eonnt Converter in Ccitor Chrging Aliction," in Alied Power Electronic Conference nd Exoition, of 7

96 9. Bibliogrhy [] Firchild Semiconductor, Hlf-bridge C eonnt Converter Deign Uing FSF-erie Firchild Power Switch, Firchild Semiconductor, 7. [5] ON Semiconductor, Undertnding the C Structure in eonnt Aliction, ON Semiconductor, 8. [6] STMicroelectronic, An Introduction to C reonnt hlf-bridge converter, STMicroelectronic, 8. [7] K. W. Chen nd K. J. un, Integrted Mgnetic for Hybrid Full-Bridge Three-evel C eonnt Converter, in Interntionl Conference on Electricl Mchine nd Sytem ICEMS'8, Wuhn, 8. [8] H. Choi, Anlyi nd Deign of C eonnt Converter with Integrted Trnformer, in IEEE Alied Power Electronic Conference APEC'7, Anheim, 7. [9] Y. iu, High Efficiency Otimiztion of C eonnt Converter for Wide od nge, Virgini Polytechnic Intitute nd Stte, 7. [] A. Abrmovitz nd S. Bronhtein, A Deign Methodology of eonnt C DC-DC Converter, in t Euroen Conference on Power Electronic nd Aliction EPE',, Birminghm,. [] B. Yng, Toology Invetigtion of Front End DC/DC Power Converion for Ditributed Power Sytem, Virgini Polytechnic Intitute nd Stte Univerity,. [] ON Semiconductor, Undertnding Power Trnitor Brekdown Prmeter, ON Semiconductor,. [] H. A. Schfft nd J. C. French, "Second brekdown" in trnitor, in IE Trnction on Electron Device, 96. [] W. Choi nd S. Young, Effectivene of Ft ecovery MOSFET to elibility of Switching Power Sulie, in Interntionl Symoium on Power Electronic, Electricl Drive, Automtion nd Motion, Pi,. [5] W. Choi, S. Young nd D. Kim, Anlyi ofmosfet Filure Mode in C eonnt Converter, in t Interntionl Telecommuniction Energy Conference INTEEC'9,, Incheon, 9. [6] W. Choi nd S. Young, Imroving Sytem elibility Uing FFET in C eonnt Converter, in IEEE Power Electronic Secilit Conference PESC'8, hode, 8. [7] P. Krein, Digitl Control Genertion -- Digitl Control for Power Electronic through the Third Genertion, in Power Electronic nd Drive Sytem PEDS'7,, Bngkok, 7. [8] Y. Yin nd. Zne, Digitl Phe Control for eonnt Inverter, in IEEE Power Electronic 96 of 7

97 9. Bibliogrhy etter,. [9] N. Bytndtr,. Kukrer nd M. Yku, DSP-bed P-controlled 5- khz kw high frequency induction heting ytem for urfce hrdening nd welding liction, in IEE Proceeding Electric Power Aliction,. [] M. M. Peretz nd S. Ben-Ykov, Digitl Control of eonnt Converter: eolution Effect on imit Cycle, in IEEE Trnction on Power Electronic, 9. [] H. Chen, E. Kenneth nd K. Teng, Generlized Otiml Trjectory Control for Cloed oo Control of Serie-Prllel eonnt Converter, in IEEE Trnction on Power Electronic, 6. [] Y. Yin nd. Zne, Digitl Controller Deign for Electronic Bllt with Phe Control, in 5th IEEE Power Electronic Secilit Conference, Achen,. [] E. Wu nd P. W. ehn, Digitl Current Control of Voltge Source Converter With Active Dming of C eonnce, in IEEE Trnction on Power Electronic,, 6. [] J. Mtyik nd B. Szymńki, "Chrge Controlled Cl DE Serie eonnt Converter - New Concet," in The Interntionl Conference on "Comuter Tool" EUOCON, 7. [5] W. Feng, Stte Trjectory Anlyi nd Control of C eonnt Converter, Virgini Polytechnic Intitute nd Stte Univerity,. [6] Anlog Device, ADP5 - Digitl Controller for Iolted Power Suly with PMBu Interfce, Anlog Device,. [7] Firchild Semiconductor, FAN96 - Dtheet, Firchild Semiconductor,. [8] Tex Intrument, UCC87 C87 - Dtheet, Tex Intrument,. [9] J. T. Mtyik, The Current nd Voltge Phe Shift egultion in eonnt Converter With Integrtion Control, in IEEE Trnction on Indutril Electronic, 7. [] M. Z. Youef, P. K. Jin nd H. Zhng, Performnce of the eonnt Converter under the Self- utined Ocilltion Bed Control Technique, in IEEE 6th Power Electronic Secilit Conference PESC'5,, ecife, 5. [] B. Chen nd Y. i, Novel Dul Mode Oertion of Phe-Shifted Full Bridge Converter to Imrove Efficiency under ight od Condition, in IEEE Energy Converion Congre nd Exoition ECCE'9,, Sn Joe, 9. [] E. Kim, B. Chung, S. Jng, M. Choi nd M. Kye, A Study of Novel Flybck Converter with Very ow Power Conumtion At the Stndby Oerting Mode, in IEEE Alied Power Electronic Conference nd Exoition APEC', Plm Sring,. 97 of 7

98 9. Bibliogrhy [] M. Bude nd. Gor, Burt Mode Switching Mechnim for n Inductorle DC-DC Converter, in Interntionl Semiconductor Conference CAS'7,, Sini, 7. [] H. Koizumi, Delt-Sigm Modulted Cl D Serie eonnt Converter, in Power Electronic Secilit Conference PESC 8, 8. [5] H. Koizumi nd K. Kurow, "A Comrion of Outut Enveloe Wveform of The Delt-Sigm Modulted Cl D Serie eonnt Inverter," in IEEE Interntionl Symoium on Circuit nd Sytem ISCAS 6, 6. [6] H. Koizumi nd K. Kurow, "Thinned-Out Controlled Cl D Inverter with Delt-Sigm Modulted -bit Driving ule," in IEEE Interntionl Symoium on Circuit nd Sytem ISCAS 5, 5. [7] H. Koizumi, "Delt-Sigm Modulted Cl D ZCS Serie eonnt Inverter with n Inductive od," in IEEE Interntionl Symoium on Circuit nd Sytem ISCAS 8.,, 8. [8] J. Modzelewki nd M. Mikoljewki, "Outut Voltge Control by Frequency egultion in Cl- DE Power Amlifier," in The Interntionl Conference on "Comuter Tool" EUOCON, 7. [9] P. K. Jin, A. StMrtin nd G. Edwrd, "Aymmetricl Pule-Width Modultion eonnt DC/DC Converter Toologie," in th Annul IEEE Power Electronic Secilit Conference PESC '9, 996. [5] J. Tin, G. Berger, T. eimnn, M. Scherf nd J. Petzoldt, "A Hlf-Bridge Serie eonnt Inverter for Induction Cooker uing Novel FPGA-bed Control Strtegy," in Euroen Conference on Power Electronic nd Aliction, 5. [5] J. T. Mtyik, A New Method of Integrtion Control With Intntneou Current Monitoring for Cl D Serie-eonnt Converter, in IEEE Trnction on Idutril Electronic, 6. [5] H. Fujit nd H. Akgi, Pule-Denity-Modulted Power Control of kw, 5 khz Voltge- Source Inverter for Induction Melting Aliction, in IEEE Trnction on Indutry Aliction, 996. [5] S. W. H. D. HAAN, A New Integrl Pule Module for the Serie-eonnt Converter, in IEEE Trnction on Indutril Electronic, 98. [5] D. J. Tchirhrt nd P. K. Jin, "Vrible Frequency Pule Denity Modultion for Efficient High Frequency Oertion of Serie eonnt Converter Oerting Voltge egultor," in Twenty-Fifth Annul IEEE Alied Power Electronic Conference nd Exoition APEC,. [55] P. Wojtowicz, Budow rogrmowlnego, cyfrowego terownik dedykownego do zilczy, Krków: AGH Univerity of Science nd Technology,. 98 of 7

99 9. Bibliogrhy [56] Firchild Semiconductor, FAN76 - Dtheet, Firchild Semiconductor,. [57] Infineon, ICEHSG - Dtheet, Infineon,. [58] ON Semiconductor, NCP96 - Dtheet, ON Semiconductor,. [59] NXP Semiconductor, TEA7T - Dtheet, NXP Semiconductor,. [6] Tex Intrument, UCC56 - dtheet, Tex Intrument,. [6] S. igenz, C. Worek nd. Widorek, Conducted emiion filter reonnt converter for high ower ED lighting liction, in EMC' Komtybilność Elektromgnetyczn w Elektrotechnice i Elektronice, odz,. [6] O. A. Eno, D. S. Thomon nd J. Coin, "High ower reonnt toology for DC-DC converter," in Euroen Conference on Power Electronic nd Aliction, 5. [6] M. Ktym, H. He, H. Sekiy, J. u nd T. Yhgi, "Deign of Cl DE Inverter with Bnd- Filter," in IEEE nd Annul Conference on Indutril Electronic, IECON 6, 6. [6] A. Premn, K. Billing nd T. Morey, Switching Power Suly Deign, McGrw-Hill Profeionl, 9. [65]. Widorek, S. igenz nd C. Worek, Mgnetic comonent deign nd witching technique in high, Electricl eview,. 9, b. 99 of 7

100 . Aendix A Aendix A - Schemtic The endix contin mot imortnt chemtic of the contructed rototye.. PFC Module Schemtic of 7

101 . Aendix A of 7

102 of 7. Aendix A

103 . Aendix A of 7

104 . Aendix A. CC eonnt Converter Schemtic of 7

105 . Aendix A 5 of 7

106 6 of 7. Aendix A

107 . Aendix A. Control Bord Schemtic 7 of 7

108 8 of 7. Aendix A

109 . Aendix A 9 of 7

110 of 7. Aendix A

111 . Aendix A of 7

112 of 7. Aendix A

113 . Aendix A of 7

114 of 7. Aendix A

115 . Aendix A 5 of 7

116 6 of 7. Aendix A

117 . Aendix A 7 of 7