Innovative Wafer and Interconnect Technologies - Enabling High Volume Low Cost RFID Solutions

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1 Innovative Wafer and Interconnect Technologies - Enabling High Volume Low Cost RFID Solutions

2 Innovative Wafer & Interconnect Technologies Outline Low cost RFID Tags & Labels Standard applications and potential growth areas State of the Art assembly for RFID applications Technical limitations How to enable low cost assembly Dicing technologies IC handling 3D assembly for RFID

3 Applications for RFID Tag & Labels multiple applications are driving a sustainable growth Library Animal ID Fashion Electronics FMCG Smart Media Increased customer service level and sorting efficiency? Faster self check - outs? Self - returns 24/7? Fast sorting, inventory? Theft protection of books Ensuring disease control to enjoy healthier food? Proof of pedigree? Vaccination information? Movement data? Farm site automation Avoiding out - of - stock situations and provide for theft deterrence? Fast inventory control? Fast replenishment? Theft deterrence (EAS)? Supply chain mgmt. Flexibility in product configuration and ease of production control? Device configuration? Device activation? Production control? PCB tagging Brand protection, anti counterfeit through proof of origin? Product authentication? Profile of service? Taxation control Enabling touch based applications for convenience & authenication? Smart posters? Advertisement? Automatic configuration? Access to mobile services Product Offering HITAG Tag & Reader ICs 125kHz / ISO Standard ICODE Tag & Reader ICs MHz / ISO Standard Mifare Tag & Reader Ics MHz / ISO Standard UCODE Tag ICs MHz / ISO Standard, EPCglobal Gen2

4 Near Field Communication- NFC reader & label functionality integrated into mobiles Secure Transactions Payment, Ticketing, Access, Transit, loyalty Contactless Cards Peer To Peer SmartMX Security Easy device association, profile exchange, gaming Contactless Readers Service Discovery MIFARE Solutions Content distribution, smart advertising, coupons Contactless Tags & Labels RFID Leadership

5 Fast Moving Consumer Goods (FMCG) and NFC enabling completely new applications Counterfeiting is a severe and growing issues >50% of branded Vodka in Russia & Whisky in Taiwan is counterfeit 9B$ counterfeit-related global losses for Wine & Liqueurs in % of meds in some dev. countries are counterfeited or sub-standard >50% of the meds bought from certain illegal websites are fake NFC-phones provide the Reader infrastructure But can RFID labels be cheap enough?

6 Costs of IC assembly do not follow Moore s Law IC costs are constantly decreasing Smaller structural sizes and larger wafer diameters Following Moore s Law But assembly cannot follow with the same speed Die Attach / Wire bonding are per ICs Package sizes are not shrinking Only molding / encapsulation is batchwise What does this mean for RFID labels?

7 Data transmission principles for passive RFID HF and UHF uses the same assembly technology Inductive Coupling (Transformer Principle) Frequencies: 13,56MHz Antennas: Coils Operating Distance: 10cm -1.5m Applications: ISO Proximity cards ISO Vicinity cards EM-wave propagation (back scattering) Frequencies: MHz, 2.45 GHz Antennas: Dipole, Monopole Operating Distance: up to 12m Applications: EPC Gen2

8 Components for passive RFID label bare ICs are glued to the antenna HF label Thin layer antenna on a substrate etched Aluminum or Copper foils Printed Antennas Galvano-plated Antennas UHF label IC 2 Antenna contacts with bump structure Interconnection Silicon (120µm) Active layers Au- bump Al- foil PET carrier

9 Standard Assembly for RFID tags uses Direct Chip Attach process IC (delivered by ) Singulated ICs on Film Frame Carrier (FFC) Thickness: typ. 120µm thick, 18mm bump structure, 7µm spacer (optional) Antenna substrate Structured metal layer on substrate material on reel Direct Chip Attach process 1 Adhesive glue is dispensed (conductive or non-conductive) 2 IC is picked from FFC and flipped 3 IC is placed on antenna substrate 4 Adhesive is cured under pressure and heat converting Adhesive layer coating & inter-liner ( wet inlay ) Additional layer laminated Die cut & slitting F,T 4

10 Use the Silicon wafer more efficiently by reducing the sawlane Conventional blade dicing requires 80-60µm sawlanes Well established process Support 280µm down to 75µm silicon thickness Equipment is flexible Stealth dicing enables 15µm sawlanes For 8 wafer / 500x460µm IC: approx. 14% more ICs per wafer! 160m length of sawlane! but: requires metal free sawlanes, max. 150µm Silicon thickness Process time & costs becomes dominant!

11 For smaller ICs and larger wafers batch wise singulation processes are required Process flow for Plasma Dicing Before Grinding (PDBG) Main issues: Combination of 15µm sawlane and grinding is critical Requirements on the Si-process (Di-electrics, no metal in the sawlanes) Process costs / infrastructure / compatibility with other products

12 Will smaller ICs make RFID cheaper? Moore s Law does not apply for RFID Latest IC generation is < 500x500µm in size Requires higher process accuracy for antenna manufacturing Requires better control of glue dispensing during assembly Requires higher placement accuracy of the ICs during assembly Antenna contact pads Overall product costs even increase! Only latest equipment generations can handle small ICs with >15000 units per hours (yearly capacity of 100Mpcs only) IC with Au bumps Required antenna accuracy is only specified by the most advanced antenna manufactures. Can we achieve the required cost down to enable additional RFID applications?

13 Pick & Place process is not limiting Discretes are running in highest volumes Pick & Place is a standard process Conventional Die Bonders are working with 36kpcs/hours 100ms cycle time, 70ms tape release is critical Latest Generation is working at 48kpcs/hours Use of new tape material reduces release time down to 30-40ms Volume experience with ITEC Adat3 for 0.25x0.25mm products for full optimized process (IC / foil / equipment) Laser transfer enables >100kpcs/hour thermal release by using a laser pulse Reduce release time to 5ms No mechanical stress on ICs No impact on neighboring ICs

14 3D-approach for tiny RFID ICs with only 50µm x 50µm size Ultra small RFID Chip approach by Hitachi / Renesas Basic RFID Functionality in a 50µm IC 90nm CMOS process in SOI technology 2.45GHz Electron Beam written 128b memory 5µm total thickness Double surface electrodes with TSV For reasonable performance and functionality, we assume 300x300µm IC size as current limit. Proposed technologies are by far to expensive

15 3D assembly can overcome the limitations to assemble ICs smaller than today Standard 2D assembly IC Antenna 3D assembly Antenna Planar antenna structure/ IC is placed on top Limitations: Antenna accuracy Glue dispensing IC placement Adhesive curing Antenna IC Antenna IC is placed between the antenna leads No lateral placement accuracy Antenna process is cheaper Pick an place is faster Adhesive curing can be part of the converting lamination process

16 But new Backend & Assembly required to enable RFID in high volume at low costs Required Wafer / Backend technology IC New assembly concepts required Through Silicon Vias Expensive process Interconnection via substrate New front end designs Bump technologies and backside metalisations Thin IC thicknesses are expensive to handle Dicing processes for small sawlanes Die handling Small IC sizes can be managed IC Optimum Interconnection processes Compliant with converting processes

17 Conclusions & Outlook to enable the highest volume at low costs Low cost RFID Tags & Labels Standard applications and potential growth areas Fast Moving Consumer Goods (FMCG) Supported by NFC Opportunities for high volumes are there! State of the Art assembly for RFID applications Technical limitations processing of small ICs is critical with installed equipment base How to enable low cost assembly Dicing technologies IC handling 3D assembly for RFID Further cost down only by economy of scale 3D-RFID assembly can bring process costs and required investments significantly down

18 Thanks for your attention! for questions! and please feel free

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