Key ADC Specifications

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1 Key Parameters

2 Key ADC Specifications Static Specifications Offset / Full-scale / Gain Differential Non-linearity (DNL) / Integral Non-linearity (INL) No Missing Codes Dynamic Specifications Signal to Noise Ration (SNR) Spurious Free Dynamic Range (SFDR) Total Harmonic Distortion (THD) / SIgnal to Noise And Distortion (SINAD) Effective Number Of Bits (ENOB) 2

3 Key DAC Specifications Static Specifications Zero-Code / Offset / Full-scale / Gain Differential Non-linearity (DNL) / Integral Non-linearity (INL) Monotonicity Dynamic Specifications Glitch impulse Settling time Update rate 3

4 Offset Error Offset error is the difference in voltage between the ideal first code transition and the actual code transition of an ADC, respectively the difference to the reference at code 000xxx in case of a DAC FS Ideal Analog Output Voltage 3/4 FS 1/2 FS Positive Offset error 1/4 FS Digital Input Code 4

5 Gain Error (Full Scale Error) Gain Error = Full-scale Error - Offset Error FS Ideal Positive Gain error 3/4 FS Analog Output Voltage 1/2 FS 1/4 FS Negative Gain error Digital Input Code 5

6 Differential Nonlinearity (DNL): A DNL error beyond +/-1LSB can cause missing codes in an ADC or Non-Monotonic behavior of a DAC.. FS 3/4 FS Analog Output Voltage 1/2 FS 1/4 FS Ideal Digital Input Code 6

7 DAC Monotonicity Analog Output Voltage FS 3/4 FS 1/2 FS Non-monotonic Non-monotonic DAC s are not appropriate for control loop Applications! 1/4 FS Ideal DNL < Digital Input Code 7

8 Integral Nonlinearity INL An INL error is the maximum deviation of a transition point from the corresponding point of the ideal transfer curve, with the measured offset and gain errors zeroed. FS Analog Output Voltage 3/4 FS 1/2 FS Positive INL error 1/4 FS Ideal Digital Input Code 8

9 AC Applications Six popular specifications for quantifying ADC dynamic performance are: SINAD (signal-to-noise-and-distortion ratio), ENOB (effective number of bits), SNR (signal-to-noise ratio), THD (total harmonic distortion), THD + N (total harmonic distortion plus noise), SFDR (spurious free dynamic range). 9

10 Spurious-Free Dynamic Range (SFDR) SFDR = ratio RMS value of the signal to RMS value of worst spur 10

11 Signal-to-Noise Ratio (SNR) SNR db = 20log 10 [ rms] [ rms] value of Fs input value of quantization noise F s INPUT = v q2 2 N () t = sin( 2πft) RMS Value of FSinewave = s q2 N 2 2 RMS Value of Quantization Noise SNR = 6.02N + 1, 76dB = q 12 11

12 THD and THD+N Total harmonic distortion (plus noise): power ratio of single tone vs. sum of harmonics THD+N includes Noise as well THD + N = 20log 10 ( A + A + K+ A Noise ) HD n Afin[ rms] [ rms] HD [ rms] HD [ rms] [ rms] 12

13 Signal-to-Noise and Distortion Ratio (SINAD) and ENOB SINAD = ratio of RMS signal vs. mean of the root-sum-squares (RSS) of all other spectral components ENOB is calculated from SINAD ENOB = (SINAD ) 13

14 dbc vs dbfs dbc measurement made relative to the carrier power dbfs measurement made relative to the converter s Full Scale full scale is 0dBFS, but it is common to use -1dBFS, allowing some headroom in case there is noise or a slight DC shift 14

15 ADC Clock Rates ADC clock rates: usually specified as xsps analog input frequency: specified in Hz But, xsps is still xhz 100MSPS = 100MHz clock 1GSPS = 1GHz clock 100kSPS = 100 khz clock. 15

16 Settling Time Determines Bandwidth Final Value Settling Time, Output Initial Value DEAD TIME SLEW TIME RECOVERY TIME LINEAR SETTLING TIME Settling Time, Input-to-Output 16

17 Settling Time vs. Update Rate Settling time: the time the output takes to reach the final state usually given in a unit of time. Update Rate: the speed of the interface usually given in a unit of frequency, Hz or SPS Settling time should be shorter than the period time, otherwise dynamic performance suffers, in particular at full-scale-swings 17

18 Glitch Impulse Defined Voltage (V) Glitch-impulse Area, G 2 Voltage (V) Glitch-impulse Area, G 1 Code: 7FFF Code: 8000 Code: 7FFF Code: 8000 Glitch-impulse Area, G 1 time (s) time (s) Glitch-impulse = G 2 G 1 Glitch-impulse = G 1 a.) b.) 18

b 1 is the most significant bit (MSB) The MSB is the bit that has the most (largest) influence on the analog output

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