Model Answer to PartA of Examination Paper EEE305J1: Microcontroller Systems 2001/2 General Observations

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1 Model Answer to PartA of Examination Paper EEE305J1: Microcontroller Systems 2001/2 General Observations Design questions like the mock question below are extremely difficult to mark, not least because there are literally an infinity of answers and the required information may pop up in several places in your script. The student should be careful to maximise his/her marks by clearly setting out all required information and assumptions, and by using aids to clarification, such as task lists, flowcharts and program comments. Time is of the essence with a question like this. Taking the primary mark (ex. bonus) of 70% gives us a total of 125 minutes (two hours). Thus a 6 mark section should be completed in around ten minutes, or 1.8 minutes per mark! Do not write a two-page essay for six marks; it isn t cost effective. The Question A certain vending machine accepts 1p, 2p, 5p, 10p, 20p and 50p coins. The coin mechanism channels the coins past the appropriate six microswitches and generates a short pulse whenever any microswitch closes. A 2-digit common-cathode 7-segment display is to indicate the total up to 99p. The intelligence of this machine is to be implemented using a PIC16F87X-based system which is to read the six coin sensing switches each time it is interrupted and to manage the 2-digit multiplexed 7-segment display. Pertinent hardware details are: A coin passing by in the chute is to close the normally-open microswitch which taken as a group will give a one of six code output (only one switch closed at a time). When any switch is closed, a single high-going pulse on a separate line is generated to alert the PIC that a coin has been inserted. The two common-cathode 7-segment displays are multiplexed to the one port with each digit being enabled by a single NPN transistor. When enabled, each segment requires a nominal 20 ma current. The output signalling a passing coin is to be active-high at normal logic levels. The PIC is clocked using a 4 MHz crystal and powered at +5 V and Ground. You are asked to design both input and output interface and software for the system to implement the following scheme. Questions (1), (2) and (3) should be illustrated by diagrams and any software port configuration software should be shown. 1. The input interface for the six coil microswitches, including the necessary resistor. 9 minutes...[5 marks] 1

2 2. The single input line indicating activity in the money chute interrupting the PIC. Show how the interrupt is enabled in software. 4 minutes...[2 marks] 3. The output interface to the two common-cathode 7-segment displays and two NPN transistors. You may assume that the minimum current gain of these enabling transistors is 40. Determine the value of the segment resistors and base resistors. 22 minutes...[12 marks] 4. An algorithm and assembly-level listing as follows, assuming that file registers 20 2Fh are free: (a) An Interrupt Service Routine entered whenever a coin falls down the chute, that accumulates the input money microswitch state as a grand total of pence in a file register. 30 minutes...[16 marks] (b) A subroutine giving a nominal 1 ms delay. 9 minutes...[5 marks] (c) A subroutine converting from a binary byte in the Working register to binary-coded decimal, with two bytes giving Tens and Units. 14 minutes...[8 marks] (d) A subroutine converting a 4-bit code binary 0000 through 1001 to active-high 7- segment code. 10 minutes...[6 marks] (e) A main endless background loop to: Initialise the system and variables. Call up subroutine?? above to convert the total of money in?? to binary-coded decimal. Call up subroutine?? two times to convert each digit to 7-segment code. To activate each 7-segment digit in turn with the appropriate data using the delay subroutine of??. 30 minutes...[16 marks] For Bonus marks: 5. What additional hardware would be required if a PIC16F84 were to be used as the microcontroller? 10 minutes...[6 marks] 6. What additional software and hardware resources would be needed to extend your system to cope with money values up to 2.55? 7 minutes... [4 marks] 2

3 Overall Specifications Be sure to understand the question! There are six switches to be interfaced to the PIC, and the most convenient way to do this is to use Port B inputs for this purpose. The pulse / \ from the coin mechanism can be connected to RB0/INT and the two 7-segment displays connected to, say, Port D with two Port A lines being used to drive the two transistors which enable the displays. Basically when the processor is interrupted each switch is tested for 0 in turn and the appropriate amount is added to the total. In the background the contents of this moneybox is continually converted to two BCD digits and displayed, with alternate digits being displayed each millisecond. Worked Solution A possible overall circuit is shown in Fig.??. PIC16F87X +5V Logic 0/1 from PIC 0V/+5V RD7 RB7 1p RD6 RB6 2p RA? RD5 RB5 5p LED RD4 RB4 10p to other six segments Common cathode RD3 RB3 20p RB? Logic 0/1 from PIC 0V/+5V RD2 RB2 50p RD1 RB1 Typical segment RD0 RB0/INT Coin passing down chute MSD Common cathode LSD Common cathode TR1 RB1 RA1 RA0 TR2 RB2 Figure 1: Block diagram of system covering solutions 1.1, 1.2 and 1.3 3

4 1. Key points are: Connection of the switches to a Port B lines, RB[7:2], with one end of switches grounded 1 mark. The need for a pull-up resistor to give a logic 1 when the switch is open. This is typically around 10 kω. Alternatively (only one student got this) use the internal Port B weak pull-up resistors by clearing bit 7 of the Option register. This needs the instruction bsf OPTION_REG,7 whilst in Bank 1 2 marks. Setting up of Port B: (also shown are the settings of Port A and Port D) 2 marks. bsf STATUS,RP0 ; Change to Bank 1 movlw 0FFh ; PortB all inputs movwf TRISB ; Make PortB all inputs movlw b ; PortA, pins 0 & 1 are out put movwf TRISA ; connected to transistors clrf TRISD ; Port D all outputs to common displays bcf STATUS,RP0 ; Back to Bank 0 For Port B it would be sufficient to state that all ports are automatically set to input on reset. 2. Key points are: Line shown connected to RB0/INT 1 2 mark. Setting up of INTCON to enable the hardware interrupt mark. bsf INTCON,INTE ; Setthe INTerruptEnable flag bsf INTCON,GIE ; Set the General Interrupt Enable flag 3. Diagram showing two 7-segment digits with series anode resistors for each segment to limit current from the seven Port D lines and a NPN transistor connecting the common cathodes to ground or off (see Fig.??) 6 marks. To calculate the segment resistors we know that a LED drops around 2 V when conducting and that the PIC outputs are 5 V (actually it drops a little when it supplies 20 ma) when logic 1. Thus V = IR; R = Ω 2 marks To calculate the base transistor resistor, we know to know what collector current the transistor will carry. Each on segment will need 20 ma, and if all segments are lit (i.e. ) that makes 140 ma. If the current gain of the transistor is 40 (rather low) then the base current is 1.3 kω 2 marks. Code above setting Port D and Port A[1:0] to outputs 2 marks. 4. It is possible to get 2 of the paper s marks from the software just in this question. Thus 3 you ignore software at your peril! Although marks are not specifically allocated for task lists, flowcharts etc. it is strongly recommended that you spend some time putting your thoughts down on paper before 4

5 doing any coding. Not only does this help clarify your thoughts but it makes it easier for us to follow your program and give marks. (a) A possible Interrupt Service routine follows the task list: i. Save the Status and Working registers. ii. Get the total, labelled MONEY, in the main routine and then test each switch in turn adding the appropriate amount if a 0 is found. When completed restore the new value back in MONEY. iii. Restore the registers saved above. ; * Interrupt Service Routine entered on rising edge on pin RB0 * ; * Interrogates 6 switches and adds appropriate amount to MONEY * ISR movwf _work ; Save working register in file called _work swapf STATUS,w ; Get Status register without changing flags movwf _status ; and save in file register called _status ; bcf INTCON,INTF ; Clear interrupt flag movf MONEY,w ; Getcurrenttotal money btfss PORTB,7 ; Check for 1p switch (== 0?) addlw 1 ; IF closed THEN add one p ; and so on btfss PORTB,6 ; Check for 2p switch (== 0?) addlw 2 ; IF closed THEN add two p btfss PORTB,5 ; Check for 5p switch (== 0?) addlw 5 ; IF closed THEN add five p btfss PORTB,4 ; Check for 10p switch (== 0?) addlw d 10 ; IF closed THEN add decimal ten p ; NOTE DECIMAL 10 not10 hex! btfss PORTB,3 ; Check for 20p switch (== 0?) addlw d 20 ; IF closed THEN add decimal twenty p btfss PORTB,2 ; Check for 50p switch (== 0?) addlw d 50 ; IF closed THEN add decimal fifty p movwf MONEY ; Putyour money away ; swapf _status,w ; Get original Status register put away above movwf STATUS ; Does notaffectstatus flags swapf _work,f ; Swapping the saved Working reg twice swapf _work,w ; into W is a way of not affecting Status flags retfie ; Exit 5

6 Marks for: Saving entry/exit (standard for most ISRs) 5 marks. Clearing INTF before leaving 2 marks. Checking each bit RB[7:2] and adding the appropriate constant 8 marks. Return from interrupt retfie 1 mark. Notes: i. A few students added the BCD amounts; e.g. 50h for 50p remember that 50h is the same as 50 BCD ( ). They then corrected at the end, before exit by adding 6 to the low digit if it was over 9 and the same for the upper nybble. That meant that an additional 8 marks was allocated in place of section (4)(c). ii. One student checked for a Carry after an addition and if so cleared the total to show overflow (i.e. over 99p). (b) A nominal 1 ms delay at 4 MHz can be got by decrementing the Working register down from FFh (decimal 255) to zero. ; FUNCTION: Provides a nominal 1ms delay with a 4MHz crystal * ; ENTRY : None * ; EXIT : Working register zero * DELAY_1_S movlw d 255 ; : 1 DLOOP addlw -1 ; Decrementdown from 255 to 0: 255 * 1 btfss STATUS,Z ; Exit loop if zero : (254*1) + 2 goto DLOOP ; Repeat until skipped over : 254*2 return ; : 2 Total time in cycles ( ) is 2 (for the call) =1023. With a 4 MHz crystal one cycle equals 1 µs so 1023 µs is just over 1 ms. Marks for: Algorithm 2 marks Calculation 2 marks Use of return for subroutine 1 mark NOTE: Could have been done as a macro. (c) To convert from a naturally ( ) coded binary number which you know will never be greater than 99 to tens and units, simply subtract ten repeatedly until the outcome underflows (i.e. generates a Borrow). The number of successful subtractions it the number of tens and the residue after the last successful subtraction is the units. A suitable task list is: i. Zero the Tens count. ii. Subtract ten from the binary number. iii. IF did not generate a borrow then increment TENS and repeat. iv. The residue is UNITS. 6

7 * ; * FUNCTION: Determines the number of tens and units in a byte < 100 * ; * ENTRY : Natural binary byte in Working register * ; * EXIT : TENS, UNITS updated. W changed * ; * EXAMPLE : W = > TENS = (06), UNITS = (05) * * BIN_2_BCD clrf TENS ; Zero the Tens count ; LOOP_10 addlw -d 10 ; Take away ten ( ) ; btfss STATUS,C ; IF no Borrow (C = 1) THEN skip goto COMPLETE ; ELSE a borrow signals completion incf TENS,f ; IncrementTens count goto LOOP_10 ; and repeat ; COMPLETE addlw d 10 ; When complete then add on the last ten too many! movwf UNITS ; and this is the Units count return ; End of subroutine Marks for: Algorithm 2 marks. Loop structure 2 marks. Coding 4 marks. NOTE: See remark in ISR above. (d) This again is a standard classroom exercise: t ; * FUNCTION: Converts a binary nybble 0-9 o act ive-high 7-seg code * ; * ENTRY : Binary value (0-9) in W * ; * EXIT : 7-segmentcode in W * ; * EXAMPLE : n = 06, ret urn in W = * SVN_SEG addwf PCL,f ; Add n to PC to return with a code for n ; gfedcba retlw b ; Code for 0 retlw b ; Code for 1 retlw b ; Code for 2 retlw b ; Code for 3 retlw b ; Code for 4 retlw b ; Code for 5 retlw b ; Code for 6 retlw b ; Code for 7 retlw b ; Code for 8 retlw b ; Code for 9 7

8 Marks for: Code patterns 2 marks addition/retlw structure 4 marks Bonus marks were given if it was pointed out that it is possible for the addition to overflow the PC, aspcl is only eight bits. Also mention that for robustness the value sent out to this subroutine should be ANDed to remove upper four bits and dummy entries in the table for 1010b 1111b. (e) The examination paper question is essentially a task list. Depending on whether MONEY is kept as BCD or a subroutine used to convert on display, the listing may vary somewhat. Here is a typical listing. include "p16f87x.inc" org 0 ; The Resetvector goto MAIN ; Goto the main background program org 4 ; The Interrupt vector goto ISR ; Goto the Interrupt handler ; MONEY equ 20h ; The money box MAIN ; Port initialisation as given in response for (1), (2) \& (3) above. clrf MONEY ; Startoff on Resetwith zero money! ; M_LOOP movwf MONEY,w ; Get money total call BIN_2_BCD ; Convertto BCD for display ; movf UNITS,w ; The Units from BIN_2_BCD call SVN_SEG ; Convertto 7-segmentcode movwf PORTC ; Send to display bsf PORTA,0 ; Turn on the LSD display bcf PORTA,1 ; and off the MSD call DELAY_1_MS ; for one ms ; movf TENS,w ; The Tens from BIN_2_BCD call SVN_SEG ; Convertto 7-segmentcode movwf PORTC ; Send to display bcf PORTA,0 ; Turn off the LSD display bsf PORTA,1 ; and the MSD display on call DELAY_1_MS ; for one ms ; goto M_LOOP ; Repeat forever Marks for: 8

9 Reset/interrupt vectors 2 marks Correct sequencing of calls with data passing 8 marks Multiplexing of the two digits 6 marks Bonus marks 5. A serial scheme, such as in Fig of your book, could replace Port C by RA2 & RA3 (say) and an external serial-in/parallel-out shift register driving both displays in nonmultiplexed mode. All other hardware would remain the same 6 marks. 6. Initially subtract a hundred in the BIN_2_BCD subroutine incrementing a HUNDS location. A third 7-segment display would be needed with RA2 and another transistor used to enable this additional display. Additional 1 and 2 switches would be an advantage, but not essential 4 marks. eee305j1_first_a1_solution_01.tex L A T E X February 7,