6.012 Microelectronic Devices and Circuits Formula Sheet for the Final Exam, Fall " de(x) dx % d&(x) dx %" d 2 &(x) (x,t) J e

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1 6.0 Mcroelectronc Devces and Crcuts Formula Sheet for the Fnal Exam Fall 009 Parameter Values: q.6x0 "9 Coul # o 8.854x0 "4 F/cm # rs.7 # S $0 " F/cm n [ S@R.T ] $0 0 cm "3 kt /q $ 0.05 V; kt /q Еm x0 "4 cm Drft/Dffuson: ln0 $ 0.06 V Perodc Table: III IV V B C N Al S P Ga Ge As In Sn Sb Electrostatcs: Drft velocty : Conductvty : Dffuson flux : Ensten relaton : s x БЕ m E x " q Е e n Е h p $C F m #D m m $x D m kt Е m q " dex dx dx dx " d x #x Ex #xdx " Ex x $ Exdx dx #x x " $ $$ #xdxdx The Fve Basc Equatons: Electron contnuty : Hole contnuty : Electron current densty : Hole current densty : Possons equaton : "nxt "t "pxt "t # q q "J e xt "J h xt g L xt # [ nxt $ pxt # n ]rt g L xt # [ nxt $ pxt # n ]rt "nxt J e xt qе e nxtext q "pxt J h xt qе h pxtext # qd h "Ext q pxt # nxt N d x # N # a x Unform dopng full onzaton TE n - type N d >> N a n o " N d # N a $ N D p o n n o n kt q ln N D n p - type N a >> N d p o " N a # N d $ N A n o n Unform optcal exctaton unform dopng p o p # kt q ln N A n dn n n o n p p o p n p dt g t " p n n nr l o o dn Low level njecton np<< p o n o : dt n g l t wth # mn $ p o r " # mn

2 Flow problems unformly doped quas-neutral regons wth quas-statc exctaton and low level njecton; p-type example: d nx Mnorty carrer excess: " nx " g dx L x L e # $ e L e dnt Mnorty carrer current densty: J e x q dx Majorty carrer current densty : J h x J Tot " J e x Electrc feld : E x x Majorty carrer excess: Short base nfnte lfetme lmt: Mnorty carrer excess: px nx q J h x D h J e x qе h p o de x x dx d nx " # g dx L x nx " # $$ g L xdxdx Non-unformly doped semconductor sample n thermal equlbrum d dx { $ [ N d x $ N a x]} q # n e q kt $ e $q kt n o x n e q kt p o x n e $q kt p o xn o x n Depleton approxmaton for abrupt p-n juncton: $ 0 #qn Ap qn Dn 0 for for for for x < #x p #x p < x < 0 0 < x < x n x n < x x p N Dn x n b n # p kt q ln N Dn n wv AB S b # v AB q N Dn E pk q # v b AB N Dn N Dn S N Dn q DP v AB #Ap x p Ideal p-n juncton dode -v relaton: n-x p n e qv AB / kt # D D Aqn h D e e qv AB / kt - $ N Dn w neff w peff -x p v AB #A q S b # v AB N Dn N Dn n-x p n e qv AB / kt "; px n n e qv AB / kt N Dn w meff w m " x m L m tanh w m " x m L m px n n e qv AB / kt " N Dn f L m >> w m f L m ~ w m q QNRp -sde Aq - nxdx q QNRn -sde Aq - pxdx Note : px. nx n QNRs -w p w n x n L m f L m << w m

3 Large sgnal BJT Model n Forward Actve Regon FAR: npn wth base wdth modulaton B C wth : I BS I BS e qv BE / kt " v BE v CE v BE v BC # F B v BE v CE I ES # F Also F "- B - E Aqn # F When - B. 0 then F. MOS Capactor: 3 $v CE [ $v CE ] # F I BS e qv BE / kt " and # F. D h D e N DE w Eeff N AB w # F Beff - E "- B - E - B wth - E D h / N AB N DE / w Beff w Eeff and # F. - E F " F and $ and - B w Beff L eb Flat - band voltage : V FB " v GB at whch #0 # p$s [# 0 n S] V FB # p$s $ # m Threshold voltage : V T " v GC at whch #0 $ # p$s $ v BC # # p$s $ v BC n S { } / V T v BC V FB $ # p$s S # p$s $ v BC Depleton regon wdth at threshold : x DT v BC S # p$s $ v BC Oxde capactance per unt area : Inverson layer sheet charge densty : q N $ Accumulaton layer sheet charge densty: C ox ox [ rso 3.9 SO 3.5x0 $3 F /cm] q P $ [ v GC $V T v BC ] [ v GB $V FB ] Gradual Channel Approxmaton for MOSFET Characterstcs: n-channel; strong nverson; wth channel length modulaton; no velocty saturaton Only vald for v BS В 0 v DS Г 0. G 0 B 0 K D # [ v "V v GS T BS $ v DS " v DSsat ] for 0 < v GS K v GS "# v DS v DS for 0 < # v DS < v GS wth V T V FB " - p"s. S - p"s " v BS K W L Е e C ox C ox. ox # 0 for [ v GS ] < 0 < # v DS < # v DS { } / v DSsat # v "V v GS T BS. S [ - p"s " v BS ] / $

4 Large Sgnal Model for MOSFETs Operated below Threshold weak nverson: n-channel Only vald for for v GS В V T v DS Г 0 v BS В 0. 4 G 0 B " 0 Ds#t " I Ss#t e q{ v GS #V T } n kt # e #qv DS / kt where I Ss#t $ W L Е e kt q S p # v BS K o V t - p # v BS wth V t $ kt q K o $ W L Е ec ox - $ S - n " p # v BS Large Sgnal Model for MOSFETs Reachng Velocty Saturaton at Small v DS : n-channel Only vald for v BS В 0 v DS Г 0. Neglects v DS / relatve to -V T. Saturaton model: s y E y Е e E y f E y " E crt s y E y Е e E crt # s sat f E y $ E crt G 0 B 0 0 for v GS V T < 0 < v DS D W s sat [ v GS V T ][ v DS crt L ] for 0 < v GS V T crt L < v DS W L Е C e ox[ v GS V T ]v DS for 0 < v GS V T v DS < crt L wth # CMOS Performance Transfer characterstc: In general : V LO 0 V HI V DD I ON 0 I OFF 0 Symmetry : V M V DD and NM LO NM HI " K n K p and V Tp V Tn Mnmum sze gate : L n L p W n W mn W p Е n Е p W n or W p s satn s satp W n Swtchng tmes and gate delay no velocty saturaton: C " Ch arg e " Dsch arg e L V DD K n [ V DD #V Tn ] C L n W n L n W p L p C ox 3nW mn " Mn.Cycle " Ch arg e " Dsch arg e nl mnv DD Е e [ V DD #V Tn ] Dynamc power dsspaton no velocty saturaton: P fmax PD fmax C L V DD f max " C LV DD " Е W e mn$ V V V ox DD DD Tn # Mn.Cycle assumes Е e Е h P fmax InverterArea " P f max " Е e$ V V V ox DD DD Tn W mn

5 Swtchng tmes and gate delay full velocty saturaton: 5 C " Ch arg e " Dsch arg e L V DD W mn s sat [ V DD #V Tn ] C L n W n L n W p L p C ox nw mn assumes s sate s sath " Mn.Cycle " Ch arg e " Dsch arg e 4nV DD s sat [ V DD #V Tn ] Dynamc power dsspaton per gate full velocty saturaton: P fmax PD fmax C L V DD Statc power dsspaton per gate f max " C V L DD " s W sat mn$ V V V ox DD DD Tn # Mn.Cycle P fmax InverterArea " P f max " s sat$ V V V ox DD DD Tn W mn L P statc V DD I Doff W " V mn # DD Е e V S { t e $V T } nv t V BS P statc PD statc Inverter Area V DD # Е e V S t e $V T V BS CMOS Scalng Rules - Constant electrc feld scalng { } nv t Scaled Dmensons : " s W " W s " s N A " sn A Scaled Voltages : V DD " V DD s V BS " V BS s Consequences : C ox " s Devce transt tmes K " sk V T " V T s # " # s P dyn " P dyn s PD fmax " PD fmax PD statc " s e s$v T sn V t PD statc Short Base Dode transt tme : " b w B D mnb w B Е mnb V thermal Channel transt tme MOSFET w.o. velocty saturaton : " Ch 3 Е Ch V GS #V T Channel transt tme MOSFET wth velocty saturaton : " Ch L s sat L

6 6 Small Sgnal Lnear Equvalent Crcuts: Ѕ p-n Dode n -p dopng assumed for C d g d " # D q #v AB kt I S eqb / kt $ Q where C dp B A q I D kt C d C dp C df q S and C V qi D df AB kt b B Ѕ BJT n FAR q kt " oi BS e qv kt BE [ #V CE ] $ qi C kt # $ # I C or $ I C " o I BS e qv BE kt C b B-E depleton cap. wth b - w B [ w p x p ] g " o q I C " o kt g d d wth d " w x p p C Е : B-C depleton cap. Ѕ MOSFET strong nverson; n saturaton no velocty saturaton K[ V GS V BS ][ #V DS ] $ K I D K [ V "V V GS T BS ] # $ # I D or $ I D b K I D wth " -V T -v BS Q 3 W LC ox C sb C gb C db : depleton capactances C gd W C gd where C gd. S q/ p "V BS s the G-D frngng and overlap capactance per unt gate length parastc Ѕ MOSFET strong nverson; n saturaton wth full velocty saturaton W s sat C ox " I D I D b # wth # $ V T v BS Q S q p V BS W LC ox C sb C gb C db : depleton capactances C gd W C gd where C gd s the G-D frngng and overlap capactance per unt gate length parastc Ѕ MOSFET operated sub-threshold; n forward actve regon; only vald for v bs 0 q I D n kt " I D I D # W L C gd W C gd where C gd C # ox V GS $V FB C db : dran regon depleton capactance S s the G-D frngng and overlap capactance per unt gate length parastc

7 7 Sngle transstor analog crcut buldng block stages Note: g l g sl g el ; g l е g l BIPOLAR Common emtter " Common base Emtter follower Emtter degeneracy Shunt feedback Voltage Current gan A v gan A # " r l " $ g l g l g l Input r # g [ g l ] m r l # # [ $ ] [ g ] # $ g l # $ r $ g g l " g " G m F G F g l Output resstance R resstance R o r r o # [ $ ]r o r r t r l $ # " r l # $ # r [ $ ]R F # r o R F # " R F " g l G F g G F " A v r o R F G F MOSFET Common source " Common gate Source follower Source degeneracy seres feedback Shunt feedback Voltage Current Input Output gan A v gan A resstance R resstance R o " r l g # # r $ o g l o [ [ b ] r l r [ b ] o g g mb o]. / - g t 0 [ ] [ g l ] # # [ g l ] " " G F G F " r l R F # # r o " R F " g l G F G F " A v OCTC/SCTC Methods for Estmatng Amplfer Bandwdth OCTC estmate of " HI : " HI # " $ - R C - $ r o R F G F wth R defned as the equvalent resstance n parallel wth C wth all other parastc devce capactors C s C Е s s C gd s etc. open crcuted. SCTC estmate of " LO : " LO # $ " j $ R j C j j j wth R j defned as the equvalent resstance n parallel wth C j wth all other basng and couplng capactors C s C O s C E s C S s etc. short crcuted.

8 8 Dfference- and Common-mode sgnals Gven two sgnals v and v we can decompose them nto two new sgnals one v C that s common to both v and v and the other v D that makes an equal but opposte polarty contrbuton to v and v : [ v D " v # v and v C " v v ] $ v v C v D and v v C # v D Short crcut current gan unty gan frequency f T " t # 3Е Ch V GS $V T L 3s Ch L MOSFET no vel. sat. W s sat W LC ox s sat L MOSFET w. vel. sat. - C C Е ; lm g I c [ m C C Е ] # D mnb w B BJT large I C. / tr Revsed /9/09

9 MIT OpenCourseWare Mcroelectronc Devces and Crcuts Fall 009 For nformaton about ctng these materals or our Terms of Use vst:

Section C2: BJT Structure and Operational Modes

Section C2: BJT Structure and Operational Modes Secton 2: JT Structure and Operatonal Modes Recall that the semconductor dode s smply a pn juncton. Dependng on how the juncton s based, current may easly flow between the dode termnals (forward bas, v