Electronic Warfare Digital Radar Receiver

Transcription

1 Electronic Warfare Digital Radar Receiver System Block Diagram Deliverable Bradley University, Electrical and Computer Engineering Department Project Members: Project Advisors: Michael Gahl Peter Petrany Dr. Brian Huggins Dr. In Soo Ahn Mr. James Jensen Date: November 23, 2004 Introduction In electronic warfare (EW), it is beneficial to classify radio frequency (RF) signals to identify and/or jam an enemy s use of the electromagnetic spectrum. Characterization of a RF signal can be achieved through the use of an EW digital radar receiver. This project will focus on the identification and characterization of a pulsed radar signal. Top Level Block Diagram Inputs to the EW digital radar receiver are a RF signal and processing control commands as shown in Figure. Possible processing control commands are selecting the local oscillator () frequency and averaging to recover the signal in a noisy environment. There are four system outputs from the EW digital radar receiver. The outputs are the following and shown in Figure and Figure 2: Pulse Repetition Rate () - the inverse of the period of the RF signal s envelope Pulse Width (PW) - the time duration that the RF signal is present under the envelope RF signal s frequency (f RF ) - the frequency of the signal during the PW No Signal Detected - the presence of a signal is not detected by computer algorithm

2 Figure : Top-Level Block Diagram Figure 2: RF Signal Characteristics Sub-Level Block Diagram The sub-level block diagram shown in Figure 3 displays the EW digital radar receiver in more detail than Figure. Block mixes an analog RF signal with an analog frequency from Block 2 to produce an analog intermediate frequency (). The signal is sampled by Block 3 to be processed by Block 4. In addition, Block 4 controls the frequency transmitted by Block 2 through a feedback path (CNTRL). An option is to have the user set the frequency by configuring CNTRL to be a user input.

3 Block Block 3 Block 4 RF Signal LNA Lo w -N oi s e Am pl i fi e r Mi xe r Acquisition Card Computer Digital Signal (D S P) M on i to r f RF PW No Signal Detected Control Commands PLL (Fre qu e n cy S y n th e s i z e r) CNTRL Block 2 Figure 3: Sub-Level Block Diagram Block : RF Front End A RF signal is input into the RF front end as shown in Figure 4. In lab, a signal generator produces the RF signal, but in application, an antenna would be used to receive the signal. The signal is amplified in a low-noise amplifier (LNA) to increase the power of the input signal. The bandpass filter following the LNA requires a bandwidth (BW) covering the range of the RF signal and attenuates noise outside this range. Next, the mixer multiplies the amplified RF signal with the frequency from Block 2. Because the mixer output consists of many frequencies, another bandpass filter must be implemented into the sub-system to attenuate all frequency components other than the desired. Mi x e r RF Signal LNA Low-Noi se Am pl i fi e r Figure 4: Block : RF Front End Block 2: PLL (Frequency Synthesizer) The frequency mixed with the RF signal of Figure 4 is produced by the phase locked loop (PLL), acting as a frequency synthesizer, shown in Figure 5. The frequency is determined by the binary, two-bit control input, CNTRL, from Block 4. From the two-bit CNTRL input, a total of four frequencies can be set. In an actual system, a larger number of frequencies would be generated.

4 CNTRL PLL (Fre qu e n cy S y n th e s i z e r) Figure 5: Block 2: PLL (Frequency Synthesizer) Block 3: Acquisition Card The signal of Block is sampled by the data acquisition card in Block 3 as shown in Figure 6. On-board the data acquisition card is an analog-to-digital converter (ADC), which converts the signal into a binary data stream. The binary data is output from Block 3. Acquisition Card Binary Stream Figure 6: Block 3: Acquisition Card Block 4: DSP and Display The binary data stream from Block 3 is stored into memory so that digital signal processing (DSP) within MATLAB can perform calculations on the data as shown in Figure 7. Based on the detection of a RF signal, and the DSP calculations, f RF, the PW, and the are displayed. If no signal is detected, CNTRL instructs the PLL to change the frequency, and no signal present is displayed on the monitor. Also, processing control commands input into Block 4 determine the frequency and averaging of the signal. Binary Stream Digital Signal (DS P) Monitor f RF PW No Signal Detected CNTRL Control Commands Figure 7: Block 4: DSP and Display

5 Flowchart: DSP Technique The flowchart shown in Figure 8 shows the technique for calculating the characteristics of the input RF signal. The RF signal characteristics are shown in Figures a-c to the left of the flowchart. The RF signal is digitized by the ADC and the computer performs the FFT operation. The user can define the frequency by specifying CNTRL before taking the FFT. Then the f is found and from the magnitude of the peak at f, the decision whether a signal has been detected is made. If the signal has not been detected, the frequency is changed. If the signal has been detected, f RF is calculated by adding the frequency to f. From f, the other RF signal characteristics can be determined. Figure a: ADC samples Spec ify CNTRL Figure b: FFT Find frequency at peak magnitude =f (see Figure a) Figure c: Is a signal detect ed? No Increment Yes Add frequency to f to obtainfrf Find frequency of subsequent peak =f (see Figure b) Find frequency of nearest zero-crossing =fo (see Figure c) = f - f PW = f - f 0 Display Display frf Figure 8: Flowchart: DSP Technique Display PW